SAM3X/Arduino Due: Fix typo in sam3x_periphclks.h; add SCLK definitions to board.h header file. From Fabien Comte

This commit is contained in:
Gregory Nutt 2014-09-08 06:14:59 -06:00
parent 39487eb31e
commit e57d2e5460
7 changed files with 13 additions and 10 deletions

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@ -52,8 +52,8 @@
#define sam_enableperiph0(s) putreg32((1 << (s)), SAM_PMC_PCER0) #define sam_enableperiph0(s) putreg32((1 << (s)), SAM_PMC_PCER0)
#define sam_enableperiph1(s) putreg32((1 << ((s) - 32)), SAM_PMC_PCER1) #define sam_enableperiph1(s) putreg32((1 << ((s) - 32)), SAM_PMC_PCER1)
#define sam_disableperiph0(s) putreg32((1 << (s)), SAM_PMC_PDER0) #define sam_disableperiph0(s) putreg32((1 << (s)), SAM_PMC_PCDR0)
#define sam_disableperiph1(s) putreg32((1 << ((s) - 32)), SAM_PMC_PDER1) #define sam_disableperiph1(s) putreg32((1 << ((s) - 32)), SAM_PMC_PCDR1)
#define sam_supc_enableclk() sam_enableperiph0(SAM_PID_SUPC) #define sam_supc_enableclk() sam_enableperiph0(SAM_PID_SUPC)
#define sam_rstc_enableclk() sam_enableperiph0(SAM_PID_RSTC) #define sam_rstc_enableclk() sam_enableperiph0(SAM_PID_RSTC)

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@ -67,7 +67,7 @@
# define RTT_PRES 1 # define RTT_PRES 1
#endif #endif
#define RTT_FCLK (BOARD_SLCK_FREQUENCY/RTT_PRES) #define RTT_FCLK (BOARD_SCLK_FREQUENCY/RTT_PRES)
#define RTT_MAXTIMEOUT ((1000000ULL * (0x100000000ULL)) / RTT_FCLK) #define RTT_MAXTIMEOUT ((1000000ULL * (0x100000000ULL)) / RTT_FCLK)
/* Configuration ************************************************************/ /* Configuration ************************************************************/

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@ -66,7 +66,7 @@
/* TODO: Allow selection of any of the input clocks */ /* TODO: Allow selection of any of the input clocks */
#define TC_FCLK (BOARD_SLCK_FREQUENCY) #define TC_FCLK (BOARD_SCLK_FREQUENCY)
#define TC_MAXTIMEOUT ((1000000ULL * (1ULL + TC_RVALUE_MASK)) / TC_FCLK) #define TC_MAXTIMEOUT ((1000000ULL * (1ULL + TC_RVALUE_MASK)) / TC_FCLK)
/* Configuration ************************************************************/ /* Configuration ************************************************************/

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@ -71,7 +71,7 @@
* 1000 * 64 / Fmin = 49.93 msec * 1000 * 64 / Fmin = 49.93 msec
*/ */
#define WDT_FCLK (BOARD_SLCK_FREQUENCY / 128) #define WDT_FCLK (BOARD_SCLK_FREQUENCY / 128)
#define WDT_MAXTIMEOUT ((1000 * (WDT_MR_WDV_MAX+1)) / WDT_FCLK) #define WDT_MAXTIMEOUT ((1000 * (WDT_MR_WDV_MAX+1)) / WDT_FCLK)
/* Configuration ************************************************************/ /* Configuration ************************************************************/

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@ -61,11 +61,11 @@
* 32768 kHz). * 32768 kHz).
*/ */
#ifndef BOARD_SLCK_FREQUENCY #ifndef BOARD_SCLK_FREQUENCY
# define BOARD_SLCK_FREQUENCY 32768 # define BOARD_SCLK_FREQUENCY 32768
#endif #endif
#define WDT_FREQUENCY (BOARD_SLCK_FREQUENCY / 128) #define WDT_FREQUENCY (BOARD_SCLK_FREQUENCY / 128)
/* At 32768Hz, the maximum timeout value will be: /* At 32768Hz, the maximum timeout value will be:
* *

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@ -64,6 +64,10 @@
* CPU clock: 84MHz * CPU clock: 84MHz
*/ */
#define BOARD_32KOSC_FREQUENCY (32768)
#define BOARD_SCLK_FREQUENCY (BOARD_32KOSC_FREQUENCY)
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
/* Main oscillator register settings. /* Main oscillator register settings.
* *
* The start up time should be should be: * The start up time should be should be:
@ -97,7 +101,6 @@
/* Resulting frequencies */ /* Resulting frequencies */
#define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */
#define BOARD_PLLA_FREQUENCY (168000000) /* PLLACK: 14 * 12Mhz / 1 */ #define BOARD_PLLA_FREQUENCY (168000000) /* PLLACK: 14 * 12Mhz / 1 */
#define BOARD_MCK_FREQUENCY (84000000) /* MCK: PLLACK / 2 */ #define BOARD_MCK_FREQUENCY (84000000) /* MCK: PLLACK / 2 */
#define BOARD_CPU_FREQUENCY (84000000) /* CPU: MCK */ #define BOARD_CPU_FREQUENCY (84000000) /* CPU: MCK */

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@ -65,7 +65,7 @@
#define BOARD_CKGR_MOR_MOSCXTST (63 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */ #define BOARD_CKGR_MOR_MOSCXTST (63 << PMC_CKGR_MOR_MOSCXTST_SHIFT) /* Start-up Time */
#define BOARD_32KOSC_FREQUENCY (32768) #define BOARD_32KOSC_FREQUENCY (32768)
#define BOARD_SLCK_FREQUENCY (BOARD_32KOSC_FREQUENCY) #define BOARD_SCLK_FREQUENCY (BOARD_32KOSC_FREQUENCY)
#define BOARD_MAINOSC_FREQUENCY (12000000) #define BOARD_MAINOSC_FREQUENCY (12000000)
#ifdef CONFIG_SAM34_UDP #ifdef CONFIG_SAM34_UDP