stm32h7: Fix a bunch of tickless issues.
This commit is contained in:
Anthony Merlino
Xiang Xiao
parent
2fad06008a
commit
e5c8bb9b34
@ -114,9 +114,8 @@ struct stm32_tickless_s
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uint32_t frequency;
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#ifdef CONFIG_CLOCK_TIMEKEEPING
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uint64_t counter_mask;
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#else
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uint32_t overflow; /* Timer counter overflow */
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#endif
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uint32_t overflow; /* Timer counter overflow */
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volatile bool pending; /* True: pending task */
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uint32_t period; /* Interval period */
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uint32_t base;
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@ -331,14 +330,12 @@ static void stm32_interval_handler(void)
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*
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****************************************************************************/
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#ifndef CONFIG_CLOCK_TIMEKEEPING
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static void stm32_timing_handler(void)
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{
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g_tickless.overflow++;
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STM32_TIM_ACKINT(g_tickless.tch, 0);
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STM32_TIM_ACKINT(g_tickless.tch, ATIM_SR_UIF);
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}
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#endif /* CONFIG_CLOCK_TIMEKEEPING */
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/****************************************************************************
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* Name: stm32_tickless_handler
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@ -359,12 +356,10 @@ static int stm32_tickless_handler(int irq, void *context, void *arg)
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{
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int interrupt_flags = stm32_tickless_getint();
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#ifndef CONFIG_CLOCK_TIMEKEEPING
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if (interrupt_flags & ATIM_SR_UIF)
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{
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stm32_timing_handler();
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}
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#endif /* CONFIG_CLOCK_TIMEKEEPING */
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if (interrupt_flags & (1 << g_tickless.channel))
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{
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@ -381,8 +376,13 @@ static int stm32_tickless_handler(int irq, void *context, void *arg)
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static uint64_t stm32_get_counter(void)
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{
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#ifdef HAVE_32BIT_TICKLESS
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return ((uint64_t)g_tickless.overflow << 32) |
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STM32_TIM_GETCOUNTER(g_tickless.tch);
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#else
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return ((uint64_t)g_tickless.overflow << 16) |
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STM32_TIM_GETCOUNTER(g_tickless.tch);
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#endif
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}
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/****************************************************************************
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@ -553,8 +553,9 @@ void up_timer_initialize(void)
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g_tickless.channel = CONFIG_STM32H7_TICKLESS_CHANNEL;
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g_tickless.pending = false;
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g_tickless.period = 0;
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g_tickless.overflow = 0;
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tmrinfo("timer=%d channel=%d frequency=%d Hz\n",
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tmrinfo("timer=%d channel=%d frequency=%lu Hz\n",
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g_tickless.timer, g_tickless.channel, g_tickless.frequency);
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g_tickless.tch = stm32_tim_init(g_tickless.timer);
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@ -571,13 +572,11 @@ void up_timer_initialize(void)
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/* Should this be changed to 0xffff because we use 16 bit timers? */
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g_tickless.counter_mask = 0xffffffffull;
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#else
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g_tickless.overflow = 0;
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#endif
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/* Set up to receive the callback when the counter overflow occurs */
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STM32_TIM_SETISR(g_tickless.tch, stm32_tickless_handler, NULL, 0);
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#endif
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/* Initialize interval to zero */
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@ -607,7 +606,7 @@ void up_timer_initialize(void)
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/* Start the timer */
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STM32_TIM_ACKINT(g_tickless.tch, 0);
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STM32_TIM_ACKINT(g_tickless.tch, ~0);
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STM32_TIM_ENABLEINT(g_tickless.tch, 0);
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#if defined(CONFIG_ARMV7M_SYSTICK) && defined(CONFIG_CPULOAD_PERIOD)
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@ -648,7 +647,6 @@ void up_timer_initialize(void)
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*
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****************************************************************************/
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#ifndef CONFIG_CLOCK_TIMEKEEPING
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int up_timer_gettime(FAR struct timespec *ts)
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{
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uint64_t usec;
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@ -680,7 +678,7 @@ int up_timer_gettime(FAR struct timespec *ts)
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overflow = g_tickless.overflow;
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counter = STM32_TIM_GETCOUNTER(g_tickless.tch);
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pending = STM32_TIM_CHECKINT(g_tickless.tch, 0);
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pending = STM32_TIM_CHECKINT(g_tickless.tch, ATIM_SR_UIF);
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verify = STM32_TIM_GETCOUNTER(g_tickless.tch);
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/* If an interrupt was pending before we re-enabled interrupts,
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@ -689,7 +687,7 @@ int up_timer_gettime(FAR struct timespec *ts)
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if (pending)
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{
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STM32_TIM_ACKINT(g_tickless.tch, 0);
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STM32_TIM_ACKINT(g_tickless.tch, ATIM_SR_UIF);
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/* Increment the overflow count and use the value of the
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* guaranteed to be AFTER the overflow occurred.
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@ -708,7 +706,7 @@ int up_timer_gettime(FAR struct timespec *ts)
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tmrinfo("counter=%lu (%lu) overflow=%lu, pending=%i\n",
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(unsigned long)counter, (unsigned long)verify,
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(unsigned long)overflow, pending);
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tmrinfo("frequency=%u\n", g_tickless.frequency);
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tmrinfo("frequency=%lu\n", g_tickless.frequency);
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/* Convert the whole thing to units of microseconds.
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*
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@ -730,13 +728,27 @@ int up_timer_gettime(FAR struct timespec *ts)
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ts->tv_sec = sec;
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ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
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tmrinfo("usec=%llu ts=(%u, %lu)\n",
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tmrinfo("usec=%llu ts=(%lu, %lu)\n",
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usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
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return OK;
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}
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#else
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#ifdef CONFIG_CLOCK_TIMEKEEPING
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/****************************************************************************
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* Name: up_timer_getcounter
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*
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* Description:
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* To be provided
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*
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* Input Parameters:
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* cycles - 64-bit return value
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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int up_timer_getcounter(FAR uint64_t *cycles)
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{
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@ -744,8 +756,6 @@ int up_timer_getcounter(FAR uint64_t *cycles)
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return OK;
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}
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#endif /* CONFIG_CLOCK_TIMEKEEPING */
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/****************************************************************************
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* Name: up_timer_getmask
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*
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@ -760,12 +770,15 @@ int up_timer_getcounter(FAR uint64_t *cycles)
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*
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****************************************************************************/
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#ifdef CONFIG_CLOCK_TIMEKEEPING
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void up_timer_getmask(FAR uint64_t *mask)
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{
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DEBUGASSERT(mask != NULL);
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*mask = g_tickless.counter_mask;
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/* Should this be changed to 0xffff because we use 16 bit timers? */
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*mask = 0xffffffffull;
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}
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#endif /* CONFIG_CLOCK_TIMEKEEPING */
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/****************************************************************************
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@ -1044,8 +1057,13 @@ int up_alarm_start(FAR const struct timespec *ts)
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int up_alarm_cancel(FAR struct timespec *ts)
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{
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#ifdef HAVE_32BIT_TICKLESS
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uint64_t nsecs = (((uint64_t)g_tickless.overflow << 32) |
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STM32_TIM_GETCOUNTER(g_tickless.tch)) * NSEC_PER_TICK;
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#else
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uint64_t nsecs = (((uint64_t)g_tickless.overflow << 16) |
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STM32_TIM_GETCOUNTER(g_tickless.tch)) * NSEC_PER_TICK;
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#endif
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ts->tv_sec = nsecs / NSEC_PER_SEC;
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ts->tv_nsec = nsecs - ts->tv_sec * NSEC_PER_SEC;
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