Merged in david_s5/nuttx/upstream_nucleo-144 (pull request #79)
Upstream_nucleo 144
This commit is contained in:
Gregory Nutt
commit
e5ca333246
@ -1861,6 +1861,14 @@ config STM32F7_CUSTOM_CLOCKCONFIG
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---help---
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Enables special, board-specific STM32 clock configuration.
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config STM32F7_DTCMEXCLUDE
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bool "Exclude DTCM SRAM from the heap"
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default y if ELF
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depends on ARMV7M_HAVE_DTCM
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---help---
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Exclude DTCM SRAM from the HEAP because it appears to be impossible
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to execute ELF modules from DTCM RAM (REVISIT!).
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config STM32F7_DTCM_PROCFS
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bool "DTCM SRAM PROCFS support"
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default n
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@ -3509,222 +3517,10 @@ endif # !STM32F7_PWM_MULTICHAN
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endif # STM32F7_TIM14_PWM
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config STM32F7_TIM15_PWM
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bool "TIM15 PWM"
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default n
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depends on STM32F7_TIM15
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---help---
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Reserve timer 15 for use by PWM
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If STM32F7_TIM15
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is defined then THIS following may also be defined to indicate that
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the timer is intended to be used for pulsed output modulation.
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if STM32F7_TIM15_PWM
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if STM32F7_PWM_MULTICHAN
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config STM32F7_TIM15_CHANNEL1
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bool "TIM15 Channel 1"
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default n
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---help---
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Enables channel 1.
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if STM32F7_TIM15_CHANNEL1
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config STM32F7_TIM15_CH1MODE
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int "TIM15 Channel 1 Mode"
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default 0
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range 0 3 if STM32F7_STM32F30XX
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range 0 1 if !STM32F7_STM32F30XX
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---help---
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Specifies the channel mode.
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config STM32F7_TIM15_CH1OUT
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bool "TIM15 Channel 1 Output"
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default n
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---help---
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Enables channel 1 output.
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endif # STM32F7_TIM15_CHANNEL1
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config STM32F7_TIM15_CHANNEL2
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bool "TIM15 Channel 2"
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default n
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---help---
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Enables channel 2.
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if STM32F7_TIM15_CHANNEL2
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config STM32F7_TIM15_CH2MODE
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int "TIM15 Channel 2 Mode"
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default 0
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range 0 3 if STM32F7_STM32F30XX
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range 0 1 if !STM32F7_STM32F30XX
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---help---
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Specifies the channel mode.
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config STM32F7_TIM15_CH2OUT
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bool "TIM15 Channel 2 Output"
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default n
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---help---
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Enables channel 2 output.
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endif # STM32F7_TIM15_CHANNEL2
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endif # STM32F7_PWM_MULTICHAN
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if !STM32F7_PWM_MULTICHAN
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config STM32F7_TIM15_CHANNEL
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int "TIM15 PWM Output Channel"
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default 1
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range 1 2
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---help---
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If TIM15 is enabled for PWM usage, you also need specifies the timer output
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channel {1,2}
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config STM32F7_TIM15_CHMODE
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int "TIM15 Channel Mode"
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default 0
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range 0 3 if STM32F7_STM32F30XX
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range 0 1 if !STM32F7_STM32F30XX
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---help---
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Specifies the channel mode.
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endif # !STM32F7_PWM_MULTICHAN
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endif # STM32F7_TIM15_PWM
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config STM32F7_TIM16_PWM
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bool "TIM16 PWM"
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default n
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depends on STM32F7_TIM16
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---help---
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Reserve timer 16 for use by PWM
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If STM32F7_TIM16
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is defined then THIS following may also be defined to indicate that
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the timer is intended to be used for pulsed output modulation.
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if STM32F7_TIM16_PWM
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if STM32F7_PWM_MULTICHAN
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config STM32F7_TIM16_CHANNEL1
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bool "TIM16 Channel 1"
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default n
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---help---
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Enables channel 1.
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if STM32F7_TIM16_CHANNEL1
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config STM32F7_TIM16_CH1MODE
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int "TIM16 Channel 1 Mode"
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default 0
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range 0 1
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---help---
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Specifies the channel mode.
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config STM32F7_TIM16_CH1OUT
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bool "TIM16 Channel 1 Output"
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default n
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---help---
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Enables channel 1 output.
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endif # STM32F7_TIM16_CHANNEL1
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endif # STM32F7_PWM_MULTICHAN
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if !STM32F7_PWM_MULTICHAN
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config STM32F7_TIM16_CHANNEL
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int "TIM16 PWM Output Channel"
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default 1
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range 1 1
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---help---
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If TIM16 is enabled for PWM usage, you also need specifies the timer output
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channel {1}
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config STM32F7_TIM16_CHMODE
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int "TIM16 Channel Mode"
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default 0
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range 0 1
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---help---
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Specifies the channel mode.
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endif # !STM32F7_PWM_MULTICHAN
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endif # STM32F7_TIM16_PWM
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config STM32F7_TIM17_PWM
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bool "TIM17 PWM"
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default n
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depends on STM32F7_TIM17
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---help---
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Reserve timer 17 for use by PWM
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If STM32F7_TIM17
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is defined then THIS following may also be defined to indicate that
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the timer is intended to be used for pulsed output modulation.
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if STM32F7_TIM17_PWM
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if STM32F7_PWM_MULTICHAN
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config STM32F7_TIM17_CHANNEL1
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bool "TIM17 Channel 1"
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default n
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---help---
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Enables channel 1.
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if STM32F7_TIM17_CHANNEL1
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config STM32F7_TIM17_CH1MODE
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int "TIM17 Channel 1 Mode"
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default 0
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range 0 1
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---help---
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Specifies the channel mode.
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config STM32F7_TIM17_CH1OUT
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bool "TIM17 Channel 1 Output"
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default n
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---help---
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Enables channel 1 output.
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endif # STM32F7_TIM17_CHANNEL1
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endif # STM32F7_PWM_MULTICHAN
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if !STM32F7_PWM_MULTICHAN
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config STM32F7_TIM17_CHANNEL
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int "TIM17 PWM Output Channel"
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default 1
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range 1 1
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---help---
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If TIM17 is enabled for PWM usage, you also need specifies the timer output
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channel {1}
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config STM32F7_TIM17_CHMODE
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int "TIM17 Channel Mode"
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default 0
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range 0 1
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---help---
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Specifies the channel mode.
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endif # !STM32F7_PWM_MULTICHAN
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endif # STM32F7_TIM17_PWM
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config STM32F7_PWM_MULTICHAN
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bool "PWM Multiple Output Channels"
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default n
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depends on STM32F7_TIM1_PWM || STM32F7_TIM2_PWM || STM32F7_TIM3_PWM || STM32F7_TIM4_PWM || STM32F7_TIM5_PWM || STM32F7_TIM8_PWM || STM32F7_TIM9_PWM || STM32F7_TIM10_PWM || STM32F7_TIM11_PWM || STM32F7_TIM12_PWM || STM32F7_TIM13_PWM || STM32F7_TIM14_PWM || STM32F7_TIM15_PWM || STM32F7_TIM16_PWM || STM32F7_TIM17_PWM
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depends on STM32F7_TIM1_PWM || STM32F7_TIM2_PWM || STM32F7_TIM3_PWM || STM32F7_TIM4_PWM || STM32F7_TIM5_PWM || STM32F7_TIM8_PWM || STM32F7_TIM9_PWM || STM32F7_TIM10_PWM || STM32F7_TIM11_PWM || STM32F7_TIM12_PWM || STM32F7_TIM13_PWM || STM32F7_TIM14_PWM
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select ARCH_HAVE_PWM_MULTICHAN
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---help---
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Specifies that the PWM driver supports multiple output
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@ -49,7 +49,7 @@
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* Pre-processor Definitions
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************************************************************************************/
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/* STM32F40XXX Address Blocks *******************************************************/
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/* STM32F7XXXX STM32F75XXX Address Blocks *******************************************/
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#define STM32_CODE_BASE 0x00000000 /* 0x00000000-0x1fffffff: 512Mb code block */
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#define STM32_SRAM_BASE 0x20000000 /* 0x20000000-0x3fffffff: 512Mb sram block */
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@ -49,7 +49,7 @@
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* Pre-processor Definitions
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************************************************************************************/
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/* STM32F40XXX Address Blocks *******************************************************/
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/* STM32F76XXX STM32F77XXX Address Blocks *******************************************/
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#define STM32_CODE_BASE 0x00000000 /* 0x00000000-0x1fffffff: 512Mb code block */
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#define STM32_SRAM_BASE 0x20000000 /* 0x20000000-0x3fffffff: 512Mb sram block */
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@ -1,8 +1,9 @@
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/****************************************************************************
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* arch/arm/src/stm32f7/stm32_dtcm.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane <david_s5@nscdg.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -52,14 +53,14 @@
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#define HAVE_DTCM_HEAP 1
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/* Only the STM32 F2, F3, and F4 have DTCM memory */
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/* The STM32 F7 have DTCM memory */
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#if defined(CONFIG_STM32_STM32F30XX)
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# define DTCM_START 0x10000000
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# define DTCM_END 0x10002000
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#elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
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# define DTCM_START 0x10000000
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# define DTCM_END 0x10010000
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#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
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# define DTCM_START 0x20000000
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# define DTCM_END 0x20010000
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#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
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# define DTCM_START 0x20000000
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# define DTCM_END 0x20020000
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#else
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# undef HAVE_DTCM_HEAP
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#endif
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@ -68,7 +69,7 @@
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* heap.
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*/
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#ifndef CONFIG_STM32_DTCMEXCLUDE
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#ifndef CONFIG_STM32F7_DTCMEXCLUDE
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# undef HAVE_DTCM_HEAP
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#endif
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@ -48,6 +48,7 @@
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#include <nuttx/arch.h>
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#include <nuttx/irq.h>
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#include <nuttx/time.h>
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#include "up_arch.h"
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