Low level UART support
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@196 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
76c2c7e07b
commit
e5f2158592
@ -40,6 +40,10 @@
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* Included Files
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************************************************************************************/
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Memory Map ***********************************************************************/
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#define LPC214X_FLASH_BASE 0x00000000
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@ -52,19 +56,50 @@
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/* Register block base addresses */
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#define LPC214X_UART0_BASE 0xe000c000 /* UART0 Base Address */
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#define LPC214X_UART1_BASE 0xe0010000 /* UART1 Base Address */
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#define LPC214X_PINSEL_BASE 0xc002c000 /* Pin funtion select registers */
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#define LPC214X_MAM_BASE 0xe01fc000 /* Memory Accelerator Module (MAM) Base Address */
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#define LPC214X_MEMMAP 0xe01fc040 /* Memory Mapping Control */
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#define LPC214X_PLL_BASE 0xe01fc080 /* Phase Locked Loop (PLL) Base Address */
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#define LPC214X_VPBDIV 0xe01fc100 /* VPBDIV Address */
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#define LPC214X_PINSEL2 0xe002c014 /* PINSEL2 Address */
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#define LPC214X_EMC_BASE 0xffe00000 /* External Memory Controller (EMC) Base Address */
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/* UART0/1 Register Offsets */
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#define LPC214X_RBR_OFFSET 0x00 /* R: Receive Buffer Register (DLAB=0) */
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#define LPC214X_THR_OFFSET 0x00 /* W: Transmit Holding Register (DLAB=0) */
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#define LPC214X_DLL_OFFSET 0x00 /* W: Divisor Latch Register (LSB) */
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#define LPC214X_IER_OFFSET 0x04 /* W: Interrupt Enable Register (DLAB=0) */
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#define LPC214X_DLM_OFFSET 0x04 /* R/W: Divisor Latch Register (MSB, DLAB=1) */
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#define LPC214X_IIR_OFFSET 0x08 /* R: Interrupt ID Register (DLAB=) */
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#define LPC214X_FCR_OFFSET 0x08 /* W: FIFO Control Register */
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#define LPC214X_LCR_OFFSET 0x0c /* R/W: Line Control Register */
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#define LPC214X_MCR_OFFSET 0x10 /* R/W: Modem Control REgister (2146/6/8 UART1 Only) */
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#define LPC214X_LSR_OFFSET 0x14 /* R: Scratch Pad Register */
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#define LPC214X_MSR_OFFSET 0x18 /* R/W: MODEM Status Register (2146/6/8 UART1 Only) */
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#define LPC214X_SCR_OFFSET 0x1c /* R/W: Line Status Register */
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#define LPC214X_ACR_OFFSET 0x20 /* R/W: Autobaud Control Register */
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#define LPC214X_FDR_OFFSET 0x28 /* R/W: Fractional Divider Register */
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#define LPC214X_TER_OFFSET 0x30 /* R/W: Transmit Enable Register */
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/* Pin function select register offsets */
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#define LPC214X_PINSEL0_OFFSET 0x00 /* Pin function select register 0 */
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#define LPC214X_PINSEL1_OFFSET 0x04 /* Pin function select register 1 */
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#define LPC214X_PINSEL2_OFFSET 0x14 /* Pin function select register 2 */
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/* Pin function select registers (these are normally referenced as offsets) */
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#define LPC214X_PINSEL0 (LPC214X_PINSEL_BASE + LPC214X_PINSEL0_OFFSET)
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#define LPC214X_PINSEL1 (LPC214X_PINSEL_BASE + LPC214X_PINSEL1_OFFSET)
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#define LPC214X_PINSEL2 (LPC214X_PINSEL_BASE + LPC214X_PINSEL2_OFFSET)
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/* Memory Accelerator Module (MAM) Regiser Offsets */
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#define LPC214X_MAMCR_OFFSET 0x00 /* MAM Control Offset*/
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#define LPC214x_MAMTIM_OFFSET 0x04 /* MAM Timing Offset */
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/* Phase Locked Loop (PLL) register offsets */
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/* Phase Locked Loop (PLL) Register Offsets */
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#define LPC214X_PLLCON_OFFSET 0x00 /* PLL Control Offset*/
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#define LPC214X_PLLCFG_OFFSET 0x04 /* PLL Configuration Offset */
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@ -73,14 +108,14 @@
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/* PLL Control Register Bit Settings */
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#define LPC214X_PLLCON_PLLE (1<<0) /* PLL Enable */
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#define LPC214X_PLLCON_PLLC (1<<1) /* PLL Connect */
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#define LPC214X_PLLCON_PLLE (1 <<0) /* PLL Enable */
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#define LPC214X_PLLCON_PLLC (1 <<1) /* PLL Connect */
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/* PLL Configuration Register Bit Settings */
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#define LPC214X_PLLCFG_MSEL (0x1f<<0) /* PLL Multiplier */
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#define LPC214X_PLLCFG_PSEL (0x03<<5) /* PLL Divider */
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#define LPC214X_PLLSTAT_PLOCK (1<<10) /* PLL Lock Status */
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#define LPC214X_PLLCFG_MSEL (0x1f << 0) /* PLL Multiplier */
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#define LPC214X_PLLCFG_PSEL (0x03 << 5) /* PLL Divider */
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#define LPC214X_PLLSTAT_PLOCK (1 << 10) /* PLL Lock Status */
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/* External Memory Controller (EMC) definitions */
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@ -89,10 +124,6 @@
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#define LPC214X_BCFG2_OFFSET 0x08 /* BCFG2 Offset */
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#define LPC214X_BCFG3_OFFSET 0x0c /* BCFG3 Offset */
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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@ -87,7 +87,10 @@
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* 156MHz <= Fcco <= 320MHz
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*/
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#define LPC214X_PLLCFG_VALUE 0x00000024
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#ifndef CONFIG_PLLCFG_VALUE /* Can be selected from config file */
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# define CONFIG_PLLCFG_VALUE 0x00000024
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#endif
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/* Memory Accelerator Module (MAM) initialization values
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*
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@ -108,8 +111,13 @@
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* 7 = 7
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*/
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#define LPC214X_MAMCR_VALUE 0x00000002
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#define LPC214x_MAMTIM_VALUE 0x00000004
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#ifndef CONFIG_MAMCR_VALUE /* Can be selected from config file */
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# define CONFIG_MAMCR_VALUE 0x00000002
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#endif
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#ifndef CONFIG_MAMTIM_VALUE /* Can be selected from config file */
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# define CONFIG_MAMTIM_VALUE 0x00000004
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#endif
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/* VPBDIV initialization values
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*
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@ -123,14 +131,18 @@
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* 2 = XCLK Pin = CPU Clock / 2
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*/
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#define LPC214X_VPBDIV_VALUE 0x00000001
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#ifndef CONFIG_VPBDIV_VALUE /* Can be selected from config file */
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# define CONFIG_VPBDIV_VALUE 0x00000001
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#endif
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/* External Memory Pins definitions
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*
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* CS0..3, OE, WE, BLS0..3, D0..31, A2..23, JTAG Pins
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*/
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#define LPC214X_PINSEL2_VALUE 0x0e6149e4
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#ifndef CONFIG_PINSEL2_VALUE /* Can be selected from config file */
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# define CONFIG_PINSEL2_VALUE 0x0e6149e4
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#endif
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/* External Memory Controller (EMC) initialization values
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*
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@ -144,10 +156,30 @@
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* BIT 28:29 MW: Memory Width (0=8-bit 1=16-bit 2=32-bit 3=Reserved)
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*/
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#define LPC214X_BCFG0_VALUE 0x0000fbef
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#define LPC214X_BCFG1_VALUE 0x0000fbef
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#define LPC214X_BCFG2_VALUE 0x0000fbef
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#define LPC214X_BCFG3_VALUE 0x0000fbef
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#ifndef CONFIG_BCFG0_VALUE /* Can be selected from config file */
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# define CONFIG_BCFG0_VALUE 0x0000fbef
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#endif
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#ifndef CONFIG_BCFG1_VALUE /* Can be selected from config file */
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# define CONFIG_BCFG1_VALUE 0x0000fbef
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#endif
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#ifndef CONFIG_BCFG2_VALUE /* Can be selected from config file */
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# define CONFIG_BCFG2_VALUE 0x0000fbef
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#endif
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#ifndef CONFIG_BCFG3_VALUE /* Can be selected from config file */
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# define CONFIG_BCFG3_VALUE 0x0000fbef
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#endif
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/* The following are used to configure the ADC/DAC */
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#ifndef CONFIG_AD0CR_VALUE
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# define CONFIG_AD0CR_VALUE 0x00200402; /* Setup A/D: 10-bit AIN0 @ 3MHz */
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#endif
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#ifndef CONFIG_PINSEL1_VALUE
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# define CONFIG_PINSEL1_VALUE 0x01000000; /* Enable DAC */
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#endif
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/********************************************************************
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* Macros
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@ -169,7 +201,7 @@
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.macro configpinsel2, base, val
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#ifdef CONFIG_EXTMEM_MODE
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ldr \base, =LPC214X_PINSEL2
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ldr \val, =LPC214X_PINSEL2_VALUE
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ldr \val, =CONFIG_PINSEL2_VALUE
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str \val, [\base]
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#endif
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.endm
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@ -181,22 +213,22 @@
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ldr \base, =LPC214X_EMC_BASE
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#ifdef CONFIG_BCFG0_SETUP
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ldr \val, =LPC214X_BCFG0_VALUE
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ldr \val, =CONFIG_BCFG0_VALUE
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str \val, [\base, #LPC214X_BCFG0_OFFSET]
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#endif
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#ifdef CONFIG_BCFG1_SETUP
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ldr \val, =LPC214X_BCFG1_VALUE
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ldr \val, =CONFIG_BCFG1_VALUE
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str \val, [\base, #LPC214X_BCFG1_OFFSET]
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#endif
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#ifdef CONFIG_BCFG2_SETUP
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ldr \val, =LPC214X_BCFG2_VALUE
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ldr \val, =CONFIG_BCFG2_VALUE
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str \val, [\base, #LPC214X_BCFG2_OFFSET]
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#endif
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#ifdef CONFIG_BCFG3_SETUP
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ldr \val, =LPC214X_BCFG3_VALUE
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ldr \val, =CONFIG_BCFG3_VALUE
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str \val, [\base, #LPC214X_BCFG3_OFFSET]
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#endif
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#endif
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@ -207,7 +239,7 @@
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.macro configvpbdiv, base, val
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#ifdef CONFIG_VPBDIV_SETUP
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ldr \base, =LPC214X_VPBDIV
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ldr \val, =LPC214X_VPBDIV_VALUE
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ldr \val, =CONFIG_VPBDIV_VALUE
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str \val, [\base]
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#endif
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.endm
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@ -222,7 +254,7 @@
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/* Configure and Enable PLL */
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mov \val3, #LPC214X_PLLCFG_VALUE
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mov \val3, #CONFIG_PLLCFG_VALUE
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str \val3, [\base, #LPC214X_PLLCFG_OFFSET]
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mov \val3, #LPC214X_PLLCON_PLLE
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str \val3, [\base, #LPC214X_PLLCON_OFFSET]
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@ -249,9 +281,9 @@
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.macro configmam, base, val
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#ifdef CONFIG_MAM_SETUP
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ldr \base, =LPC214X_MAM_BASE
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mov \val, #LPC214x_MAMTIM_VALUE
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mov \val, #CONFIG_MAMTIM_VALUE
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str \val, [\base, #LPC214x_MAMTIM_OFFSET]
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mov \val, #LPC214X_MAMCR_VALUE
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mov \val, #CONFIG_MAMCR_VALUE
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str \val, [\base, #LPC214X_MAMCR_OFFSET]
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#endif
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.endm
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@ -259,15 +291,27 @@
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/* Setup MEMMAP for the selected mode of operation */
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.macro configmemmap, base, val
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ldr r0, =LPC214X_MEMMAP
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ldr \base, =LPC214X_MEMMAP
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#if defined(CONFIG_EXTMEM_MODE)
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mov r1, #3
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mov \val, #3
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#elif defined(CONFIG_RAM_MODE)
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mov r1, #2
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mov \val, #2
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#else /* Setting the default should not be necessary */
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mov r1, #1
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mov \val, #1
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#endif
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str \val, [\base]
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.endm
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.macro configdac, base, tmp
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#ifdef CONFIG_ADC_SETUP
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ldr \base, =LPC214X_AD0CR
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ldr \tmp, =CONFIG_AD0CR_VALUE
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str \tmp, [\base]
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ldr \base,=LPC214X_PINSEL1
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ldr \tmp, =CONFIG_PINSEL1_VALUE
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str \tmp, [\base]
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#endif
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str r1, [r0]
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.endm
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/********************************************************************
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@ -368,7 +412,16 @@ __start:
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/* Setup MEMMAP for the selected mode of operation */
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configmemmap r0, r1
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/* Configure the DAC and ADC */
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configdac r0, r1
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/* Configure the uart so that we can get debug output as soon
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* as possible. Modifies r0, r1, r2, and r14.
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*/
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bl up_lowsetup
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showprogress 'A'
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/* Setup system stack (and get the BSS range) */
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@ -40,11 +40,70 @@
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#include <nuttx/config.h>
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#include "up_internal.h"
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#include "up_arch.h"
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#include "lpc214x_uart.h"
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/**************************************************************************
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* Private Definitions
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**************************************************************************/
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#if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define LPC214X_UART_BASE LPC214X_UART0_BASE
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# define LPC214X_UART_PINSEL LPC214X_UART0_PINSEL
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# define LPC214X_UART_PINMASK LPC214X_UART0_PINMASK
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# define LPC214X_UART_BAUD CONFIG_UART0_BAUD
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# define LPC214X_UART_BITS CONFIG_UART0_BITS
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# define LPC214X_UART_PARITY CONFIG_UART0_PARITY
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# ifdef CONFIG_UART0_2STOP
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# define LPC214X_UART_2STOP 1
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# endif
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define LPC214X_UART_BASE LPC214X_UART1_BASE
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# define LPC214X_UART_PINSEL LPC214X_UART1_PINSEL
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# define LPC214X_UART_PINMASK LPC214X_UART1_PINMASK
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# define LPC214X_UART_BAUD CONFIG_UART1_BAUD
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# define LPC214X_UART_BITS CONFIG_UART1_BITS
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# define LPC214X_UART_PARITY CONFIG_UART1_PARITY
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# ifdef CONFIG_UART1_2STOP
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# define LPC214X_UART_2STOP 1
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# endif
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#else
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# error "No CONFIG_UARTn_SERIAL_CONSOLE Setting"
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#endif
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#if LPC214X_UART_BITS == 5
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# define LPC214X_LCR_CHAR LPC214X_LCR_CHAR_5
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#elif LPC214X_UART_BITS == 6
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# define LPC214X_LCR_CHAR LPC214X_LCR_CHAR_6
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#elif LPC214X_UART_BITS == 7
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# define LPC214X_LCR_CHAR LPC214X_LCR_CHAR_7
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#elif LPC214X_UART_BITS == 8
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# define LPC214X_LCR_CHAR LPC214X_LCR_CHAR_8
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#else
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# error "No CONFIG_UARTn_BITS Setting"
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#endif
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#if LPC214X_UART_PARITY == 0
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# define LPC214X_LCR_PAR LPC214X_LCR_PAR_NONE
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#elif LPC214X_UART_PARITY == 1
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# define LPC214X_LCR_PAR LPC214X_LCR_PAR_ODD
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#elif LPC214X_UART_PARITY == 2
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# define LPC214X_LCR_PAR LPC214X_LCR_PAR_EVEN
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#elif LPC214X_UART_PARITY == 3
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# define LPC214X_LCR_PAR LPC214X_LCR_PAR_MARK
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#elif LPC214X_UART_PARITY == 4
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# define LPC214X_LCR_PAR LPC214X_LCR_PAR_SPACE
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#else
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# error "No CONFIG_UARTn_PARITY Setting"
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#endif
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#ifdef LPC214X_UART_2STOP
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# define LPC214X_LCR_STOP LPC214X_LCR_STOP_2
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#else
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# define LPC214X_LCR_STOP LPC214X_LCR_STOP_1
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#endif
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#define LPC214X_LCR_VALUE (LPC214X_LCR_CHAR | LPC214X_LCR_PAR | LPC214X_LCR_STOP)
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/**************************************************************************
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* Private Types
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**************************************************************************/
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@ -83,9 +142,61 @@
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.type up_lowputc, function
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up_lowputc:
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/* On entry, r0 holds the character to be printed */
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#warning "Not implemented"
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ldr r1, =LPC214X_UART_BASE
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strb r0, [r1, #LPC214X_THR_OFFSET]
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/* Wait for the byte to be transferred */
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1: ldr r0, [r1, #LPC214X_LSR_OFFSET]
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ands r0, #LPC214X_LSR_TEMT /* Transmitter empty */
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beq 1b
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/* And return */
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mov pc, lr
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.size up_lowputc, . - up_lowputc
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/* This performs basic initialization of the UART. This can be called very
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* early in initialization because it does not depend on having a stack. It
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* modifies r0-r2 and r14.
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*/
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.text
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.globl up_lowsetup
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.type up_lowsetup, function
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up_lowsetup:
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/* Configure PINSEL0 */
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ldr r0, =LPC214X_PINSEL0
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ldr r1, [r0]
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ldr r2, =LPC214X_UART_PINMASK
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and r1, r2
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ldr r2, =LPC214X_UART_PINSEL
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orr r1, r2
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str r1, [r0]
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/* Configure parity, data bits, stop bits and set DLAB=1 */
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ldr r0, =LPC214X_UART0_BASE
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mov r1, #(LPC214X_LCR_VALUE | LPC214X_LCR_DLAB_ENABLE)
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strb r1, [r0, #LPC214X_LCR_OFFSET]
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/* Set the BAUD divisor */
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mov r1, #(UART_BAUD(LPC214X_UART_BAUD) >> 8)
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strb r1, [r0, #LPC214X_DLM_OFFSET]
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mov r1, #(UART_BAUD(LPC214X_UART_BAUD) & 0xff)
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strb r1, [r0, #LPC214X_DLL_OFFSET]
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/* Clear DLAB */
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mov r1, #LPC214X_LCR_VALUE
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strb r1, [r0, #LPC214X_LCR_OFFSET]
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/* And return */
|
||||
|
||||
mov pc, lr
|
||||
.size up_lowsetup, . - up_lowsetup
|
||||
.end
|
||||
|
||||
141
arch/arm/src/lpc214x/lpc214x_uart.h
Executable file
141
arch/arm/src/lpc214x/lpc214x_uart.h
Executable file
@ -0,0 +1,141 @@
|
||||
/************************************************************************************
|
||||
* lpc214x/uart.h
|
||||
*
|
||||
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
#ifndef __LPC214X_UART_H
|
||||
#define __LPC214X_UART_H
|
||||
|
||||
/************************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
|
||||
#include <arch/board/board.h> /* For clock settings */
|
||||
|
||||
/************************************************************************************
|
||||
* Definitions
|
||||
************************************************************************************/
|
||||
|
||||
/* PINSEL0 bit definitions for UART0/1 */
|
||||
|
||||
#define LPC214X_UART0_PINSEL 0x00000005 /* PINSEL0 value for UART0 */
|
||||
#define LPC214X_UART0_PINMASK 0x0000000f /* PINSEL0 mask for UART0 */
|
||||
|
||||
#define LPC214X_UART1_PINSEL 0x00050000 /* PINSEL0 value for UART1 */
|
||||
#define LPC214X_UART1_PINMASK 0x000f0000 /* PINSEL0 mask for UART1 */
|
||||
|
||||
/* Derive baud divisor setting from clock settings (see board.h) */
|
||||
|
||||
#define UART_BAUD(baud) ((LPC214X_FOSC * LPC214X_PLL_M) / (baud * 16))
|
||||
|
||||
/* Interrupt Enable Register (IER) bit definitions */
|
||||
|
||||
#define LPC214X_IER_ERBFI (1 << 0) /* Enable receive data available int */
|
||||
#define LPC214X_IER_ETBEI (1 << 1) /* Enable THR empty Interrupt */
|
||||
#define LPC214X_IER_ELSI (1 << 2) /* Enable receive line status int */
|
||||
#define LPC214X_IER_EDSSI (1 << 3) /* Enable MODEM atatus interrupt */
|
||||
|
||||
/* Interrupt ID Register(IIR) bit definitions */
|
||||
|
||||
#define LPC214X_IIR_NO_INT (1 << 0) /* No interrupts pending */
|
||||
#define LPC214X_IIR_MS_INT (0 << 1) /* MODEM Status */
|
||||
#define LPC214X_IIR_THRE_INT (1 << 1) /* Transmit Holding Register Empty */
|
||||
#define LPC214X_IIR_RDA_INT (2 << 1) /* Receive Data Available */
|
||||
#define LPC214X_IIR_RLS_INT (3 << 1) /* Receive Line Status */
|
||||
#define LPC214X_IIR_CTI_INT (6 << 1) /* Character Timeout Indicator */
|
||||
#define LPC214X_IIR_MASK 0x0e
|
||||
|
||||
/* FIFO Control Register (FCR) bit definitions */
|
||||
|
||||
#define LPC214X_FCR_FIFO_ENABLE (1 << 0) /* FIFO wnable */
|
||||
#define LPC214X_FCR_RX_FIFO_RESET (1 << 1) /* Reset receive FIFO */
|
||||
#define LPC214X_FCR_TX_FIFO_RESET (1 << 2) /* Reset transmit FIFO */
|
||||
#define LPC214X_FCR_FIFO_TRIG1 (0 << 6) /* Trigger @1 character in FIFO */
|
||||
#define LPC214X_FCR_FIFO_TRIG4 (1 << 6) /* Trigger @4 characters in FIFO */
|
||||
#define LPC214X_FCR_FIFO_TRIG8 (2 << 6) /* Trigger @8 characters in FIFO */
|
||||
#define LPC214X_FCR_FIFO_TRIG14 (3 << 6) /* Trigger @14 characters in FIFO */
|
||||
|
||||
/* Line Control Register (LCR) bit definitions */
|
||||
|
||||
#define LPC214X_LCR_CHAR_5 (0 << 0) /* 5-bit character length */
|
||||
#define LPC214X_LCR_CHAR_6 (1 << 0) /* 6-bit character length */
|
||||
#define LPC214X_LCR_CHAR_7 (2 << 0) /* 7-bit character length */
|
||||
#define LPC214X_LCR_CHAR_8 (3 << 0) /* 8-bit character length */
|
||||
#define LPC214X_LCR_STOP_1 (0 << 2) /* 1 stop bit */
|
||||
#define LPC214X_LCR_STOP_2 (1 << 2) /* 2 stop bits */
|
||||
#define LPC214X_LCR_PAR_NONE (0 << 3) /* No parity */
|
||||
#define LPC214X_LCR_PAR_ODD (1 << 3) /* Odd parity */
|
||||
#define LPC214X_LCR_PAR_EVEN (3 << 3) /* Even parity */
|
||||
#define LPC214X_LCR_PAR_MARK (5 << 3) /* Mark "1" parity */
|
||||
#define LPC214X_LCR_PAR_SPACE (7 << 3) /* Space "0" parity */
|
||||
#define LPC214X_LCR_BREAK_ENABLE (1 << 6) /* Output BREAK */
|
||||
#define LPC214X_LCR_DLAB_ENABLE (1 << 7) /* Enable divisor latch access */
|
||||
|
||||
/* Modem Control Register (MCR) bit definitions */
|
||||
|
||||
#define LPC214X_MCR_DTR (1 << 0) /* Data terminal ready */
|
||||
#define LPC214X_MCR_RTS (1 << 1) /* Request to send */
|
||||
#define LPC214X_MCR_LB (1 << 4) /* Loopback */
|
||||
|
||||
/* Line Status Register (LSR) bit definitions */
|
||||
|
||||
#define LPC214X_LSR_RDR (1 << 0) /* Receive data ready */
|
||||
#define LPC214X_LSR_OE (1 << 1) /* Overrun error */
|
||||
#define LPC214X_LSR_PE (1 << 2) /* Parity error */
|
||||
#define LPC214X_LSR_FE (1 << 3) /* Framing error */
|
||||
#define LPC214X_LSR_BI (1 << 4) /* Break interrupt */
|
||||
#define LPC214X_LSR_THRE (1 << 5) /* THR empty */
|
||||
#define LPC214X_LSR_TEMT (1 << 6) /* Transmitter empty */
|
||||
#define LPC214X_LSR_RXFE (1 << 7) /* Error in receive FIFO */
|
||||
#define LPC214X_LSR_ERR_MASK 0x1e
|
||||
|
||||
/* Modem Status Register (MSR) bit definitions */
|
||||
|
||||
#define LPC214X_MSR_DCTS (1 << 0) /* Delta clear to send */
|
||||
#define LPC214X_MSR_DDSR (1 << 1) /* Delta data set ready */
|
||||
#define LPC214X_MSR_TERI (1 << 2) /* Trailing edge ring indicator */
|
||||
#define LPC214X_MSR_DDCD (1 << 3) /* Delta data carrier detect */
|
||||
#define LPC214X_MSR_CTS (1 << 4) /* Clear to send */
|
||||
#define LPC214X_MSR_DSR (1 << 5) /* Data set ready */
|
||||
#define LPC214X_MSR_RI (1 << 6) /* Ring indicator */
|
||||
#define LPC214X_MSR_DCD (1 << 7) /* Data carrier detect */
|
||||
|
||||
/************************************************************************************
|
||||
* Inline Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Global Function Prototypes
|
||||
************************************************************************************/
|
||||
|
||||
#endif /* __LPC214X_UART_H */
|
||||
Loading…
Reference in New Issue
Block a user