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stm32h7: Added basic support for STM32H753II. (#527)

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Co-authored-by: Андрей Заболотный <zapparello@ya.ru>
This commit is contained in:
Andrey Zabolotnyi 2020-03-10 17:55:18 +03:00 committed by GitHub
parent aa4052936c
commit e5f5509054
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GPG Key ID: 4AEE18F83AFDEB23
6 changed files with 13 additions and 5 deletions
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2
arch/arm/include/stm32h7/chip.h
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@ -62,7 +62,7 @@
* with CONFIG_STM32H7_FLASH_OVERRIDE_x
*/
#if defined(CONFIG_ARCH_CHIP_STM32H743ZI)
#if defined(CONFIG_ARCH_CHIP_STM32H743ZI) || defined(CONFIG_ARCH_CHIP_STM32H753II)
#elif defined(CONFIG_ARCH_CHIP_STM32H747XI)
#else
# error STM32 H7 chip not identified

8
arch/arm/src/stm32h7/Kconfig
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@ -28,6 +28,14 @@ config ARCH_CHIP_STM32H747XI
---help---
Dual core STM32 H7 Cortex M7+M4, 2048 FLASH, 1024K Kb SRAM
config ARCH_CHIP_STM32H753II
bool "STM32H753II"
select STM32H7_STM32H7X3XX
select STM32H7_FLASH_CONFIG_I
# TODO: IO_CONFIG
---help---
STM32 H7 Cortex M7, 2048 FLASH, 1024K Kb SRAM
endchoice # STM32 H7 Chip Selection
config STM32H7_STM32H7X3XX

2
arch/arm/src/stm32h7/hardware/stm32h7x3xx_gpio.h
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@ -399,5 +399,5 @@
#define GPIO_AFRH15_SHIFT (28)
#define GPIO_AFRH15_MASK (15 << GPIO_AFRH15_SHIFT)
#endif /* CONFIG_STM32H7_STM32H7X3XX */
#endif /* CONFIG_STM32H7_STM32H7X3XX || CONFIG_STM32H7_STM32H7X7XX */
#endif /* __ARCH_ARM_SRC_STM32H7_HARDWARE_STM32H7X3XX_GPIO_H */

2
arch/arm/src/stm32h7/hardware/stm32h7x3xx_pinmap.h
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@ -1540,5 +1540,5 @@
#define GPIO_UART8_TX_1 (GPIO_ALT|GPIO_AF8|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PULLUP|GPIO_PORTE|GPIO_PIN1)
#define GPIO_UART8_TX_2 (GPIO_ALT|GPIO_AF8|GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PULLUP|GPIO_PORTJ|GPIO_PIN8)
#endif /* CONFIG_STM32H7_STM32H7X3XX */
#endif /* CONFIG_STM32H7_STM32H7X3XX || CONFIG_STM32H7_STM32H7X7XX */
#endif /* __ARCH_ARM_SRC_STM32H7_HARDWARE_STM32H7X3XX_PINMAP_H */

2
arch/arm/src/stm32h7/hardware/stm32h7x3xx_uart.h
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@ -422,5 +422,5 @@
# define USART_PRESC_DIV128 (10 << USART_PRESC_SHIFT) /* Input clock divided by 128 */
# define USART_PRESC_DIV256 (11 << USART_PRESC_SHIFT) /* Input clock divided by 256 */
#endif /* CONFIG_STM32H7_STM32H7X3XX */
#endif /* CONFIG_STM32H7_STM32H7X3XX || CONFIG_STM32H7_STM32H7X7XX */
#endif /* __ARCH_ARM_SRC_STM32H7_HARDWARE_STM32H7X3XX_UART_H */

2
arch/arm/src/stm32h7/stm32_gpio.c
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@ -441,4 +441,4 @@ bool stm32_gpioread(uint32_t pinset)
return 0;
}
#endif /* CONFIG_STM32H7_STM32H7X3XX */
#endif /* CONFIG_STM32H7_STM32H7X3XX || CONFIG_STM32H7_STM32H7X7XX */