arch/arm/src/stm32h7/stm32_sdmmc.c: Fix wrong selection in modifying the conflict.
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@ -1526,17 +1526,6 @@ static void stm32_endtransfer(struct stm32_dev_s *priv,
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sdmmc_putreg32(priv, STM32_SDMMC_XFRDONE_ICR, STM32_SDMMC_ICR_OFFSET);
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#if defined(CONFIG_STM32H7_SDMMC_IDMA) && \
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!defined(CONFIG_ARCH_HAVE_SDIO_DELAYED_INVLDT)
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/* invalidate dcache in case of DMA receive. */
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if (priv->receivecnt)
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{
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up_invalidate_dcache((uintptr_t)priv->buffer,
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(uintptr_t)priv->buffer + priv->remaining);
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}
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#endif
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/* DMA debug instrumentation */
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stm32_sample(priv, SAMPLENDX_END_TRANSFER);
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@ -1748,7 +1737,7 @@ static int stm32_sdmmc_interrupt(int irq, void *context, void *arg)
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*/
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mcerr("ERROR: Data block CRC failure, remaining: %d\n",
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priv->remaining);
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priv->remaining);
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stm32_endtransfer(priv,
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SDIOWAIT_TRANSFERDONE | SDIOWAIT_ERROR);
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@ -3081,8 +3070,8 @@ static int stm32_dmapreflight(FAR struct sdio_dev_s *dev,
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(uintptr_t)buffer + buflen <= SRAM4_END))
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{
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mcerr("invalid IDMA address "
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"buffer:0x%08x end:0x%08x\n",
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buffer, buffer + buflen - 1);
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"buffer:0x%08x end:0x%08x\n",
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buffer, buffer + buflen - 1);
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return -EFAULT;
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}
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}
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@ -3101,8 +3090,8 @@ static int stm32_dmapreflight(FAR struct sdio_dev_s *dev,
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((uintptr_t)(buffer + buflen) & (ARMV7M_DCACHE_LINESIZE - 1)) != 0))
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{
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mcerr("dcache unaligned "
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"buffer:0x%08x end:0x%08x\n",
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buffer, buffer + buflen - 1);
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"buffer:0x%08x end:0x%08x\n",
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buffer, buffer + buflen - 1);
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return -EFAULT;
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}
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# endif
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