SAMA5 I2S: Driver is code complete, untested and subject to some rethinking
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@ -1402,7 +1402,8 @@ config SAMA5_SSC0_DATALEN
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int "Data width (bits)"
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default 16
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---help---
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Data width in bits.
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Data width in bits. This is a default value and may be change
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via the I2S interface
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config SAMA5_SSC0_RX
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bool "Enable I2C receiver"
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@ -1516,16 +1517,16 @@ endchoice # Receiver output clock
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endif # !SAMA5_SSC0_TX_TKINPUT
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endif # SAMA5_SSC0_TX
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config SAMA5_SSC0_MCKDIV_FREQUENCY
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config SAMA5_SSC0_MCKDIV_SAMPLERATE
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int "Internal transmitter clock frequency"
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default 100
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depends on SAMA5_SSC0_RX_MCKDIV || SAMA5_SSC0_TX_MCKDIV
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---help---
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If the either the receiver or transmitter clock is provided by MCK/2 divided
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down, then the target frequency must be provided. The SSC driver will
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determine the best divider to obtain that frequency (up to 4095). If the
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frequency is too low to be obtained by dividing down the MCK/2, a compile
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time error will occur.
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down, then the samplerate must be provided. The bitrate will be the product
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of the sample rate and the data width. The SSC driver will determine the best
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divider to obtain that bitrate (up to 4095). If the bitrate can be realized
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by dividing down the MCK/2, a compile time error will occur.
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endif # SAMA5_SSC0
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@ -1542,7 +1543,8 @@ config SAMA5_SSC1_DATALEN
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int "Data width (bits)"
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default 16
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---help---
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Data width in bits.
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Data width in bits. This is a default value and may be change
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via the I2S interface
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config SAMA5_SSC1_RX
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bool "Enable I2C receiver"
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@ -1656,16 +1658,16 @@ endchoice # Receiver output clock
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endif # !SAMA5_SSC1_TX_TKINPUT
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endif # SAMA5_SSC1_TX
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config SAMA5_SSC1_MCKDIV_FREQUENCY
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config SAMA5_SSC1_MCKDIV_SAMPLERATE
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int "Internal transmitter clock frequency"
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default 100
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depends on SAMA5_SSC1_RX_MCKDIV || SAMA5_SSC1_TX_MCKDIV
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---help---
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If the either the receiver or transmitter clock is provided by MCK/2 divided
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down, then the target frequency must be provided. The SSC driver will
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determine the best divider to obtain that frequency (up to 4095). If the
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frequency is too low to be obtained by dividing down the MCK/2, a compile
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time error will occur.
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down, then the samplerate must be provided. The bitrate will be the product
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of the sample rate and the data width. The SSC driver will determine the best
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divider to obtain that bitrate (up to 4095). If the bitrate can be realized
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by dividing down the MCK/2, a compile time error will occur.
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endif # SAMA5_SSC1
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