More lm3s6918 -- clocking + misc fixes

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1768 42af7a65-404d-4744-a932-0658087f49c3

configs/eagle100/include/board.h

@@ -51,7 +51,43 @@
 
 /* Clocking *************************************************************************/
 
-#define LM3X_ARM_CLK_FREQ    50000000  /* 50MHz */
+/* RCC settings */
+
+#define SYSCON_RCC_XTAL      SYSCON_RCC_XTAL8000KHZ /* Eagle100 on-board crystall is 8.00 MHz */
+#define XTAL_FREQUENCY       8000000
+
+/* Oscillator source is the main oscillator (not internal, internal/4, 30KHz or
+ * 30KHz from hibernate module) */
+
+#define SYSCON_RCC_OSCSRC    SYSCON_RCC_OSCSRC_MOSC
+#define SYSCON_RCC2_OSCSRC   SYSCON_RCC2_OSCSRC2_MOSC
+#define OSCSRC_FREQUENCY     XTAL_FREQUENCY
+
+/* Use system divider = 4; this corresponds to a system clock frequency
+ * of (400 / 2) / 4 = 50MHz
+ */
+
+#define LM3S_SYSDIV          4
+#define SYSCLK_FREQUENCY     50000000  /* 50MHz */
+
+/* Other RCC settings:
+ *
+ * - Main and internal oscillators enabled.
+ * - PLL and sys dividers not bypassed
+ * - PLL not powered down
+ * - No auto-clock gating reset
+ */
+
+#define LM3S_RCC_VALUE (SYSCON_RCC_OSCSRC | SYSCON_RCC_XTAL | SYSCON_RCC_USESYSDIV | SYSCON_RCC_SYSDIV(LM3S_SYSDIV))
+
+/* RCC2 settings -- RCC2 not used.  Other RCC2 settings
+ *
+ * - PLL and sys dividers not bypassed.
+ * - PLL not powered down
+ * - Not using RCC2
+ */
+
+#define LM3S_RCC2_VALUE (SYSCON_RCC2_OSCSRC | SYSCON_RCC2_SYSDIV(LM3S_SYSDIV))
 
 /* LED definitions ******************************************************************/
 

configs/eagle100/ostest/defconfig

@@ -180,7 +180,7 @@ CONFIG_HAVE_LIBM=n
 CONFIG_EXAMPLE=ostest
 CONFIG_DEBUG=n
 CONFIG_DEBUG_VERBOSE=n
-CONFIG_MM_REGIONS=2
+CONFIG_MM_REGIONS=1
 CONFIG_ARCH_LOWPUTC=y
 CONFIG_RR_INTERVAL=200
 CONFIG_SCHED_INSTRUMENTATION=n

configs/eagle100/ostest/ld.script

@@ -33,16 +33,23 @@
  *
  ****************************************************************************/
 
+/* The LM3S6918 has 256Kb of FLASH beginning at address 0x0000:0000. However,
+ * if the the Eagle100 Ethernet bootloader is used, then the entry point must
+ * be at the following offset in FLASH (and the size of the FLASH must be
+ * reduced to 248Kb):
+ */
+
+MEMORY
+{
+/*  flash (rx) : ORIGIN = 0x00000000, LENGTH = 256K */
+    flash (rx) : ORIGIN = 0x00002000, LENGTH = 248K
+    sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
+}
+
 OUTPUT_ARCH(arm)
 ENTRY(_stext)
 SECTIONS
 {
-	/* The LM3S6918 has 256Kb of FLASH beginning at address 0x0000:0000.
-	 * However, if the the tiny Eagle100 Ethernet bootloader is used, then
-	 * the entry point must be at the following offset:
-	 */
-
-	. = 0x00002000;
 	.text : {
 		_stext = ABSOLUTE(.);
 		*(.text)
@@ -53,27 +60,25 @@ SECTIONS
 		*(.glue_7t)
 		*(.got)			/* Global offset table		*/
 		_etext = ABSOLUTE(.);
-	}
+	} > flash
 
 	_eronly = ABSOLUTE(.);		/* See below                    */
-	. = ALIGN(4096);
 
 	/* The LM3S6918 has 64Kb of SRAM beginning at the following address */
 
-	. = 0x20000000;
 	.data : {
 		_sdata = ABSOLUTE(.);
 		*(.data)
 		CONSTRUCTORS
 		_edata = ABSOLUTE(.);
-	}
+	} > sram AT > flash
 
 	.bss : {			/* BSS				*/
 		_sbss = ABSOLUTE(.);
 		*(.bss)
 		*(COMMON)
 		_ebss = ABSOLUTE(.);
-	}
+	} > sram
 					/* Stabs debugging sections.	*/
 	.stab 0 : { *(.stab) }
 	.stabstr 0 : { *(.stabstr) }

configs/eagle100/src/up_leds.c

@@ -76,7 +76,7 @@ void up_ledinit(void)
 
   /* Configure Port E, Bit 1 as an output, initial value=OFF */
 
-  lm3s_configgpio(GPIO_DIR_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTE | 1);
+  lm3s_configgpio(GPIO_FUNC_OUTPUT | GPIO_VALUE_ZERO | GPIO_PORTE | 1);
 }
 
 /****************************************************************************