S32K146EVB cleanup
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@ -21,22 +21,36 @@ Status
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2019-08-20: For initial testing, I ran out of SRAM to avoid the
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brickage problems I had with the S32K118EVB (i.e., with
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CONFIG_BOOT_RUNFROMISRAM=y). In this mode, the NSH configuration
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appears worked correctly.
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appears to work correctly.
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2019-18-21: Writing a relocated version of that same functional binary
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2019-08-21: Writing a relocated version of that same functional binary
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into FLASH, however, did not work and, in fact, bricked my S32K146EVB.
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That is because the first version of the FLASH image that I used
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clobbered the FLASH Configuration bytes at address 0x0400 (I
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didn't even know about these!). I have since modified the linker script
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to skip this are in FLASH. There is some fragmentary discussion
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for recovery from this condition at: https://community.nxp.com/thread/505593 .
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But none of those options are working for me.
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Give the success running of SRAM and the success of the same fixes
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to skip this address in FLASH. There is some fragmentary discussion
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for recovery from this condition at the NXP Community Forums, but none of
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those options are working for me:
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https://community.nxp.com/thread/505593
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Given the success running from SRAM and the success of the same fixes
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on the S32K118, I believe that the NSH configuration should now run out
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of FLASH. Unfortunately, I cannot demonstrate that.
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TODO: Need calibrate the delay loop. The current value of
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2019-10-19: The NXP Mobile Robotics team has demonstrated that the basic
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NSH configuration runs out of FLASH without issues. The aforementioned
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fixes for the FLASH issues were converted into a set of FLASH
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configuration options, with a proven default state.
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2019-11-07: A s32k146.cfg configuration file (for OpenOCD) was added to
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the scripts/ folder.
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2020-06-15: Added FlexCAN driver with SocketCAN support to the S32K1XX
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arch. Should work also on the S32K146EVB board, but remains untested.
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2020-06-16: Added Emulated EEPROM driver and initialization.
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TODO: Need to calibrate the delay loop. The current value of
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CONFIG_BOARD_LOOPSPERMSEC is a bogus value retained from a copy-paste
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(see apps/examples/calib_udelay).
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@ -45,10 +59,10 @@ Serial Console
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By default, the serial console will be provided on the OpenSDA VCOM port:
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OpenSDA UART TX PTC7 (LPUART1_TX)
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OpenSDA UART RX PTC6 (LPUART1_RX)
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OpenSDA UART RX PTC6 (LPUART1_RX)
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OpenSDA UART TX PTC7 (LPUART1_TX)
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USB drivers for the PEMIcro CDC Serial port are available here:
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USB drivers for the PEmicro CDC Serial Port are available here:
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http://www.pemicro.com/opensda/
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LEDs and Buttons
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@ -58,17 +72,21 @@ LEDs and Buttons
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----
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The S32K146EVB has one RGB LED:
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RedLED PTD15 (FTM0 CH0)
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GreenLED PTD16 (FTM0 CH1)
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BlueLED PTD0 (FTM0 CH2)
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RedLED PTD15 (FTM0 CH0)
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GreenLED PTD16 (FTM0 CH1)
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BlueLED PTD0 (FTM0 CH2)
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An output of '1' illuminates the LED.
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If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
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any way. The following definitions are used to access individual RGB
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components.
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components (see s32k146evb.h):
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The RGB components could, alternatively be controlled through PWM using
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GPIO_LED_R
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GPIO_LED_G
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GPIO_LED_B
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The RGB components could, alternatively, be controlled through PWM using
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the common RGB LED driver.
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If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board
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@ -87,7 +105,7 @@ LEDs and Buttons
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LED_SIGNAL In a signal handler (no change)
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LED_ASSERTION An assertion failed (no change)
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LED_PANIC The system has crashed FLASH OFF OFF
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LED_IDLE S32K146EVB in sleep mode (no change)
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LED_IDLE S32K146 in sleep mode (no change)
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==========================================+========+========+=========
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Buttons
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@ -100,57 +118,58 @@ LEDs and Buttons
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OpenSDA Notes
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=============
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- USB drivers for the PEMIcro CDC Serial port are available here:
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- USB drivers for the PEmicro CDC Serial Port are available here:
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http://www.pemicro.com/opensda/
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- The drag'n'drog interface expects files in .srec format.
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- Using Segger J-Link: Easy... but remember to use the SWD J14 connector
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- Using Segger J-Link: Easy... but remember to use the SWD connector J14
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in the center of the board and not the OpenSDA connector closer to the
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OpenSDA USB connector J7.
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Thread-Aware Debugging with Eclipse
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===================================
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Based on correspondence with Han Raaijmakers <han.raaijmakers@nxp.com>
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Thread-aware debugging is possible with openocd-nuttx
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( https://github.com/sony/openocd-nuttx ) and was tested together with the
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Eclipse-based S32 Design Studio for Arm:
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https://www.nxp.com/design/software/development-software/s32-design-studio-ide/s32-design-studio-for-arm:S32DS-ARM
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OpenOCD-nuttx build on Linux (NXW00504) making use of S32DS for ARM 2018R1. NuttX is built with debug symbols.
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NOTE: This method was last tested with NuttX 8.2 and S32DS for Arm 2018.R1.
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It may not work anymore with recent releases of NuttX and/or S32DS.
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Resulting debug window gives nuttx threads. The full stack details can be viewed.
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1. NuttX should be build with debug symbols enabled.
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HOW TO GET THERE:
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2. Build OpenOCD as described here (using the same parameters as well):
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https://micro.ros.org/docs/tutorials/old/debugging/
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First we build openocd as described in:
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https://micro-ros.github.io/docs/tutorials/advanced/debugging_gdb_openocd/
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3. A s32k146.cfg file is available in the scripts/ folder. Start OpenOCD
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with the following command (adapt the path info):
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/usr/local/bin/openocd -f /usr/share/openocd/scripts/interface/jlink.cfg \
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-f boards/s32k1xx/s32k146evb/scripts/s32k146.cfg -c init -c "reset halt"
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The nuttx parameters where exactly the same as found on this page
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I've added a s32k146.cfg file in the scripts/ folder
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Start openocd with following command (adapt the path info)
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/usr/local/bin/openocd -f /usr/share/openocd/scripts/interface/jlink.cfg \
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-f /home/han/data1Ta/s32k146/openocd-nuttx/tcl/target/s32k146.cfg -c init -c "reset halt"
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4. Setup a GDB debug session in Eclipse. The resulting debug window shows
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the NuttX threads. The full stack details can be viewed.
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Configurations
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==============
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Common Information
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------------------
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Each S32K146EVB configuration is maintained in a sub-directory and
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can be selected as follow:
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Each S32K146EVB configuration is maintained in a sub-directory and can be
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selected as follows:
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tools/configure.sh s32k146evb:<subdir>
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Where <subdir> is one of the sub-directories listed in the next paragraph
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Where <subdir> is one of the sub-directories listed in the next paragraph.
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NOTES (common for all configurations):
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1. This configuration uses the mconf-based configuration tool. To
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change this configuration using that tool, you should:
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1. This configuration uses the mconf-based configuration tool. To change
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this configuration using that tool, you should:
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a. Build and install the kconfig-mconf tool. See nuttx/README.txt
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see additional README.txt files in the NuttX tools repository.
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a. Build and install the kconfig-mconf tool. See nuttx/README.txt.
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Also see additional README.txt files in the NuttX tools repository.
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b. Execute 'make menuconfig' in nuttx/ in order to start the
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reconfiguration process.
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@ -164,5 +183,5 @@ Configurations
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nsh:
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---
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Configures the NuttShell (nsh) located at apps/examples/nsh. Support
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for builtin applications is enabled, but in the base configuration but
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the builtin applications selected is the "Hello, World!" example.
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for builtin applications is enabled, but in the base configuration the
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only application selected is the "Hello, World!" example.
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@ -17,15 +17,13 @@ CONFIG_ARCH_CHIP_S32K146=y
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CONFIG_ARCH_CHIP_S32K14X=y
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CONFIG_ARCH_CHIP_S32K1XX=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_BOARD_LOOPSPERMSEC=3997
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CONFIG_BOARD_LOOPSPERMSEC=6667
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CONFIG_BUILTIN=y
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CONFIG_EXAMPLES_HELLO=y
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CONFIG_FS_PROCFS=y
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CONFIG_HAVE_CXX=y
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CONFIG_HAVE_CXXINITIALIZE=y
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CONFIG_LPUART1_RXBUFSIZE=64
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CONFIG_LPUART1_SERIAL_CONSOLE=y
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CONFIG_LPUART1_TXBUFSIZE=64
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CONFIG_MOTOROLA_SREC=y
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CONFIG_NSH_ARCHINIT=y
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CONFIG_NSH_BUILTIN_APPS=y
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@ -34,14 +32,14 @@ CONFIG_NSH_READLINE=y
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CONFIG_PREALLOC_TIMERS=4
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CONFIG_RAM_SIZE=126976
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CONFIG_RAM_START=0x1fff0000
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CONFIG_RAW_BINARY=y
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CONFIG_RR_INTERVAL=200
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CONFIG_S32K1XX_LPUART1=y
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CONFIG_SCHED_WAITPID=y
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CONFIG_SDCLONE_DISABLE=y
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CONFIG_START_DAY=18
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CONFIG_START_MONTH=8
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CONFIG_START_YEAR=2019
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CONFIG_STDIO_DISABLE_BUFFERING=y
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CONFIG_START_DAY=6
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CONFIG_START_MONTH=9
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CONFIG_START_YEAR=2021
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CONFIG_SYMTAB_ORDEREDBYNAME=y
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CONFIG_SYSTEM_NSH=y
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CONFIG_USER_ENTRYPOINT="nsh_main"
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@ -18,8 +18,8 @@
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_S32K146EVB_INCLUDE_BOARD_H
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#define __BOARDS_ARM_S32K146EVB_INCLUDE_BOARD_H
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#ifndef __BOARDS_ARM_S32K1XX_S32K146EVB_INCLUDE_BOARD_H
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#define __BOARDS_ARM_S32K1XX_S32K146EVB_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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@ -27,30 +27,25 @@
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include <stdbool.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* The S32K146EVB is fitted with a 8MHz Crystal */
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/* The S32K146EVB is fitted with a 8 MHz crystal */
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#define BOARD_XTAL_FREQUENCY 8000000
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#define BOARD_XTAL_FREQUENCY 8000000
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/* The S32K146 will run at 112MHz */
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/* The S32K146 will run at 80 MHz */
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/* LED definitions **********************************************************/
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/* The S32K146EVB has one RGB LED:
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*
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* RedLED PTD15 (FTM0 CH0)
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* GreenLED PTD16 (FTM0 CH1)
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* BlueLED PTD0 (FTM0 CH2)
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* RedLED PTD15 (FTM0 CH0)
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* GreenLED PTD16 (FTM0 CH1)
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* BlueLED PTD0 (FTM0 CH2)
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*
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* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
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* any way. The following definitions are used to access individual RGB
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@ -77,20 +72,20 @@
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* the S32K146EVB. The following definitions describe how NuttX controls the
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* LEDs:
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*
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* SYMBOL Meaning LED state
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* RED GREEN BLUE
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* ------------------- ---------------------------- -----------------
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* SYMBOL Meaning LED state
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* RED GREEN BLUE
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* ---------------- ----------------------------- -------------------
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*/
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#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */
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#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */
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#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */
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#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */
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#define LED_INIRQ 0 /* In an interrupt (no change) */
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#define LED_SIGNAL 0 /* In a signal handler (no change) */
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#define LED_ASSERTION 0 /* An assertion failed (no change) */
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#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */
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#undef LED_IDLE /* S32K146EVB in sleep mode (Not used) */
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#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */
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#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */
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#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */
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#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */
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#define LED_INIRQ 0 /* In an interrupt (No change) */
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#define LED_SIGNAL 0 /* In a signal handler (No change) */
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#define LED_ASSERTION 0 /* An assertion failed (No change) */
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#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */
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#undef LED_IDLE /* S32K146 is in sleep mode (Not used) */
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/* Button definitions *******************************************************/
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@ -100,50 +95,38 @@
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* SW3 PTC13
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*/
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#define BUTTON_SW2 0
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#define BUTTON_SW3 1
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#define NUM_BUTTONS 2
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#define BUTTON_SW2 0
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#define BUTTON_SW3 1
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#define NUM_BUTTONS 2
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#define BUTTON_SW2_BIT (1 << BUTTON_SW2)
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#define BUTTON_SW3_BIT (1 << BUTTON_SW3)
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/* Alternate function pin selections ****************************************/
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/* UART selections **********************************************************/
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/* By default, the serial console will be provided on the OpenSDA VCOM port:
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*
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* OpenSDA UART TX PTC7 (LPUART1_TX)
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* OpenSDA UART RX PTC6 (LPUART1_RX)
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* OpenSDA UART RX PTC6 (LPUART1_RX)
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* OpenSDA UART TX PTC7 (LPUART1_TX)
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*/
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#define PIN_LPUART0_RX PIN_LPUART0_RX_1 /* PTB0 */
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#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTB1 */
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#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */
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#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */
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#define PIN_LPUART2_RX PIN_LPUART2_RX_1 /* PTA8 */
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#define PIN_LPUART2_TX PIN_LPUART2_TX_1 /* PTA9 */
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#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */
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#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */
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/* SPI selections ***********************************************************/
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#define PIN_LPSPI0_SCK PIN_LPSPI0_SCK_2 /* PTB2 */
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#define PIN_LPSPI0_MISO PIN_LPSPI0_SIN_2 /* PTB3 */
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#define PIN_LPSPI0_MOSI PIN_LPSPI0_SOUT_3 /* PTB4 */
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#define PIN_LPSPI0_PCS PIN_LPSPI0_PCS0_1 /* PTB0 */
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/* UJA1169TK/F SBC SPI (LPSPI1) */
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#define PIN_LPSPI1_SCK PIN_LPSPI1_SCK_1 /* PTB14 */
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#define PIN_LPSPI1_MISO PIN_LPSPI1_SIN_1 /* PTB15 */
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#define PIN_LPSPI1_MOSI PIN_LPSPI1_SOUT_1 /* PTB16 */
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#define PIN_LPSPI1_PCS PIN_LPSPI1_PCS3 /* PTB17 */
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#define PIN_LPSPI1_SCK PIN_LPSPI1_SCK_2 /* PTB14 */
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#define PIN_LPSPI1_MISO PIN_LPSPI1_SIN_1 /* PTB15 */
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#define PIN_LPSPI1_MOSI PIN_LPSPI1_SOUT_2 /* PTB16 */
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#define PIN_LPSPI1_PCS PIN_LPSPI1_PCS3 /* PTB17 */
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#define PIN_LPSPI2_SCK PIN_LPSPI2_SCK_2 /* PTE15 */
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#define PIN_LPSPI2_MISO PIN_LPSPI2_SIN_2 /* PTE16 */
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#define PIN_LPSPI2_MOSI PIN_LPSPI2_SOUT_1 /* PTA8 */
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#define PIN_LPSPI2_PCS PIN_LPSPI2_PCS0_2 /* PTA9 */
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/* CAN selections ***********************************************************/
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/* I2C selections ***********************************************************/
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/* UJA1169TK/F SBC CAN (CAN0) */
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#define PIN_LPI2C0_SCL PIN_LPI2C0_SCL_2 /* PTA3 */
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#define PIN_LPI2C0_SDA PIN_LPI2C0_SDA_2 /* PTA2 */
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#define PIN_CAN0_RX PIN_CAN0_RX_4 /* PTE4 */
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#define PIN_CAN0_TX PIN_CAN0_TX_4 /* PTE5 */
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#endif /* __BOARDS_ARM_S32K146EVB_INCLUDE_BOARD_H */
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#endif /* __BOARDS_ARM_S32K1XX_S32K146EVB_INCLUDE_BOARD_H */
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@ -1,5 +1,5 @@
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#
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# NXP S32K146 - 1x ARM Cortex-M4 @ up to 180 MHz
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# NXP S32K146 - 1x ARM Cortex-M4 @ up to 112 MHz
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#
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adapter_khz 4000
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@ -23,20 +23,24 @@ include $(TOPDIR)/Make.defs
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CSRCS = s32k1xx_boot.c s32k1xx_bringup.c s32k1xx_clockconfig.c
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CSRCS += s32k1xx_periphclocks.c
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ifeq ($(CONFIG_ARCH_BUTTONS),y)
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CSRCS += s32k1xx_buttons.c
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endif
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ifeq ($(CONFIG_ARCH_LEDS),y)
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CSRCS += s32k1xx_autoleds.c
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else
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CSRCS += s32k1xx_userleds.c
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endif
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ifeq ($(CONFIG_ARCH_BUTTONS),y)
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CSRCS += s32k1xx_buttons.c
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endif
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ifeq ($(CONFIG_BOARDCTL),y)
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CSRCS += s32k1xx_appinit.c
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endif
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ifeq ($(CONFIG_S32K1XX_LPI2C),y)
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CSRCS += s32k1xx_i2c.c
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endif
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ifeq ($(CONFIG_S32K1XX_LPSPI),y)
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CSRCS += s32k1xx_spi.c
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endif
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@ -32,6 +32,7 @@
|
||||
|
||||
#include "hardware/s32k1xx_pinmux.h"
|
||||
#include "s32k1xx_periphclocks.h"
|
||||
#include "s32k1xx_pin.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
@ -43,16 +44,16 @@
|
||||
|
||||
/* LEDs. The S32K146EVB has one RGB LED:
|
||||
*
|
||||
* RedLED PTD15 (FTM0 CH0)
|
||||
* GreenLED PTD16 (FTM0 CH1)
|
||||
* BlueLED PTD0 (FTM0 CH2)
|
||||
* RedLED PTD15 (FTM0 CH0)
|
||||
* GreenLED PTD16 (FTM0 CH1)
|
||||
* BlueLED PTD0 (FTM0 CH2)
|
||||
*
|
||||
* An output of '1' illuminates the LED.
|
||||
*/
|
||||
|
||||
#define GPIO_LED_R (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO)
|
||||
#define GPIO_LED_G (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO)
|
||||
#define GPIO_LED_B (PIN_PTE8 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO)
|
||||
#define GPIO_LED_R (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO)
|
||||
#define GPIO_LED_G (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO)
|
||||
#define GPIO_LED_B (PIN_PTD0 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO)
|
||||
|
||||
/* Buttons. The S32K146EVB supports two buttons:
|
||||
*
|
||||
@ -60,19 +61,13 @@
|
||||
* SW3 PTC13
|
||||
*/
|
||||
|
||||
#define GPIO_SW2 (PIN_PTC12 | PIN_INT_BOTH)
|
||||
#define GPIO_SW3 (PIN_PTC13 | PIN_INT_BOTH)
|
||||
|
||||
/* SPI chip selects */
|
||||
#define GPIO_SW2 (PIN_PTC12 | PIN_INT_BOTH)
|
||||
#define GPIO_SW3 (PIN_PTC13 | PIN_INT_BOTH)
|
||||
|
||||
/* Count of peripheral clock user configurations */
|
||||
|
||||
#define NUM_OF_PERIPHERAL_CLOCKS_0 15
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
@ -104,17 +99,25 @@ extern const struct peripheral_clock_config_s g_peripheral_clockconfig0[];
|
||||
int s32k1xx_bringup(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: s32k1xx_spidev_initialize
|
||||
* Name: s32k1xx_i2cdev_initialize
|
||||
*
|
||||
* Description:
|
||||
* Called to configure SPI chip select GPIO pins for the S32K146EVB
|
||||
* board.
|
||||
* Initialize I2C driver and register /dev/i2cN devices.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_S32K1XX_SPI
|
||||
void s32k1xx_spidev_initialize(void);
|
||||
#endif
|
||||
int s32k1xx_i2cdev_initialize(void);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: s32k1xx_spidev_initialize
|
||||
*
|
||||
* Description:
|
||||
* Configure chip select pins, initialize the SPI driver and register
|
||||
* /dev/spiN devices.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int s32k1xx_spidev_initialize(void);
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __BOARDS_ARM_S32K1XX_S32K146EVB_SRC_S32K146EVB_H */
|
||||
|
@ -23,9 +23,10 @@
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include "s32k146evb.h"
|
||||
|
||||
/****************************************************************************
|
||||
@ -50,14 +51,14 @@
|
||||
*
|
||||
* Input Parameters:
|
||||
* arg - The boardctl() argument is passed to the board_app_initialize()
|
||||
* implementation without modification. The argument has no
|
||||
* meaning to NuttX; the meaning of the argument is a contract
|
||||
* between the board-specific initialization logic and the
|
||||
* matching application logic. The value could be such things as a
|
||||
* mode enumeration value, a set of DIP switch switch settings, a
|
||||
* pointer to configuration data read from a file or serial FLASH,
|
||||
* or whatever you would like to do with it. Every implementation
|
||||
* should accept zero/NULL as a default configuration.
|
||||
* implementation without modification. The argument has no meaning
|
||||
* to NuttX; the meaning of the argument is a contract between the
|
||||
* board-specific initialization logic and the matching application
|
||||
* logic. The value could be such things as a mode enumeration
|
||||
* value, a set of DIP switch settings, a pointer to configuration
|
||||
* data read from a file or serial FLASH, or whatever you would like
|
||||
* to do with it. Every implementation should accept zero/NULL as a
|
||||
* default configuration.
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero (OK) is returned on success; a negated errno value is returned on
|
||||
|
@ -20,28 +20,28 @@
|
||||
|
||||
/* The S32K146EVB has one RGB LED:
|
||||
*
|
||||
* RedLED PTD15 (FTM0 CH0)
|
||||
* GreenLED PTD16 (FTM0 CH1)
|
||||
* BlueLED PTD0 (FTM0 CH2)
|
||||
* RedLED PTD15 (FTM0 CH0)
|
||||
* GreenLED PTD16 (FTM0 CH1)
|
||||
* BlueLED PTD0 (FTM0 CH2)
|
||||
*
|
||||
* An output of '1' illuminates the LED.
|
||||
*
|
||||
* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board
|
||||
* the Freedom K66F. The following definitions describe how NuttX controls
|
||||
* the LEDs:
|
||||
* the S32K146EVB. The following definitions describe how NuttX controls the
|
||||
* LEDs:
|
||||
*
|
||||
* SYMBOL Meaning LED state
|
||||
* RED GREEN BLUE
|
||||
* ------------------- ----------------------- -----------------
|
||||
* LED_STARTED NuttX has been started OFF OFF OFF
|
||||
* LED_HEAPALLOCATE Heap has been allocated OFF OFF ON
|
||||
* LED_IRQSENABLED Interrupts enabled OFF OFF ON
|
||||
* LED_STACKCREATED Idle stack created OFF ON OFF
|
||||
* LED_INIRQ In an interrupt (no change)
|
||||
* LED_SIGNAL In a signal handler (no change)
|
||||
* LED_ASSERTION An assertion failed (no change)
|
||||
* LED_PANIC The system has crashed FLASH OFF OFF
|
||||
* LED_IDLE K66 is in sleep mode (Optional, not used)
|
||||
* SYMBOL Meaning LED state
|
||||
* RED GREEN BLUE
|
||||
* ---------------- ------------------------ --------------------
|
||||
* LED_STARTED NuttX has been started OFF OFF OFF
|
||||
* LED_HEAPALLOCATE Heap has been allocated OFF OFF ON
|
||||
* LED_IRQSENABLED Interrupts enabled OFF OFF ON
|
||||
* LED_STACKCREATED Idle stack created OFF ON OFF
|
||||
* LED_INIRQ In an interrupt (No change)
|
||||
* LED_SIGNAL In a signal handler (No change)
|
||||
* LED_ASSERTION An assertion failed (No change)
|
||||
* LED_PANIC The system has crashed FLASH OFF OFF
|
||||
* LED_IDLE S32K146 is in sleep mode (Optional, not used)
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
@ -52,18 +52,12 @@
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "arm_arch.h"
|
||||
#include "arm_internal.h"
|
||||
|
||||
#include "s32k1xx_pin.h"
|
||||
#include "s32k146evb.h"
|
||||
|
||||
#include <arch/board/board.h>
|
||||
#include "s32k146evb.h"
|
||||
|
||||
#ifdef CONFIG_ARCH_LEDS
|
||||
|
||||
@ -73,11 +67,11 @@
|
||||
|
||||
/* Summary of all possible settings */
|
||||
|
||||
#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */
|
||||
#define LED_OFF_OFF_OFF 1 /* LED_STARTED */
|
||||
#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */
|
||||
#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */
|
||||
#define LED_ON_OFF_OFF 4 /* LED_PANIC */
|
||||
#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */
|
||||
#define LED_OFF_OFF_OFF 1 /* LED_STARTED */
|
||||
#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */
|
||||
#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */
|
||||
#define LED_ON_OFF_OFF 4 /* LED_PANIC */
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
|
@ -23,9 +23,6 @@
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
|
||||
#include "s32k146evb.h"
|
||||
@ -48,7 +45,7 @@
|
||||
void s32k1xx_board_initialize(void)
|
||||
{
|
||||
#ifdef CONFIG_ARCH_LEDS
|
||||
/* Configure on-board LEDs if LED support has been selected. */
|
||||
/* Configure on-board LEDs if LED support has been selected */
|
||||
|
||||
board_autoled_initialize();
|
||||
#endif
|
||||
|
@ -25,10 +25,9 @@
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <stdint.h>
|
||||
#include <syslog.h>
|
||||
|
||||
#include <nuttx/fs/fs.h>
|
||||
|
||||
#ifdef CONFIG_INPUT_BUTTONS
|
||||
# include <nuttx/input/buttons.h>
|
||||
#endif
|
||||
@ -37,9 +36,12 @@
|
||||
# include <nuttx/leds/userled.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_I2C_DRIVER
|
||||
# include <nuttx/i2c/i2c_master.h>
|
||||
# include "s32k1xx_lpi2c.h"
|
||||
#ifdef CONFIG_FS_PROCFS
|
||||
# include <nuttx/fs/fs.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_S32K1XX_PROGMEM
|
||||
# include <nuttx/mtd/mtd.h>
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_S32K1XX_EEEPROM
|
||||
@ -100,48 +102,46 @@ int s32k1xx_bringup(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_S32K1XX_LPSPI
|
||||
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
|
||||
* function s32k1xx_spidev_initialize() has been brought into the link.
|
||||
*/
|
||||
|
||||
s32k1xx_spidev_initialize();
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_S32K1XX_LPI2C0) && defined(CONFIG_I2C_DRIVER)
|
||||
FAR struct i2c_master_s *i2c;
|
||||
|
||||
i2c = s32k1xx_i2cbus_initialize(0);
|
||||
if (i2c == NULL)
|
||||
{
|
||||
serr("ERROR: Failed to get I2C%d interface\n", bus);
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = i2c_register(i2c, 0);
|
||||
if (ret < 0)
|
||||
{
|
||||
serr("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
|
||||
s32k1xx_i2cbus_uninitialize(i2c);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_S32K1XX_PROGMEM
|
||||
FAR struct mtd_dev_s *mtd;
|
||||
int minor = 0;
|
||||
|
||||
mtd = progmem_initialize();
|
||||
if (!mtd)
|
||||
if (mtd == NULL)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: progmem_initialize failed\n");
|
||||
syslog(LOG_ERR, "ERROR: progmem_initialize() failed\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_S32K1XX_EEEPROM
|
||||
/* Register EEEPROM block device */
|
||||
|
||||
s32k1xx_eeeprom_register(0, 4096);
|
||||
ret = s32k1xx_eeeprom_register(0, 4096);
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: s32k1xx_eeeprom_register() failed\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_S32K1XX_LPI2C
|
||||
/* Initialize I2C driver */
|
||||
|
||||
ret = s32k1xx_i2cdev_initialize();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: s32k1xx_i2cdev_initialize() failed: %d\n",
|
||||
ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_S32K1XX_LPSPI
|
||||
/* Initialize SPI driver */
|
||||
|
||||
ret = s32k1xx_spidev_initialize();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "ERROR: s32k1xx_spidev_initialize() failed: %d\n",
|
||||
ret);
|
||||
}
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
|
@ -33,14 +33,14 @@
|
||||
#include <stdint.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include <nuttx/arch.h>
|
||||
#include <nuttx/board.h>
|
||||
|
||||
#include "s32k1xx_pin.h"
|
||||
#include "s32k146evb.h"
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "s32k146evb.h"
|
||||
|
||||
#ifdef CONFIG_ARCH_BUTTONS
|
||||
|
||||
/****************************************************************************
|
||||
@ -60,10 +60,11 @@
|
||||
|
||||
uint32_t board_button_initialize(void)
|
||||
{
|
||||
/* Configure the GPIO pins as interrupting inputs. */
|
||||
/* Configure the GPIO pins as interrupting inputs */
|
||||
|
||||
s32k1xx_pinconfig(GPIO_SW2);
|
||||
s32k1xx_pinconfig(GPIO_SW3);
|
||||
|
||||
return NUM_BUTTONS;
|
||||
}
|
||||
|
||||
@ -88,6 +89,7 @@ uint32_t board_buttons(void)
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_IRQBUTTONS
|
||||
/****************************************************************************
|
||||
* Button support.
|
||||
*
|
||||
@ -103,20 +105,19 @@ uint32_t board_buttons(void)
|
||||
* BUTTON_*_BIT definitions in board.h for the meaning of each bit.
|
||||
*
|
||||
* board_button_irq() may be called to register an interrupt handler that
|
||||
* will be called when a button is depressed or released. The ID value is
|
||||
* a button enumeration value that uniquely identifies a button resource.
|
||||
* will be called when a button is pressed or released. The ID value is a
|
||||
* button enumeration value that uniquely identifies a button resource.
|
||||
* See the BUTTON_* definitions in board.h for the meaning of enumeration
|
||||
* value.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_IRQBUTTONS
|
||||
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
|
||||
{
|
||||
uint32_t pinset;
|
||||
int ret;
|
||||
|
||||
/* Map the button id to the GPIO bit set. */
|
||||
/* Map the button id to the GPIO bit set */
|
||||
|
||||
if (id == BUTTON_SW2)
|
||||
{
|
||||
@ -147,5 +148,5 @@ int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_ARCH_IRQBUTTONS */
|
||||
#endif /* CONFIG_ARCH_BUTTONS */
|
||||
|
@ -58,11 +58,9 @@
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#include "s32k1xx_clockconfig.h"
|
||||
#include "s32k1xx_start.h"
|
||||
|
||||
#include "s32k146evb.h"
|
||||
|
||||
/****************************************************************************
|
||||
|
81
boards/arm/s32k1xx/s32k146evb/src/s32k1xx_i2c.c
Normal file
81
boards/arm/s32k1xx/s32k146evb/src/s32k1xx_i2c.c
Normal file
@ -0,0 +1,81 @@
|
||||
/****************************************************************************
|
||||
* boards/arm/s32k1xx/s32k146evb/src/s32k1xx_i2c.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/compiler.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <stdint.h>
|
||||
#include <errno.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/i2c/i2c_master.h>
|
||||
|
||||
#include "s32k1xx_lpi2c.h"
|
||||
|
||||
#include "s32k146evb.h"
|
||||
|
||||
#ifdef CONFIG_S32K1XX_LPI2C
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: s32k1xx_i2cdev_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize I2C driver and register /dev/i2cN devices.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int weak_function s32k1xx_i2cdev_initialize(void)
|
||||
{
|
||||
int ret = OK;
|
||||
|
||||
#if defined(CONFIG_S32K1XX_LPI2C0) && defined(CONFIG_I2C_DRIVER)
|
||||
/* LPI2C0 *****************************************************************/
|
||||
|
||||
/* Initialize the I2C driver for LPI2C0 */
|
||||
|
||||
struct i2c_master_s *lpi2c0 = s32k1xx_i2cbus_initialize(0);
|
||||
if (lpi2c0 == NULL)
|
||||
{
|
||||
i2cerr("ERROR: FAILED to initialize LPI2C0\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ret = i2c_register(lpi2c0, 0);
|
||||
if (ret < 0)
|
||||
{
|
||||
i2cerr("ERROR: FAILED to register LPI2C0 driver\n");
|
||||
s32k1xx_i2cbus_uninitialize(lpi2c0);
|
||||
return ret;
|
||||
}
|
||||
#endif /* CONFIG_S32K1XX_LPI2C0 && CONFIG_I2C_DRIVER */
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_S32K1XX_LPSPI */
|
@ -58,7 +58,9 @@
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "s32k14x/s32k14x_clocknames.h"
|
||||
#include "s32k1xx_periphclocks.h"
|
||||
|
||||
#include "s32k146evb.h"
|
||||
|
||||
/****************************************************************************
|
||||
@ -73,7 +75,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] =
|
||||
{
|
||||
{
|
||||
.clkname = FLEXCAN0_CLK,
|
||||
#ifdef CONFIG_S32K1XX_FLEXCAN
|
||||
#ifdef CONFIG_S32K1XX_FLEXCAN0
|
||||
.clkgate = true,
|
||||
#else
|
||||
.clkgate = false,
|
||||
@ -81,7 +83,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] =
|
||||
},
|
||||
{
|
||||
.clkname = FLEXCAN1_CLK,
|
||||
#ifdef CONFIG_S32K1XX_FLEXCAN
|
||||
#ifdef CONFIG_S32K1XX_FLEXCAN1
|
||||
.clkgate = true,
|
||||
#else
|
||||
.clkgate = false,
|
||||
@ -89,7 +91,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] =
|
||||
},
|
||||
{
|
||||
.clkname = FLEXCAN2_CLK,
|
||||
#ifdef CONFIG_S32K1XX_FLEXCAN
|
||||
#ifdef CONFIG_S32K1XX_FLEXCAN2
|
||||
.clkgate = true,
|
||||
#else
|
||||
.clkgate = false,
|
||||
|
@ -23,7 +23,9 @@
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/compiler.h>
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <errno.h>
|
||||
@ -31,17 +33,15 @@
|
||||
|
||||
#include <nuttx/spi/spi.h>
|
||||
#include <nuttx/spi/spi_transfer.h>
|
||||
|
||||
#include "s32k1xx_pin.h"
|
||||
#include "s32k1xx_lpspi.h"
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "arm_arch.h"
|
||||
|
||||
#include "s32k1xx_config.h"
|
||||
#include "s32k1xx_lpspi.h"
|
||||
#include "s32k1xx_pin.h"
|
||||
#include "s32k146evb.h"
|
||||
|
||||
#if defined(CONFIG_S32K1XX_LPSPI0) || defined(CONFIG_S32K1XX_LPSPI1) || \
|
||||
defined(CONFIG_S32K1XX_LPSPI2)
|
||||
#ifdef CONFIG_S32K1XX_LPSPI
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
@ -51,80 +51,115 @@
|
||||
* Name: s32k1xx_spidev_initialize
|
||||
*
|
||||
* Description:
|
||||
* Called to configure SPI chip select GPIO pins for the S32K144EVB board.
|
||||
* Configure chip select pins, initialize the SPI driver and register
|
||||
* /dev/spiN devices.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void weak_function s32k1xx_spidev_initialize(void)
|
||||
int weak_function s32k1xx_spidev_initialize(void)
|
||||
{
|
||||
int ret = OK;
|
||||
|
||||
#ifdef CONFIG_S32K1XX_LPSPI0
|
||||
/* LPSPI0 *****************************************************************/
|
||||
|
||||
/* Configure LPSPI0 peripheral chip select */
|
||||
|
||||
s32k1xx_pinconfig(PIN_LPSPI0_PCS);
|
||||
|
||||
#ifdef CONFIG_SPI_DRIVER
|
||||
struct spi_dev_s *g_lpspi0;
|
||||
g_lpspi0 = s32k1xx_lpspibus_initialize(0);
|
||||
# ifdef CONFIG_SPI_DRIVER
|
||||
/* Initialize the SPI driver for LPSPI0 */
|
||||
|
||||
if (!g_lpspi0)
|
||||
struct spi_dev_s *g_lpspi0 = s32k1xx_lpspibus_initialize(0);
|
||||
if (g_lpspi0 == NULL)
|
||||
{
|
||||
spierr("ERROR: [boot] FAILED to initialize LPSPI0\n");
|
||||
spierr("ERROR: FAILED to initialize LPSPI0\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
spi_register(g_lpspi0, 0);
|
||||
#endif
|
||||
#endif
|
||||
ret = spi_register(g_lpspi0, 0);
|
||||
if (ret < 0)
|
||||
{
|
||||
spierr("ERROR: FAILED to register LPSPI0 driver\n");
|
||||
return ret;
|
||||
}
|
||||
# endif /* CONFIG_SPI_DRIVER */
|
||||
#endif /* CONFIG_S32K1XX_LPSPI0 */
|
||||
|
||||
#ifdef CONFIG_S32K1XX_LPSPI1
|
||||
/* LPSPI1 *****************************************************************/
|
||||
|
||||
/* Configure LPSPI1 peripheral chip select */
|
||||
|
||||
s32k1xx_pinconfig(PIN_LPSPI1_PCS);
|
||||
|
||||
#ifdef CONFIG_SPI_DRIVER
|
||||
struct spi_dev_s *g_lpspi1;
|
||||
g_lpspi1 = s32k1xx_lpspibus_initialize(1);
|
||||
# ifdef CONFIG_SPI_DRIVER
|
||||
/* Initialize the SPI driver for LPSPI1 */
|
||||
|
||||
if (!g_lpspi1)
|
||||
struct spi_dev_s *g_lpspi1 = s32k1xx_lpspibus_initialize(1);
|
||||
if (g_lpspi1 == NULL)
|
||||
{
|
||||
spierr("ERROR: [boot] FAILED to initialize LPSPI1\n");
|
||||
spierr("ERROR: FAILED to initialize LPSPI1\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
spi_register(g_lpspi1, 1);
|
||||
#endif
|
||||
#endif
|
||||
ret = spi_register(g_lpspi1, 1);
|
||||
if (ret < 0)
|
||||
{
|
||||
spierr("ERROR: FAILED to register LPSPI1 driver\n");
|
||||
return ret;
|
||||
}
|
||||
# endif /* CONFIG_SPI_DRIVER */
|
||||
#endif /* CONFIG_S32K1XX_LPSPI1 */
|
||||
|
||||
#ifdef CONFIG_S32K1XX_LPSPI2
|
||||
/* LPSPI2 *****************************************************************/
|
||||
|
||||
/* Configure LPSPI2 peripheral chip select */
|
||||
|
||||
s32k1xx_pinconfig(PIN_LPSPI2_PCS);
|
||||
|
||||
#ifdef CONFIG_SPI_DRIVER
|
||||
struct spi_dev_s *g_lpspi2;
|
||||
g_lpspi2 = s32k1xx_lpspibus_initialize(2);
|
||||
# ifdef CONFIG_SPI_DRIVER
|
||||
/* Initialize the SPI driver for LPSPI2 */
|
||||
|
||||
if (!g_lpspi2)
|
||||
struct spi_dev_s *g_lpspi2 = s32k1xx_lpspibus_initialize(2);
|
||||
if (g_lpspi2 == NULL)
|
||||
{
|
||||
spierr("ERROR: [boot] FAILED to initialize LPSPI2\n");
|
||||
spierr("ERROR: FAILED to initialize LPSPI2\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
spi_register(g_lpspi2, 2);
|
||||
#endif
|
||||
#endif
|
||||
ret = spi_register(g_lpspi2, 2);
|
||||
if (ret < 0)
|
||||
{
|
||||
spierr("ERROR: FAILED to register LPSPI2 driver\n");
|
||||
return ret;
|
||||
}
|
||||
# endif /* CONFIG_SPI_DRIVER */
|
||||
#endif /* CONFIG_S32K1XX_LPSPI2 */
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: s32k1xx_lpspi0/1/2select and s32k1xx_lpspi0/1/2status
|
||||
* Name: s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus
|
||||
*
|
||||
* Description:
|
||||
* The external functions, s32k1xx_lpspi0/1/2select and
|
||||
* s32k1xx_lpspi0/1/2status must be provided by board-specific logic.
|
||||
* They are implementations of the select and status methods of the SPI
|
||||
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
|
||||
* All other methods (including s32k1xx_lpspibus_initialize()) are provided
|
||||
* by common logic. To use this common SPI logic on your board:
|
||||
* The external functions, s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus
|
||||
* must be provided by board-specific logic. They are implementations of
|
||||
* the select and status methods of the SPI interface defined by struct
|
||||
* spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
|
||||
* s32k1xx_lpspibus_initialize()) are provided by common logic. To use
|
||||
* this common SPI logic on your board:
|
||||
*
|
||||
* 1. Provide logic in s32k1xx_boardinitialize() to configure SPI chip
|
||||
* select pins.
|
||||
* 2. Provide s32k1xx_lpspi0/1/2select() and s32k1xx_lpspi0/1/2status()
|
||||
* functions in your board-specific logic. These functions will perform
|
||||
* chip selection and status operations using GPIOs in the way your
|
||||
* board is configured.
|
||||
* 2. Provide s32k1xx_lpspiNselect() and s32k1xx_lpspiNstatus() functions
|
||||
* in your board-specific logic. These functions will perform chip
|
||||
* selection and status operations using GPIOs in the way your board is
|
||||
* configured.
|
||||
* 3. Add a calls to s32k1xx_lpspibus_initialize() in your low level
|
||||
* application initialization logic
|
||||
* application initialization logic.
|
||||
* 4. The handle returned by s32k1xx_lpspibus_initialize() may then be used
|
||||
* to bind the SPI driver to higher level logic (e.g., calling
|
||||
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
|
||||
@ -133,10 +168,12 @@ void weak_function s32k1xx_spidev_initialize(void)
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_S32K1XX_LPSPI0
|
||||
/* LPSPI0 *******************************************************************/
|
||||
|
||||
void s32k1xx_lpspi0select(FAR struct spi_dev_s *dev, uint32_t devid,
|
||||
bool selected)
|
||||
bool selected)
|
||||
{
|
||||
spiinfo("devid: %d CS: %s\n", (int)devid,
|
||||
spiinfo("devid: %" PRId32 ", CS: %s\n", devid,
|
||||
selected ? "assert" : "de-assert");
|
||||
|
||||
s32k1xx_gpiowrite(PIN_LPSPI0_PCS, !selected);
|
||||
@ -146,13 +183,15 @@ uint8_t s32k1xx_lpspi0status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_S32K1XX_LPSPI0 */
|
||||
|
||||
#ifdef CONFIG_S32K1XX_LPSPI1
|
||||
void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev,
|
||||
uint32_t devid, bool selected)
|
||||
/* LPSPI1 *******************************************************************/
|
||||
|
||||
void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, uint32_t devid,
|
||||
bool selected)
|
||||
{
|
||||
spiinfo("devid: %d CS: %s\n", (int)devid,
|
||||
spiinfo("devid: %" PRId32 ", CS: %s\n", devid,
|
||||
selected ? "assert" : "de-assert");
|
||||
|
||||
s32k1xx_gpiowrite(PIN_LPSPI1_PCS, !selected);
|
||||
@ -162,14 +201,16 @@ uint8_t s32k1xx_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
#endif /* CONFIG_S32K1XX_LPSPI1 */
|
||||
|
||||
#ifdef CONFIG_S32K1XX_LPSPI2
|
||||
void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev,
|
||||
uint32_t devid, bool selected)
|
||||
/* LPSPI2 *******************************************************************/
|
||||
|
||||
void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev, uint32_t devid,
|
||||
bool selected)
|
||||
{
|
||||
spiinfo("devid: %d CS: %s\n", (int)devid,
|
||||
selected ? "assert" : "de-assert");
|
||||
spiinfo("devid: %" PRId32 ", CS: %s\n", devid,
|
||||
selected ? "assert" : "de-assert");
|
||||
|
||||
s32k1xx_gpiowrite(PIN_LPSPI2_PCS, !selected);
|
||||
}
|
||||
@ -178,6 +219,5 @@ uint8_t s32k1xx_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_S32K1XX_LPSPI0 || CONFIG_S32K1XX_LPSPI01 || CONFIG_S32K1XX_LPSPI2 */
|
||||
#endif /* CONFIG_S32K1XX_LPSPI2 */
|
||||
#endif /* CONFIG_S32K1XX_LPSPI */
|
||||
|
@ -26,18 +26,15 @@
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/board.h>
|
||||
|
||||
#include "arm_arch.h"
|
||||
#include "arm_internal.h"
|
||||
|
||||
#include "s32k1xx_pin.h"
|
||||
#include "s32k146evb.h"
|
||||
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "s32k146evb.h"
|
||||
|
||||
#ifndef CONFIG_ARCH_LEDS
|
||||
|
||||
/****************************************************************************
|
||||
@ -55,6 +52,7 @@ uint32_t board_userled_initialize(void)
|
||||
s32k1xx_pinconfig(GPIO_LED_R);
|
||||
s32k1xx_pinconfig(GPIO_LED_G);
|
||||
s32k1xx_pinconfig(GPIO_LED_B);
|
||||
|
||||
return BOARD_NLEDS;
|
||||
}
|
||||
|
||||
@ -83,7 +81,7 @@ void board_userled(int led, bool ledon)
|
||||
return;
|
||||
}
|
||||
|
||||
s32k1xx_gpiowrite(ledcfg, ledon); /* High illuminates */
|
||||
s32k1xx_gpiowrite(ledcfg, ledon);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
@ -92,8 +90,6 @@ void board_userled(int led, bool ledon)
|
||||
|
||||
void board_userled_all(uint32_t ledset)
|
||||
{
|
||||
/* Low illuminates */
|
||||
|
||||
s32k1xx_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) != 0);
|
||||
s32k1xx_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) != 0);
|
||||
s32k1xx_gpiowrite(GPIO_LED_B, (ledset & BOARD_LED_B_BIT) != 0);
|
||||
|
Loading…
Reference in New Issue
Block a user