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S32K146EVB cleanup

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This commit is contained in:
Jari van Ewijk 2021-09-14 17:44:59 +02:00 committed by Xiang Xiao
parent 02a84469a4
commit e7ee848466
16 changed files with 405 additions and 288 deletions
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93
boards/arm/s32k1xx/s32k146evb/README.txt
View File

@ -21,22 +21,36 @@ Status
2019-08-20: For initial testing, I ran out of SRAM to avoid the 2019-08-20: For initial testing, I ran out of SRAM to avoid the
brickage problems I had with the S32K118EVB (i.e., with brickage problems I had with the S32K118EVB (i.e., with
CONFIG_BOOT_RUNFROMISRAM=y). In this mode, the NSH configuration CONFIG_BOOT_RUNFROMISRAM=y). In this mode, the NSH configuration
appears worked correctly. appears to work correctly.
2019-18-21: Writing a relocated version of that same functional binary 2019-08-21: Writing a relocated version of that same functional binary
into FLASH, however, did not work and, in fact, bricked my S32K146EVB. into FLASH, however, did not work and, in fact, bricked my S32K146EVB.
That is because the first version of the FLASH image that I used That is because the first version of the FLASH image that I used
clobbered the FLASH Configuration bytes at address 0x0400 (I clobbered the FLASH Configuration bytes at address 0x0400 (I
didn't even know about these!). I have since modified the linker script didn't even know about these!). I have since modified the linker script
to skip this are in FLASH. There is some fragmentary discussion to skip this address in FLASH. There is some fragmentary discussion
for recovery from this condition at: https://community.nxp.com/thread/505593 . for recovery from this condition at the NXP Community Forums, but none of
But none of those options are working for me. those options are working for me:
https://community.nxp.com/thread/505593
Give the success running of SRAM and the success of the same fixes Given the success running from SRAM and the success of the same fixes
on the S32K118, I believe that the NSH configuration should now run out on the S32K118, I believe that the NSH configuration should now run out
of FLASH. Unfortunately, I cannot demonstrate that. of FLASH. Unfortunately, I cannot demonstrate that.
TODO: Need calibrate the delay loop. The current value of 2019-10-19: The NXP Mobile Robotics team has demonstrated that the basic
NSH configuration runs out of FLASH without issues. The aforementioned
fixes for the FLASH issues were converted into a set of FLASH
configuration options, with a proven default state.
2019-11-07: A s32k146.cfg configuration file (for OpenOCD) was added to
the scripts/ folder.
2020-06-15: Added FlexCAN driver with SocketCAN support to the S32K1XX
arch. Should work also on the S32K146EVB board, but remains untested.
2020-06-16: Added Emulated EEPROM driver and initialization.
TODO: Need to calibrate the delay loop. The current value of
CONFIG_BOARD_LOOPSPERMSEC is a bogus value retained from a copy-paste CONFIG_BOARD_LOOPSPERMSEC is a bogus value retained from a copy-paste
(see apps/examples/calib_udelay). (see apps/examples/calib_udelay).
@ -45,10 +59,10 @@ Serial Console
By default, the serial console will be provided on the OpenSDA VCOM port: By default, the serial console will be provided on the OpenSDA VCOM port:
OpenSDA UART TX PTC7 (LPUART1_TX)
OpenSDA UART RX PTC6 (LPUART1_RX) OpenSDA UART RX PTC6 (LPUART1_RX)
OpenSDA UART TX PTC7 (LPUART1_TX)
USB drivers for the PEMIcro CDC Serial port are available here: USB drivers for the PEmicro CDC Serial Port are available here:
http://www.pemicro.com/opensda/ http://www.pemicro.com/opensda/
LEDs and Buttons LEDs and Buttons
@ -66,9 +80,13 @@ LEDs and Buttons
If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
any way. The following definitions are used to access individual RGB any way. The following definitions are used to access individual RGB
components. components (see s32k146evb.h):
The RGB components could, alternatively be controlled through PWM using GPIO_LED_R
GPIO_LED_G
GPIO_LED_B
The RGB components could, alternatively, be controlled through PWM using
the common RGB LED driver. the common RGB LED driver.
If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board
@ -87,7 +105,7 @@ LEDs and Buttons
LED_SIGNAL In a signal handler (no change) LED_SIGNAL In a signal handler (no change)
LED_ASSERTION An assertion failed (no change) LED_ASSERTION An assertion failed (no change)
LED_PANIC The system has crashed FLASH OFF OFF LED_PANIC The system has crashed FLASH OFF OFF
LED_IDLE S32K146EVB in sleep mode (no change) LED_IDLE S32K146 in sleep mode (no change)
==========================================+========+========+========= ==========================================+========+========+=========
Buttons Buttons
@ -100,57 +118,58 @@ LEDs and Buttons
OpenSDA Notes OpenSDA Notes
============= =============
- USB drivers for the PEMIcro CDC Serial port are available here: - USB drivers for the PEmicro CDC Serial Port are available here:
http://www.pemicro.com/opensda/ http://www.pemicro.com/opensda/
- The drag'n'drog interface expects files in .srec format. - The drag'n'drog interface expects files in .srec format.
- Using Segger J-Link: Easy... but remember to use the SWD J14 connector - Using Segger J-Link: Easy... but remember to use the SWD connector J14
in the center of the board and not the OpenSDA connector closer to the in the center of the board and not the OpenSDA connector closer to the
OpenSDA USB connector J7. OpenSDA USB connector J7.
Thread-Aware Debugging with Eclipse Thread-Aware Debugging with Eclipse
=================================== ===================================
Based on correspondence with Han Raaijmakers <han.raaijmakers@nxp.com> Thread-aware debugging is possible with openocd-nuttx
( https://github.com/sony/openocd-nuttx ) and was tested together with the
Eclipse-based S32 Design Studio for Arm:
https://www.nxp.com/design/software/development-software/s32-design-studio-ide/s32-design-studio-for-arm:S32DS-ARM
OpenOCD-nuttx build on Linux (NXW00504) making use of S32DS for ARM 2018R1. NuttX is built with debug symbols. NOTE: This method was last tested with NuttX 8.2 and S32DS for Arm 2018.R1.
It may not work anymore with recent releases of NuttX and/or S32DS.
Resulting debug window gives nuttx threads. The full stack details can be viewed. 1. NuttX should be build with debug symbols enabled.
HOW TO GET THERE: 2. Build OpenOCD as described here (using the same parameters as well):
https://micro.ros.org/docs/tutorials/old/debugging/
First we build openocd as described in:
https://micro-ros.github.io/docs/tutorials/advanced/debugging_gdb_openocd/
The nuttx parameters where exactly the same as found on this page
I've added a s32k146.cfg file in the scripts/ folder
Start openocd with following command (adapt the path info)
3. A s32k146.cfg file is available in the scripts/ folder. Start OpenOCD
with the following command (adapt the path info):
/usr/local/bin/openocd -f /usr/share/openocd/scripts/interface/jlink.cfg \ /usr/local/bin/openocd -f /usr/share/openocd/scripts/interface/jlink.cfg \
-f /home/han/data1Ta/s32k146/openocd-nuttx/tcl/target/s32k146.cfg -c init -c "reset halt" -f boards/s32k1xx/s32k146evb/scripts/s32k146.cfg -c init -c "reset halt"
4. Setup a GDB debug session in Eclipse. The resulting debug window shows
the NuttX threads. The full stack details can be viewed.
Configurations Configurations
============== ==============
Common Information Common Information
------------------ ------------------
Each S32K146EVB configuration is maintained in a sub-directory and Each S32K146EVB configuration is maintained in a sub-directory and can be
can be selected as follow: selected as follows:
tools/configure.sh s32k146evb:<subdir> tools/configure.sh s32k146evb:<subdir>
Where <subdir> is one of the sub-directories listed in the next paragraph Where <subdir> is one of the sub-directories listed in the next paragraph.
NOTES (common for all configurations): NOTES (common for all configurations):
1. This configuration uses the mconf-based configuration tool. To 1. This configuration uses the mconf-based configuration tool. To change
change this configuration using that tool, you should: this configuration using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt a. Build and install the kconfig-mconf tool. See nuttx/README.txt.
see additional README.txt files in the NuttX tools repository. Also see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process. reconfiguration process.
@ -164,5 +183,5 @@ Configurations
nsh: nsh:
--- ---
Configures the NuttShell (nsh) located at apps/examples/nsh. Support Configures the NuttShell (nsh) located at apps/examples/nsh. Support
for builtin applications is enabled, but in the base configuration but for builtin applications is enabled, but in the base configuration the
the builtin applications selected is the "Hello, World!" example. only application selected is the "Hello, World!" example.

12
boards/arm/s32k1xx/s32k146evb/configs/nsh/defconfig
View File

@ -17,15 +17,13 @@ CONFIG_ARCH_CHIP_S32K146=y
CONFIG_ARCH_CHIP_S32K14X=y CONFIG_ARCH_CHIP_S32K14X=y
CONFIG_ARCH_CHIP_S32K1XX=y CONFIG_ARCH_CHIP_S32K1XX=y
CONFIG_ARCH_STACKDUMP=y CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=3997 CONFIG_BOARD_LOOPSPERMSEC=6667
CONFIG_BUILTIN=y CONFIG_BUILTIN=y
CONFIG_EXAMPLES_HELLO=y CONFIG_EXAMPLES_HELLO=y
CONFIG_FS_PROCFS=y CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_LPUART1_RXBUFSIZE=64
CONFIG_LPUART1_SERIAL_CONSOLE=y CONFIG_LPUART1_SERIAL_CONSOLE=y
CONFIG_LPUART1_TXBUFSIZE=64
CONFIG_MOTOROLA_SREC=y CONFIG_MOTOROLA_SREC=y
CONFIG_NSH_ARCHINIT=y CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y CONFIG_NSH_BUILTIN_APPS=y
@ -34,14 +32,14 @@ CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4 CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=126976 CONFIG_RAM_SIZE=126976
CONFIG_RAM_START=0x1fff0000 CONFIG_RAM_START=0x1fff0000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200 CONFIG_RR_INTERVAL=200
CONFIG_S32K1XX_LPUART1=y CONFIG_S32K1XX_LPUART1=y
CONFIG_SCHED_WAITPID=y CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=18 CONFIG_START_DAY=6
CONFIG_START_MONTH=8 CONFIG_START_MONTH=9
CONFIG_START_YEAR=2019 CONFIG_START_YEAR=2021
CONFIG_STDIO_DISABLE_BUFFERING=y
CONFIG_SYMTAB_ORDEREDBYNAME=y CONFIG_SYMTAB_ORDEREDBYNAME=y
CONFIG_SYSTEM_NSH=y CONFIG_SYSTEM_NSH=y
CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_USER_ENTRYPOINT="nsh_main"

53
boards/arm/s32k1xx/s32k146evb/include/board.h
View File

@ -18,8 +18,8 @@
* *
****************************************************************************/ ****************************************************************************/
#ifndef __BOARDS_ARM_S32K146EVB_INCLUDE_BOARD_H #ifndef __BOARDS_ARM_S32K1XX_S32K146EVB_INCLUDE_BOARD_H
#define __BOARDS_ARM_S32K146EVB_INCLUDE_BOARD_H #define __BOARDS_ARM_S32K1XX_S32K146EVB_INCLUDE_BOARD_H
/**************************************************************************** /****************************************************************************
* Included Files * Included Files
@ -27,22 +27,17 @@
#include <nuttx/config.h> #include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
# include <stdbool.h>
#endif
/**************************************************************************** /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
****************************************************************************/ ****************************************************************************/
/* Clocking *****************************************************************/ /* Clocking *****************************************************************/
/* The S32K146EVB is fitted with a 8MHz Crystal */ /* The S32K146EVB is fitted with a 8 MHz crystal */
#define BOARD_XTAL_FREQUENCY 8000000 #define BOARD_XTAL_FREQUENCY 8000000
/* The S32K146 will run at 112MHz */ /* The S32K146 will run at 80 MHz */
/* LED definitions **********************************************************/ /* LED definitions **********************************************************/
@ -86,11 +81,11 @@
#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */ #define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */
#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */ #define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */
#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */ #define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */
#define LED_INIRQ 0 /* In an interrupt (no change) */ #define LED_INIRQ 0 /* In an interrupt (No change) */
#define LED_SIGNAL 0 /* In a signal handler (no change) */ #define LED_SIGNAL 0 /* In a signal handler (No change) */
#define LED_ASSERTION 0 /* An assertion failed (no change) */ #define LED_ASSERTION 0 /* An assertion failed (No change) */
#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */ #define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */
#undef LED_IDLE /* S32K146EVB in sleep mode (Not used) */ #undef LED_IDLE /* S32K146 is in sleep mode (Not used) */
/* Button definitions *******************************************************/ /* Button definitions *******************************************************/
@ -107,43 +102,31 @@
#define BUTTON_SW2_BIT (1 << BUTTON_SW2) #define BUTTON_SW2_BIT (1 << BUTTON_SW2)
#define BUTTON_SW3_BIT (1 << BUTTON_SW3) #define BUTTON_SW3_BIT (1 << BUTTON_SW3)
/* Alternate function pin selections ****************************************/ /* UART selections **********************************************************/
/* By default, the serial console will be provided on the OpenSDA VCOM port: /* By default, the serial console will be provided on the OpenSDA VCOM port:
* *
* OpenSDA UART TX PTC7 (LPUART1_TX)
* OpenSDA UART RX PTC6 (LPUART1_RX) * OpenSDA UART RX PTC6 (LPUART1_RX)
* OpenSDA UART TX PTC7 (LPUART1_TX)
*/ */
#define PIN_LPUART0_RX PIN_LPUART0_RX_1 /* PTB0 */
#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTB1 */
#define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */ #define PIN_LPUART1_RX PIN_LPUART1_RX_1 /* PTC6 */
#define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */ #define PIN_LPUART1_TX PIN_LPUART1_TX_1 /* PTC7 */
#define PIN_LPUART2_RX PIN_LPUART2_RX_1 /* PTA8 */
#define PIN_LPUART2_TX PIN_LPUART2_TX_1 /* PTA9 */
/* SPI selections ***********************************************************/ /* SPI selections ***********************************************************/
#define PIN_LPSPI0_SCK PIN_LPSPI0_SCK_2 /* PTB2 */ /* UJA1169TK/F SBC SPI (LPSPI1) */
#define PIN_LPSPI0_MISO PIN_LPSPI0_SIN_2 /* PTB3 */
#define PIN_LPSPI0_MOSI PIN_LPSPI0_SOUT_3 /* PTB4 */
#define PIN_LPSPI0_PCS PIN_LPSPI0_PCS0_1 /* PTB0 */
#define PIN_LPSPI1_SCK PIN_LPSPI1_SCK_1 /* PTB14 */ #define PIN_LPSPI1_SCK PIN_LPSPI1_SCK_2 /* PTB14 */
#define PIN_LPSPI1_MISO PIN_LPSPI1_SIN_1 /* PTB15 */ #define PIN_LPSPI1_MISO PIN_LPSPI1_SIN_1 /* PTB15 */
#define PIN_LPSPI1_MOSI PIN_LPSPI1_SOUT_1 /* PTB16 */ #define PIN_LPSPI1_MOSI PIN_LPSPI1_SOUT_2 /* PTB16 */
#define PIN_LPSPI1_PCS PIN_LPSPI1_PCS3 /* PTB17 */ #define PIN_LPSPI1_PCS PIN_LPSPI1_PCS3 /* PTB17 */
#define PIN_LPSPI2_SCK PIN_LPSPI2_SCK_2 /* PTE15 */ /* CAN selections ***********************************************************/
#define PIN_LPSPI2_MISO PIN_LPSPI2_SIN_2 /* PTE16 */
#define PIN_LPSPI2_MOSI PIN_LPSPI2_SOUT_1 /* PTA8 */
#define PIN_LPSPI2_PCS PIN_LPSPI2_PCS0_2 /* PTA9 */
/* I2C selections ***********************************************************/ /* UJA1169TK/F SBC CAN (CAN0) */
#define PIN_LPI2C0_SCL PIN_LPI2C0_SCL_2 /* PTA3 */ #define PIN_CAN0_RX PIN_CAN0_RX_4 /* PTE4 */
#define PIN_LPI2C0_SDA PIN_LPI2C0_SDA_2 /* PTA2 */ #define PIN_CAN0_TX PIN_CAN0_TX_4 /* PTE5 */
#endif /* __BOARDS_ARM_S32K146EVB_INCLUDE_BOARD_H */ #endif /* __BOARDS_ARM_S32K1XX_S32K146EVB_INCLUDE_BOARD_H */

2
boards/arm/s32k1xx/s32k146evb/scripts/s32k146.cfg
View File

@ -1,5 +1,5 @@
# #
# NXP S32K146 - 1x ARM Cortex-M4 @ up to 180 MHz # NXP S32K146 - 1x ARM Cortex-M4 @ up to 112 MHz
# #
adapter_khz 4000 adapter_khz 4000

12
boards/arm/s32k1xx/s32k146evb/src/Makefile
View File

@ -23,20 +23,24 @@ include $(TOPDIR)/Make.defs
CSRCS = s32k1xx_boot.c s32k1xx_bringup.c s32k1xx_clockconfig.c CSRCS = s32k1xx_boot.c s32k1xx_bringup.c s32k1xx_clockconfig.c
CSRCS += s32k1xx_periphclocks.c CSRCS += s32k1xx_periphclocks.c
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += s32k1xx_buttons.c
endif
ifeq ($(CONFIG_ARCH_LEDS),y) ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += s32k1xx_autoleds.c CSRCS += s32k1xx_autoleds.c
else else
CSRCS += s32k1xx_userleds.c CSRCS += s32k1xx_userleds.c
endif endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += s32k1xx_buttons.c
endif
ifeq ($(CONFIG_BOARDCTL),y) ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += s32k1xx_appinit.c CSRCS += s32k1xx_appinit.c
endif endif
ifeq ($(CONFIG_S32K1XX_LPI2C),y)
CSRCS += s32k1xx_i2c.c
endif
ifeq ($(CONFIG_S32K1XX_LPSPI),y) ifeq ($(CONFIG_S32K1XX_LPSPI),y)
CSRCS += s32k1xx_spi.c CSRCS += s32k1xx_spi.c
endif endif

29
boards/arm/s32k1xx/s32k146evb/src/s32k146evb.h
View File

@ -32,6 +32,7 @@
#include "hardware/s32k1xx_pinmux.h" #include "hardware/s32k1xx_pinmux.h"
#include "s32k1xx_periphclocks.h" #include "s32k1xx_periphclocks.h"
#include "s32k1xx_pin.h"
/**************************************************************************** /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
@ -52,7 +53,7 @@
#define GPIO_LED_R (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) #define GPIO_LED_R (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO)
#define GPIO_LED_G (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) #define GPIO_LED_G (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO)
#define GPIO_LED_B (PIN_PTE8 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO) #define GPIO_LED_B (PIN_PTD0 | GPIO_LOWDRIVE | GPIO_OUTPUT_ZERO)
/* Buttons. The S32K146EVB supports two buttons: /* Buttons. The S32K146EVB supports two buttons:
* *
@ -63,16 +64,10 @@
#define GPIO_SW2 (PIN_PTC12 | PIN_INT_BOTH) #define GPIO_SW2 (PIN_PTC12 | PIN_INT_BOTH)
#define GPIO_SW3 (PIN_PTC13 | PIN_INT_BOTH) #define GPIO_SW3 (PIN_PTC13 | PIN_INT_BOTH)
/* SPI chip selects */
/* Count of peripheral clock user configurations */ /* Count of peripheral clock user configurations */
#define NUM_OF_PERIPHERAL_CLOCKS_0 15 #define NUM_OF_PERIPHERAL_CLOCKS_0 15
/****************************************************************************
* Public Types
****************************************************************************/
/**************************************************************************** /****************************************************************************
* Public Data * Public Data
****************************************************************************/ ****************************************************************************/
@ -104,17 +99,25 @@ extern const struct peripheral_clock_config_s g_peripheral_clockconfig0[];
int s32k1xx_bringup(void); int s32k1xx_bringup(void);
/**************************************************************************** /****************************************************************************
* Name: s32k1xx_spidev_initialize * Name: s32k1xx_i2cdev_initialize
* *
* Description: * Description:
* Called to configure SPI chip select GPIO pins for the S32K146EVB * Initialize I2C driver and register /dev/i2cN devices.
* board.
* *
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_S32K1XX_SPI int s32k1xx_i2cdev_initialize(void);
void s32k1xx_spidev_initialize(void);
#endif /****************************************************************************
* Name: s32k1xx_spidev_initialize
*
* Description:
* Configure chip select pins, initialize the SPI driver and register
* /dev/spiN devices.
*
****************************************************************************/
int s32k1xx_spidev_initialize(void);
#endif /* __ASSEMBLY__ */ #endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_S32K1XX_S32K146EVB_SRC_S32K146EVB_H */ #endif /* __BOARDS_ARM_S32K1XX_S32K146EVB_SRC_S32K146EVB_H */

19
boards/arm/s32k1xx/s32k146evb/src/s32k1xx_appinit.c
View File

@ -23,9 +23,10 @@
****************************************************************************/ ****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
#include <nuttx/board.h> #include <nuttx/board.h>
#include <stdint.h>
#include "s32k146evb.h" #include "s32k146evb.h"
/**************************************************************************** /****************************************************************************
@ -50,14 +51,14 @@
* *
* Input Parameters: * Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize() * arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no * implementation without modification. The argument has no meaning
* meaning to NuttX; the meaning of the argument is a contract * to NuttX; the meaning of the argument is a contract between the
* between the board-specific initialization logic and the * board-specific initialization logic and the matching application
* matching application logic. The value could be such things as a * logic. The value could be such things as a mode enumeration
* mode enumeration value, a set of DIP switch switch settings, a * value, a set of DIP switch settings, a pointer to configuration
* pointer to configuration data read from a file or serial FLASH, * data read from a file or serial FLASH, or whatever you would like
* or whatever you would like to do with it. Every implementation * to do with it. Every implementation should accept zero/NULL as a
* should accept zero/NULL as a default configuration. * default configuration.
* *
* Returned Value: * Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on * Zero (OK) is returned on success; a negated errno value is returned on

22
boards/arm/s32k1xx/s32k146evb/src/s32k1xx_autoleds.c
View File

@ -27,21 +27,21 @@
* An output of '1' illuminates the LED. * An output of '1' illuminates the LED.
* *
* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board * If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board
* the Freedom K66F. The following definitions describe how NuttX controls * the S32K146EVB. The following definitions describe how NuttX controls the
* the LEDs: * LEDs:
* *
* SYMBOL Meaning LED state * SYMBOL Meaning LED state
* RED GREEN BLUE * RED GREEN BLUE
* ------------------- ----------------------- ----------------- * ---------------- ------------------------ --------------------
* LED_STARTED NuttX has been started OFF OFF OFF * LED_STARTED NuttX has been started OFF OFF OFF
* LED_HEAPALLOCATE Heap has been allocated OFF OFF ON * LED_HEAPALLOCATE Heap has been allocated OFF OFF ON
* LED_IRQSENABLED Interrupts enabled OFF OFF ON * LED_IRQSENABLED Interrupts enabled OFF OFF ON
* LED_STACKCREATED Idle stack created OFF ON OFF * LED_STACKCREATED Idle stack created OFF ON OFF
* LED_INIRQ In an interrupt (no change) * LED_INIRQ In an interrupt (No change)
* LED_SIGNAL In a signal handler (no change) * LED_SIGNAL In a signal handler (No change)
* LED_ASSERTION An assertion failed (no change) * LED_ASSERTION An assertion failed (No change)
* LED_PANIC The system has crashed FLASH OFF OFF * LED_PANIC The system has crashed FLASH OFF OFF
* LED_IDLE K66 is in sleep mode (Optional, not used) * LED_IDLE S32K146 is in sleep mode (Optional, not used)
*/ */
/**************************************************************************** /****************************************************************************
@ -52,18 +52,12 @@
#include <stdint.h> #include <stdint.h>
#include <stdbool.h> #include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h> #include <nuttx/board.h>
#include <arch/board/board.h>
#include "arm_arch.h"
#include "arm_internal.h"
#include "s32k1xx_pin.h" #include "s32k1xx_pin.h"
#include "s32k146evb.h"
#include <arch/board/board.h> #include "s32k146evb.h"
#ifdef CONFIG_ARCH_LEDS #ifdef CONFIG_ARCH_LEDS

5
boards/arm/s32k1xx/s32k146evb/src/s32k1xx_boot.c
View File

@ -23,9 +23,6 @@
****************************************************************************/ ****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h> #include <nuttx/board.h>
#include "s32k146evb.h" #include "s32k146evb.h"
@ -48,7 +45,7 @@
void s32k1xx_board_initialize(void) void s32k1xx_board_initialize(void)
{ {
#ifdef CONFIG_ARCH_LEDS #ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */ /* Configure on-board LEDs if LED support has been selected */
board_autoled_initialize(); board_autoled_initialize();
#endif #endif

72
boards/arm/s32k1xx/s32k146evb/src/s32k1xx_bringup.c
View File

@ -25,10 +25,9 @@
#include <nuttx/config.h> #include <nuttx/config.h>
#include <sys/types.h> #include <sys/types.h>
#include <stdint.h>
#include <syslog.h> #include <syslog.h>
#include <nuttx/fs/fs.h>
#ifdef CONFIG_INPUT_BUTTONS #ifdef CONFIG_INPUT_BUTTONS
# include <nuttx/input/buttons.h> # include <nuttx/input/buttons.h>
#endif #endif
@ -37,9 +36,12 @@
# include <nuttx/leds/userled.h> # include <nuttx/leds/userled.h>
#endif #endif
#ifdef CONFIG_I2C_DRIVER #ifdef CONFIG_FS_PROCFS
# include <nuttx/i2c/i2c_master.h> # include <nuttx/fs/fs.h>
# include "s32k1xx_lpi2c.h" #endif
#ifdef CONFIG_S32K1XX_PROGMEM
# include <nuttx/mtd/mtd.h>
#endif #endif
#ifdef CONFIG_S32K1XX_EEEPROM #ifdef CONFIG_S32K1XX_EEEPROM
@ -100,48 +102,46 @@ int s32k1xx_bringup(void)
} }
#endif #endif
#ifdef CONFIG_S32K1XX_LPSPI
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
* function s32k1xx_spidev_initialize() has been brought into the link.
*/
s32k1xx_spidev_initialize();
#endif
#if defined(CONFIG_S32K1XX_LPI2C0) && defined(CONFIG_I2C_DRIVER)
FAR struct i2c_master_s *i2c;
i2c = s32k1xx_i2cbus_initialize(0);
if (i2c == NULL)
{
serr("ERROR: Failed to get I2C%d interface\n", bus);
}
else
{
ret = i2c_register(i2c, 0);
if (ret < 0)
{
serr("ERROR: Failed to register I2C%d driver: %d\n", bus, ret);
s32k1xx_i2cbus_uninitialize(i2c);
}
}
#endif
#ifdef CONFIG_S32K1XX_PROGMEM #ifdef CONFIG_S32K1XX_PROGMEM
FAR struct mtd_dev_s *mtd; FAR struct mtd_dev_s *mtd;
int minor = 0;
mtd = progmem_initialize(); mtd = progmem_initialize();
if (!mtd) if (mtd == NULL)
{ {
syslog(LOG_ERR, "ERROR: progmem_initialize failed\n"); syslog(LOG_ERR, "ERROR: progmem_initialize() failed\n");
} }
#endif #endif
#ifdef CONFIG_S32K1XX_EEEPROM #ifdef CONFIG_S32K1XX_EEEPROM
/* Register EEEPROM block device */ /* Register EEEPROM block device */
s32k1xx_eeeprom_register(0, 4096); ret = s32k1xx_eeeprom_register(0, 4096);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: s32k1xx_eeeprom_register() failed\n");
}
#endif
#ifdef CONFIG_S32K1XX_LPI2C
/* Initialize I2C driver */
ret = s32k1xx_i2cdev_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: s32k1xx_i2cdev_initialize() failed: %d\n",
ret);
}
#endif
#ifdef CONFIG_S32K1XX_LPSPI
/* Initialize SPI driver */
ret = s32k1xx_spidev_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: s32k1xx_spidev_initialize() failed: %d\n",
ret);
}
#endif #endif
return ret; return ret;

17
boards/arm/s32k1xx/s32k146evb/src/s32k1xx_buttons.c
View File

@ -33,14 +33,14 @@
#include <stdint.h> #include <stdint.h>
#include <errno.h> #include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h> #include <nuttx/board.h>
#include "s32k1xx_pin.h" #include "s32k1xx_pin.h"
#include "s32k146evb.h"
#include <arch/board/board.h> #include <arch/board/board.h>
#include "s32k146evb.h"
#ifdef CONFIG_ARCH_BUTTONS #ifdef CONFIG_ARCH_BUTTONS
/**************************************************************************** /****************************************************************************
@ -60,10 +60,11 @@
uint32_t board_button_initialize(void) uint32_t board_button_initialize(void)
{ {
/* Configure the GPIO pins as interrupting inputs. */ /* Configure the GPIO pins as interrupting inputs */
s32k1xx_pinconfig(GPIO_SW2); s32k1xx_pinconfig(GPIO_SW2);
s32k1xx_pinconfig(GPIO_SW3); s32k1xx_pinconfig(GPIO_SW3);
return NUM_BUTTONS; return NUM_BUTTONS;
} }
@ -88,6 +89,7 @@ uint32_t board_buttons(void)
return ret; return ret;
} }
#ifdef CONFIG_ARCH_IRQBUTTONS
/**************************************************************************** /****************************************************************************
* Button support. * Button support.
* *
@ -103,20 +105,19 @@ uint32_t board_buttons(void)
* BUTTON_*_BIT definitions in board.h for the meaning of each bit. * BUTTON_*_BIT definitions in board.h for the meaning of each bit.
* *
* board_button_irq() may be called to register an interrupt handler that * board_button_irq() may be called to register an interrupt handler that
* will be called when a button is depressed or released. The ID value is * will be called when a button is pressed or released. The ID value is a
* a button enumeration value that uniquely identifies a button resource. * button enumeration value that uniquely identifies a button resource.
* See the BUTTON_* definitions in board.h for the meaning of enumeration * See the BUTTON_* definitions in board.h for the meaning of enumeration
* value. * value.
* *
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg) int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
{ {
uint32_t pinset; uint32_t pinset;
int ret; int ret;
/* Map the button id to the GPIO bit set. */ /* Map the button id to the GPIO bit set */
if (id == BUTTON_SW2) if (id == BUTTON_SW2)
{ {
@ -147,5 +148,5 @@ int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
return ret; return ret;
} }
#endif #endif /* CONFIG_ARCH_IRQBUTTONS */
#endif /* CONFIG_ARCH_BUTTONS */ #endif /* CONFIG_ARCH_BUTTONS */

4
boards/arm/s32k1xx/s32k146evb/src/s32k1xx_clockconfig.c
View File

@ -58,11 +58,9 @@
#include <nuttx/config.h> #include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include "s32k1xx_clockconfig.h" #include "s32k1xx_clockconfig.h"
#include "s32k1xx_start.h" #include "s32k1xx_start.h"
#include "s32k146evb.h" #include "s32k146evb.h"
/**************************************************************************** /****************************************************************************

81
boards/arm/s32k1xx/s32k146evb/src/s32k1xx_i2c.c Normal file
View File

@ -0,0 +1,81 @@
/****************************************************************************
* boards/arm/s32k1xx/s32k146evb/src/s32k1xx_i2c.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <sys/types.h>
#include <stdint.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/i2c/i2c_master.h>
#include "s32k1xx_lpi2c.h"
#include "s32k146evb.h"
#ifdef CONFIG_S32K1XX_LPI2C
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: s32k1xx_i2cdev_initialize
*
* Description:
* Initialize I2C driver and register /dev/i2cN devices.
*
****************************************************************************/
int weak_function s32k1xx_i2cdev_initialize(void)
{
int ret = OK;
#if defined(CONFIG_S32K1XX_LPI2C0) && defined(CONFIG_I2C_DRIVER)
/* LPI2C0 *****************************************************************/
/* Initialize the I2C driver for LPI2C0 */
struct i2c_master_s *lpi2c0 = s32k1xx_i2cbus_initialize(0);
if (lpi2c0 == NULL)
{
i2cerr("ERROR: FAILED to initialize LPI2C0\n");
return -ENODEV;
}
ret = i2c_register(lpi2c0, 0);
if (ret < 0)
{
i2cerr("ERROR: FAILED to register LPI2C0 driver\n");
s32k1xx_i2cbus_uninitialize(lpi2c0);
return ret;
}
#endif /* CONFIG_S32K1XX_LPI2C0 && CONFIG_I2C_DRIVER */
return ret;
}
#endif /* CONFIG_S32K1XX_LPSPI */

8
boards/arm/s32k1xx/s32k146evb/src/s32k1xx_periphclocks.c
View File

@ -58,7 +58,9 @@
#include <nuttx/config.h> #include <nuttx/config.h>
#include "s32k14x/s32k14x_clocknames.h"
#include "s32k1xx_periphclocks.h" #include "s32k1xx_periphclocks.h"
#include "s32k146evb.h" #include "s32k146evb.h"
/**************************************************************************** /****************************************************************************
@ -73,7 +75,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] =
{ {
{ {
.clkname = FLEXCAN0_CLK, .clkname = FLEXCAN0_CLK,
#ifdef CONFIG_S32K1XX_FLEXCAN #ifdef CONFIG_S32K1XX_FLEXCAN0
.clkgate = true, .clkgate = true,
#else #else
.clkgate = false, .clkgate = false,
@ -81,7 +83,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] =
}, },
{ {
.clkname = FLEXCAN1_CLK, .clkname = FLEXCAN1_CLK,
#ifdef CONFIG_S32K1XX_FLEXCAN #ifdef CONFIG_S32K1XX_FLEXCAN1
.clkgate = true, .clkgate = true,
#else #else
.clkgate = false, .clkgate = false,
@ -89,7 +91,7 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] =
}, },
{ {
.clkname = FLEXCAN2_CLK, .clkname = FLEXCAN2_CLK,
#ifdef CONFIG_S32K1XX_FLEXCAN #ifdef CONFIG_S32K1XX_FLEXCAN2
.clkgate = true, .clkgate = true,
#else #else
.clkgate = false, .clkgate = false,

148
boards/arm/s32k1xx/s32k146evb/src/s32k1xx_spi.c
View File

@ -23,7 +23,9 @@
****************************************************************************/ ****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <sys/types.h>
#include <stdint.h> #include <stdint.h>
#include <stdbool.h> #include <stdbool.h>
#include <errno.h> #include <errno.h>
@ -31,17 +33,15 @@
#include <nuttx/spi/spi.h> #include <nuttx/spi/spi.h>
#include <nuttx/spi/spi_transfer.h> #include <nuttx/spi/spi_transfer.h>
#include "s32k1xx_pin.h"
#include "s32k1xx_lpspi.h"
#include <arch/board/board.h> #include <arch/board/board.h>
#include "arm_arch.h"
#include "s32k1xx_config.h"
#include "s32k1xx_lpspi.h"
#include "s32k1xx_pin.h"
#include "s32k146evb.h" #include "s32k146evb.h"
#if defined(CONFIG_S32K1XX_LPSPI0) || defined(CONFIG_S32K1XX_LPSPI1) || \ #ifdef CONFIG_S32K1XX_LPSPI
defined(CONFIG_S32K1XX_LPSPI2)
/**************************************************************************** /****************************************************************************
* Public Functions * Public Functions
@ -51,80 +51,115 @@
* Name: s32k1xx_spidev_initialize * Name: s32k1xx_spidev_initialize
* *
* Description: * Description:
* Called to configure SPI chip select GPIO pins for the S32K144EVB board. * Configure chip select pins, initialize the SPI driver and register
* /dev/spiN devices.
* *
****************************************************************************/ ****************************************************************************/
void weak_function s32k1xx_spidev_initialize(void) int weak_function s32k1xx_spidev_initialize(void)
{ {
int ret = OK;
#ifdef CONFIG_S32K1XX_LPSPI0 #ifdef CONFIG_S32K1XX_LPSPI0
/* LPSPI0 *****************************************************************/
/* Configure LPSPI0 peripheral chip select */
s32k1xx_pinconfig(PIN_LPSPI0_PCS); s32k1xx_pinconfig(PIN_LPSPI0_PCS);
# ifdef CONFIG_SPI_DRIVER # ifdef CONFIG_SPI_DRIVER
struct spi_dev_s *g_lpspi0; /* Initialize the SPI driver for LPSPI0 */
g_lpspi0 = s32k1xx_lpspibus_initialize(0);
if (!g_lpspi0) struct spi_dev_s *g_lpspi0 = s32k1xx_lpspibus_initialize(0);
if (g_lpspi0 == NULL)
{ {
spierr("ERROR: [boot] FAILED to initialize LPSPI0\n"); spierr("ERROR: FAILED to initialize LPSPI0\n");
return -ENODEV;
} }
spi_register(g_lpspi0, 0); ret = spi_register(g_lpspi0, 0);
#endif if (ret < 0)
#endif {
spierr("ERROR: FAILED to register LPSPI0 driver\n");
return ret;
}
# endif /* CONFIG_SPI_DRIVER */
#endif /* CONFIG_S32K1XX_LPSPI0 */
#ifdef CONFIG_S32K1XX_LPSPI1 #ifdef CONFIG_S32K1XX_LPSPI1
/* LPSPI1 *****************************************************************/
/* Configure LPSPI1 peripheral chip select */
s32k1xx_pinconfig(PIN_LPSPI1_PCS); s32k1xx_pinconfig(PIN_LPSPI1_PCS);
# ifdef CONFIG_SPI_DRIVER # ifdef CONFIG_SPI_DRIVER
struct spi_dev_s *g_lpspi1; /* Initialize the SPI driver for LPSPI1 */
g_lpspi1 = s32k1xx_lpspibus_initialize(1);
if (!g_lpspi1) struct spi_dev_s *g_lpspi1 = s32k1xx_lpspibus_initialize(1);
if (g_lpspi1 == NULL)
{ {
spierr("ERROR: [boot] FAILED to initialize LPSPI1\n"); spierr("ERROR: FAILED to initialize LPSPI1\n");
return -ENODEV;
} }
spi_register(g_lpspi1, 1); ret = spi_register(g_lpspi1, 1);
#endif if (ret < 0)
#endif {
spierr("ERROR: FAILED to register LPSPI1 driver\n");
return ret;
}
# endif /* CONFIG_SPI_DRIVER */
#endif /* CONFIG_S32K1XX_LPSPI1 */
#ifdef CONFIG_S32K1XX_LPSPI2 #ifdef CONFIG_S32K1XX_LPSPI2
/* LPSPI2 *****************************************************************/
/* Configure LPSPI2 peripheral chip select */
s32k1xx_pinconfig(PIN_LPSPI2_PCS); s32k1xx_pinconfig(PIN_LPSPI2_PCS);
# ifdef CONFIG_SPI_DRIVER # ifdef CONFIG_SPI_DRIVER
struct spi_dev_s *g_lpspi2; /* Initialize the SPI driver for LPSPI2 */
g_lpspi2 = s32k1xx_lpspibus_initialize(2);
if (!g_lpspi2) struct spi_dev_s *g_lpspi2 = s32k1xx_lpspibus_initialize(2);
if (g_lpspi2 == NULL)
{ {
spierr("ERROR: [boot] FAILED to initialize LPSPI2\n"); spierr("ERROR: FAILED to initialize LPSPI2\n");
return -ENODEV;
} }
spi_register(g_lpspi2, 2); ret = spi_register(g_lpspi2, 2);
#endif if (ret < 0)
#endif {
spierr("ERROR: FAILED to register LPSPI2 driver\n");
return ret;
}
# endif /* CONFIG_SPI_DRIVER */
#endif /* CONFIG_S32K1XX_LPSPI2 */
return ret;
} }
/**************************************************************************** /****************************************************************************
* Name: s32k1xx_lpspi0/1/2select and s32k1xx_lpspi0/1/2status * Name: s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus
* *
* Description: * Description:
* The external functions, s32k1xx_lpspi0/1/2select and * The external functions, s32k1xx_lpspiNselect and s32k1xx_lpspiNstatus
* s32k1xx_lpspi0/1/2status must be provided by board-specific logic. * must be provided by board-specific logic. They are implementations of
* They are implementations of the select and status methods of the SPI * the select and status methods of the SPI interface defined by struct
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h). * spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
* All other methods (including s32k1xx_lpspibus_initialize()) are provided * s32k1xx_lpspibus_initialize()) are provided by common logic. To use
* by common logic. To use this common SPI logic on your board: * this common SPI logic on your board:
* *
* 1. Provide logic in s32k1xx_boardinitialize() to configure SPI chip * 1. Provide logic in s32k1xx_boardinitialize() to configure SPI chip
* select pins. * select pins.
* 2. Provide s32k1xx_lpspi0/1/2select() and s32k1xx_lpspi0/1/2status() * 2. Provide s32k1xx_lpspiNselect() and s32k1xx_lpspiNstatus() functions
* functions in your board-specific logic. These functions will perform * in your board-specific logic. These functions will perform chip
* chip selection and status operations using GPIOs in the way your * selection and status operations using GPIOs in the way your board is
* board is configured. * configured.
* 3. Add a calls to s32k1xx_lpspibus_initialize() in your low level * 3. Add a calls to s32k1xx_lpspibus_initialize() in your low level
* application initialization logic * application initialization logic.
* 4. The handle returned by s32k1xx_lpspibus_initialize() may then be used * 4. The handle returned by s32k1xx_lpspibus_initialize() may then be used
* to bind the SPI driver to higher level logic (e.g., calling * to bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to * mmcsd_spislotinitialize(), for example, will bind the SPI driver to
@ -133,10 +168,12 @@ void weak_function s32k1xx_spidev_initialize(void)
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_S32K1XX_LPSPI0 #ifdef CONFIG_S32K1XX_LPSPI0
/* LPSPI0 *******************************************************************/
void s32k1xx_lpspi0select(FAR struct spi_dev_s *dev, uint32_t devid, void s32k1xx_lpspi0select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected) bool selected)
{ {
spiinfo("devid: %d CS: %s\n", (int)devid, spiinfo("devid: %" PRId32 ", CS: %s\n", devid,
selected ? "assert" : "de-assert"); selected ? "assert" : "de-assert");
s32k1xx_gpiowrite(PIN_LPSPI0_PCS, !selected); s32k1xx_gpiowrite(PIN_LPSPI0_PCS, !selected);
@ -146,13 +183,15 @@ uint8_t s32k1xx_lpspi0status(FAR struct spi_dev_s *dev, uint32_t devid)
{ {
return 0; return 0;
} }
#endif #endif /* CONFIG_S32K1XX_LPSPI0 */
#ifdef CONFIG_S32K1XX_LPSPI1 #ifdef CONFIG_S32K1XX_LPSPI1
void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, /* LPSPI1 *******************************************************************/
uint32_t devid, bool selected)
void s32k1xx_lpspi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{ {
spiinfo("devid: %d CS: %s\n", (int)devid, spiinfo("devid: %" PRId32 ", CS: %s\n", devid,
selected ? "assert" : "de-assert"); selected ? "assert" : "de-assert");
s32k1xx_gpiowrite(PIN_LPSPI1_PCS, !selected); s32k1xx_gpiowrite(PIN_LPSPI1_PCS, !selected);
@ -162,13 +201,15 @@ uint8_t s32k1xx_lpspi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{ {
return 0; return 0;
} }
#endif #endif /* CONFIG_S32K1XX_LPSPI1 */
#ifdef CONFIG_S32K1XX_LPSPI2 #ifdef CONFIG_S32K1XX_LPSPI2
void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev, /* LPSPI2 *******************************************************************/
uint32_t devid, bool selected)
void s32k1xx_lpspi2select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{ {
spiinfo("devid: %d CS: %s\n", (int)devid, spiinfo("devid: %" PRId32 ", CS: %s\n", devid,
selected ? "assert" : "de-assert"); selected ? "assert" : "de-assert");
s32k1xx_gpiowrite(PIN_LPSPI2_PCS, !selected); s32k1xx_gpiowrite(PIN_LPSPI2_PCS, !selected);
@ -178,6 +219,5 @@ uint8_t s32k1xx_lpspi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{ {
return 0; return 0;
} }
#endif #endif /* CONFIG_S32K1XX_LPSPI2 */
#endif /* CONFIG_S32K1XX_LPSPI */
#endif /* CONFIG_S32K1XX_LPSPI0 || CONFIG_S32K1XX_LPSPI01 || CONFIG_S32K1XX_LPSPI2 */

12
boards/arm/s32k1xx/s32k146evb/src/s32k1xx_userleds.c
View File

@ -26,18 +26,15 @@
#include <stdint.h> #include <stdint.h>
#include <stdbool.h> #include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h> #include <nuttx/board.h>
#include "arm_arch.h"
#include "arm_internal.h"
#include "s32k1xx_pin.h" #include "s32k1xx_pin.h"
#include "s32k146evb.h"
#include <arch/board/board.h> #include <arch/board/board.h>
#include "s32k146evb.h"
#ifndef CONFIG_ARCH_LEDS #ifndef CONFIG_ARCH_LEDS
/**************************************************************************** /****************************************************************************
@ -55,6 +52,7 @@ uint32_t board_userled_initialize(void)
s32k1xx_pinconfig(GPIO_LED_R); s32k1xx_pinconfig(GPIO_LED_R);
s32k1xx_pinconfig(GPIO_LED_G); s32k1xx_pinconfig(GPIO_LED_G);
s32k1xx_pinconfig(GPIO_LED_B); s32k1xx_pinconfig(GPIO_LED_B);
return BOARD_NLEDS; return BOARD_NLEDS;
} }
@ -83,7 +81,7 @@ void board_userled(int led, bool ledon)
return; return;
} }
s32k1xx_gpiowrite(ledcfg, ledon); /* High illuminates */ s32k1xx_gpiowrite(ledcfg, ledon);
} }
/**************************************************************************** /****************************************************************************
@ -92,8 +90,6 @@ void board_userled(int led, bool ledon)
void board_userled_all(uint32_t ledset) void board_userled_all(uint32_t ledset)
{ {
/* Low illuminates */
s32k1xx_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) != 0); s32k1xx_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) != 0);
s32k1xx_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) != 0); s32k1xx_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) != 0);
s32k1xx_gpiowrite(GPIO_LED_B, (ledset & BOARD_LED_B_BIT) != 0); s32k1xx_gpiowrite(GPIO_LED_B, (ledset & BOARD_LED_B_BIT) != 0);