From e7fd9883f0164ed749e0d2d8eab250a87ae76b6a Mon Sep 17 00:00:00 2001
From: patacongo <patacongo@42af7a65-404d-4744-a932-0658087f49c3>
Date: Sun, 6 Mar 2011 13:55:20 +0000
Subject: [PATCH] RTL driver update (still in progress)

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3346 42af7a65-404d-4744-a932-0658087f49c3
---
 arch/x86/src/qemu/qemu_lowputc.c | 36 ++++++++++++++++++++++++++------
 arch/x86/src/qemu/qemu_vectors.S | 10 +++------
 2 files changed, 33 insertions(+), 13 deletions(-)

diff --git a/arch/x86/src/qemu/qemu_lowputc.c b/arch/x86/src/qemu/qemu_lowputc.c
index 4e3471e604..1fa4aa6c59 100644
--- a/arch/x86/src/qemu/qemu_lowputc.c
+++ b/arch/x86/src/qemu/qemu_lowputc.c
@@ -45,6 +45,32 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
+ /* COM1 port addresses */
+ 
+#define COM1_PORT 0x3f8   /* COM1: I/O port 0x3f8, IRQ 4 */
+#define COM2_PORT 0x2f8   /* COM2: I/O port 0x2f8, IRQ 3 */
+#define COM3_PORT 0x3e8   /* COM3: I/O port 0x3e8, IRQ 4 */
+#define COM4_PORT 0x2e8   /* COM4: I/O port 0x2e8, IRQ 3 */
+
+/* 16650 register offsets */
+
+#define COM_RBR   0       /* DLAB=0, Receiver Buffer (read) */
+#define COM_THR   0       /* DLAB=0, Transmitter Holding Register (write) */
+#define COM_DLL   0       /* DLAB=1, Divisor Latch (least significant byte) */
+#define COM_IER   1       /* DLAB=0, Interrupt Enable */
+#define COM_DLM   1       /* DLAB=1, Divisor Latch(most significant byte) */
+#define COM_IIR   2       /* Interrupt Identification (read) */
+#define COM_FCR   2       /* FIFO Control (write) */
+#define COM_LCR   3       /* Line Control */
+#define COM_MCR   4       /* MODEM Control */
+#define COM_LSR   5       /* Line Status */
+#define COM_MSR   6       /* MODEM Status */
+#define COM_SCR   7       /* Scratch */
+
+/* 16650 register bit definitions */
+
+#define LSR_THRE  (1 << 5) /* Bit 5: Transmitter Holding Register Empty */
+
 /****************************************************************************
  * Private Data
  ****************************************************************************/
@@ -67,14 +93,12 @@
 
 void up_lowputc(char ch)
 {
-  /* Wait until the BIOS can accept another character (so that the OS will
-   * continue to run.
-   */
+  /* Wait until the Transmitter Holding Register (THR) is empty. */
 
-  while ((inb(0x3f8+5) & (1 << 5)) == 0);
+  while ((inb(COM1_PORT+COM_LSR) & LSR_THRE) == 0);
 
-  /* Then output the character */
+  /* Then output the character to the THR*/
 
-  outb(ch, 0x3f8);
+  outb(ch, COM1_PORT+COM_THR);
 }
 
diff --git a/arch/x86/src/qemu/qemu_vectors.S b/arch/x86/src/qemu/qemu_vectors.S
index 8109045388..6795203e26 100755
--- a/arch/x86/src/qemu/qemu_vectors.S
+++ b/arch/x86/src/qemu/qemu_vectors.S
@@ -296,14 +296,10 @@ irq_common:
 
 /* Trace macros, use like trace 'i' to print char to serial port. */
 
-	.macro	io_outb, addr, data
-	mov		dx, $\addr
-	mov		al, $\data
-	out		dx, al
-	.endm
-
 	.macro	trace, ch
-	io_outb	0x3f8, \ch
+	mov		$0x3f8, %dx
+	mov		$\ch, %al
+	out		%al, %dx
 	.endm
 
 /* This macro creates a stub for an ISR which does NOT pass it's own