Costmetic changes from review of last PR.

This commit is contained in:
Gregory Nutt 2017-02-07 17:16:56 -06:00
parent f887a4c535
commit e803e2c3f4
6 changed files with 33 additions and 24 deletions

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@ -33,6 +33,7 @@
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_MCG_H
#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_MCG_H
@ -56,8 +57,9 @@
* 2/5/2017, the catch all KINETIS_MCG_VERSION_UKN configuration is assigned
* to all the chips that did not have any conditional compilation based on
* NEW_MCG or KINETIS_K64. This is a "No worse" than the original code solution.
* N.B. Each original chip "if"definitions have been left intact so that the complete
* legacy definitions prior to 2/5/2017 may be filled in completely when vetted.
* N.B. Each original chip "if"definitions have been left intact so that the
* complete legacy definitions prior to 2/5/2017 may be filled in completely when
* vetted.
*/
/* MCG Configuration Parameters
@ -65,7 +67,8 @@
* KINETIS_MCG_PLL_REF_MIN - OSCCLK/PLL_R minimum
* KINETIS_MCG_PLL_REF_MAX - OSCCLK/PLL_R maximum
* KINETIS_MCG_PLL_INTERNAL_DIVBY - The PLL clock is divided by n before VCO divider
* KINETIS_MCG_HAS_PLL_EXTRA_DIVBY - Is PLL clock divided by n before MCG PLL/FLL clock selection in the SIM module
* KINETIS_MCG_HAS_PLL_EXTRA_DIVBY - Is PLL clock divided by n before MCG PLL/FLL
* clock selection in the SIM module
* KINETIS_MCG_FFCLK_DIVBY - MCGFFCLK divided by n
* KINETIS_MCG_HAS_IRC_48M - Has 48MHz internal oscillator
* KINETIS_MCG_HAS_LOW_FREQ_IRC - Has LTRIMRNG, LFRIM, LSTRIM and bit MC[LIRC_DIV2]
@ -439,6 +442,7 @@
* MK66FN2M0VLQ18 180 MHz 144 LQFP 2 MB KB 260 KB 100
* MK66FX1M0VLQ18 180 MHz 144 LQFP 1.25 MB 1 MB 4 KB 256 KB 100
*/
#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)

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@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/kinetis/chip/kinetis_k64memorymap.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without

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@ -40,12 +40,15 @@
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Register Offsets *****************************************************************/
#define KINETIS_MCG_C1_OFFSET 0x0000 /* MCG Control 1 Register */

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@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_clockconfig.c
*
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2011, 2016-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -148,6 +148,7 @@
#if ((BOARD_FRDIV & MCG_C1_FRDIV_MASK) >> MCG_C1_FRDIV_SHIFT) > KINETIS_MCG_C1_FRDIV_MAX
# error BOARD_FRDIV choice is not supported on this SoC
#endif
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
@ -223,7 +224,8 @@ void kinetis_pllconfig(void)
* LOCRE0 = 0 if not supported or value provided by board
*/
putreg8(BOARD_MCG_C2_LOCRE0 | BOARD_MCG_C2_FCFTRIM | BOARD_MGC_C2_HGO | MCG_C2_RANGE_VHIGH | MCG_C2_EREFS, KINETIS_MCG_C2);
putreg8(BOARD_MCG_C2_LOCRE0 | BOARD_MCG_C2_FCFTRIM | BOARD_MGC_C2_HGO |
MCG_C2_RANGE_VHIGH | MCG_C2_EREFS, KINETIS_MCG_C2);
# endif
#endif /* defined(BOARD_MCG_C2) */
@ -249,11 +251,11 @@ void kinetis_pllconfig(void)
putreg8(BOARD_FRDIV | MCG_C1_CLKS_EXTREF, KINETIS_MCG_C1);
#ifndef BOARD_EXTCLOCK
/* If we aren't using an oscillator input we don't need to wait for the
* oscillator to initialize
*/
#ifndef BOARD_EXTCLOCK
while ((getreg8(KINETIS_MCG_S) & MCG_S_OSCINIT) == 0);
#endif
@ -438,7 +440,7 @@ void __ramfunc__
kinesis_setdividers(uint32_t div1, uint32_t div2, uint32_t div3, uint32_t div4)
{
uint32_t regval;
int i;
volatile int i;
/* Save the current value of the Flash Access Protection Register */

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@ -1,7 +1,7 @@
/************************************************************************************
* configs/freedom-k64f/include/board.h
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2016-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without

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@ -2,7 +2,7 @@
* configs/teensy-3.x/include/board.h
* include/arch/board/board.h
*
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without