SAMV7 MCAN: Remove SAMA5 kruft; beginning of some interrupt logic
This commit is contained in:
Gregory Nutt
parent
bf8230d7b4
commit
e89d8c4a5f
@ -1603,7 +1603,7 @@ config SAMV7_MCAN0_DEDICATED_TXBUFFER_SIZE
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---help---
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Number of dedicated TX buffer elements for MCAN0.
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config SAMV7_MCAN0_DEDICATED_TXFIFOQ_SIZE
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config SAMV7_MCAN0_TXFIFOQ_SIZE
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int "MCAN0 dedicated TX FIFO queue"
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default 4
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range 0 32
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@ -1764,31 +1764,31 @@ config SAMV7_MCAN1_RXFIFO0_SIZE
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Number of receive FIFO 0 elements. Zero disables FIFO 0.
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choice
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prompt "MCAN1 RX FIFO0 element size"
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default SAMV7_MCAN1_RXFIFO0_32BYTES
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prompt "MCAN1 RX FIFO1 element size"
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default SAMV7_MCAN1_RXFIFO1_32BYTES
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config SAMV7_MCAN1_RXFIFO0_8BYTES
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config SAMV7_MCAN1_RXFIFO1_8BYTES
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bool "8 bytes"
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config SAMV7_MCAN1_RXFIFO0_12BYTES
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config SAMV7_MCAN1_RXFIFO1_12BYTES
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bool "12 bytes"
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config SAMV7_MCAN1_RXFIFO0_16BYTES
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config SAMV7_MCAN1_RXFIFO1_16BYTES
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bool "16 bytes"
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config SAMV7_MCAN1_RXFIFO0_20BYTES
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config SAMV7_MCAN1_RXFIFO1_20BYTES
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bool "20 bytes"
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config SAMV7_MCAN1_RXFIFO0_24BYTES
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config SAMV7_MCAN1_RXFIFO1_24BYTES
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bool "24 bytes"
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config SAMV7_MCAN1_RXFIFO0_32BYTES
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config SAMV7_MCAN1_RXFIFO1_32BYTES
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bool "32 bytes"
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config SAMV7_MCAN1_RXFIFO0_48BYTES
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config SAMV7_MCAN1_RXFIFO1_48BYTES
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bool "48 bytes"
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config SAMV7_MCAN1_RXFIFO0_64BYTES
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config SAMV7_MCAN1_RXFIFO1_64BYTES
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bool "64 bytes"
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endchoice # MCAN1 RX buffer element size
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@ -1881,7 +1881,7 @@ config SAMV7_MCAN1_DEDICATED_TXBUFFER_SIZE
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---help---
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Number of dedicated TX buffer elements for MCAN1.
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config SAMV7_MCAN1_DEDICATED_TXFIFOQ_SIZE
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config SAMV7_MCAN1_TXFIFOQ_SIZE
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int "MCAN1 dedicated TX FIFO queue"
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default 4
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range 0 32
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@ -214,7 +214,7 @@
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#define MCAN_FBTP_FBRP_SHIFT (16) /* Bits 16-20: Fast Baud Rate Prescaler */
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#define MCAN_FBTP_FBRP_MASK (31 << MCAN_FBTP_FBRP_SHIFT)
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# define MCAN_FBTP_FBRP(n) ((uint32_t)(n) << MCAN_FBTP_FBRP_SHIFT)
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#define MCAN_FBTP_TDCO (1 << 23) /* Bit: 23: Transceiver Delay Compensation */
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#define MCAN_FBTP_TDC (1 << 23) /* Bit: 23: Transceiver Delay Compensation */
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#define MCAN_FBTP_TDCO_SHIFT (24) /* Bits 24-28: Transceiver Delay Compensation Offset */
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#define MCAN_FBTP_TDCO_MASK (31 << MCAN_FBTP_TDC_SHIFT)
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# define MCAN_FBTP_TDCO(n) ((uint32_t)(n) << MCAN_FBTP_TDC_SHIFT)
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@ -370,7 +370,7 @@
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#define MCAN_INT_RF1W (1 << 5) /* Bit 5: Receive FIFO 1 Watermark Reached */
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#define MCAN_INT_RF1F (1 << 6) /* Bit 6: Receive FIFO 1 Full */
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#define MCAN_INT_RF1L (1 << 7) /* Bit 7: Receive FIFO 1 Message Lost */
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#define MCAN_INT_HPM (1 << 8) /* Bit 8: High Priority Message */
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#define MCAN_INT_HPM (1 << 8) /* Bit 8: High Priority Message Received */
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#define MCAN_INT_TC (1 << 9) /* Bit 9: Transmission Completed */
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#define MCAN_INT_TCF (1 << 10) /* Bit 10: Transmission Cancellation Finished */
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#define MCAN_INT_TFE (1 << 11) /* Bit 11: Tx FIFO Empty */
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@ -387,7 +387,7 @@
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#define MCAN_INT_EW (1 << 24) /* Bit 24: Warning Status */
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#define MCAN_INT_BO (1 << 25) /* Bit 25: Bus_Off Status */
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#define MCAN_INT_WDI (1 << 26) /* Bit 26: Watchdog Interrupt */
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#define MCAN_INT_CRCE (1 << 27) /* Bit 27: CRC Error */
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#define MCAN_INT_CRCE (1 << 27) /* Bit 27: Receive CRC Error */
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#define MCAN_INT_BE (1 << 28) /* Bit 28: Bit Error */
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#define MCAN_INT_ACKE (1 << 29) /* Bit 29: Acknowledge Error */
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#define MCAN_INT_FOE (1 << 30) /* Bit 30: Format Error */
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@ -444,10 +444,10 @@
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# define MCAN_HPMS_BIDX(n) ((uint32_t)(n) << MCAN_HPMS_BIDX_SHIFT)
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#define MCAN_HPMS_MSI_SHIFT (6) /* Bits 6-7: Message Storage Indicator */
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#define MCAN_HPMS_MSI_MASK (3 << MCAN_HPMS_MSI_SHIFT)
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# define MCAN_HPMS_MSI_ NOFIFO (0 << MCAN_HPMS_MSI_SHIFT) /* No FIFO selected. */
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# define MCAN_HPMS_MSI_ LOST (1 << MCAN_HPMS_MSI_SHIFT) /* FIFO message. */
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# define MCAN_HPMS_MSI_ FIFO0 (2 << MCAN_HPMS_MSI_SHIFT) /* Message stored in FIFO 0. */
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# define MCAN_HPMS_MSI_ FIFO1 (3 << MCAN_HPMS_MSI_SHIFT) /* Message stored in FIFO 1. */
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# define MCAN_HPMS_MSI_NOFIFO (0 << MCAN_HPMS_MSI_SHIFT) /* No FIFO selected. */
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# define MCAN_HPMS_MSI_LOST (1 << MCAN_HPMS_MSI_SHIFT) /* FIFO message. */
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# define MCAN_HPMS_MSI_FIFO0 (2 << MCAN_HPMS_MSI_SHIFT) /* Message stored in FIFO 0. */
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# define MCAN_HPMS_MSI_FIFO1 (3 << MCAN_HPMS_MSI_SHIFT) /* Message stored in FIFO 1. */
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#define MCAN_HPMS_FIDX_SHIFT (8) /* Bits 8-14: Filter Index */
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#define MCAN_HPMS_FIDX_MASK (0x7f << MCAN_HPMS_FIDX_SHIFT)
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# define MCAN_HPMS_FIDX(n) ((uint32_t)(n) << MCAN_HPMS_FIDX_SHIFT)
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File diff suppressed because it is too large
Load Diff
@ -47,55 +47,12 @@
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#include <nuttx/can.h>
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#if defined(CONFIG_CAN) && (defined(CONFIG_SAMV7_CAN0) || \
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defined(CONFIG_SAMV7_CAN1))
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#if defined(CONFIG_CAN) && (defined(CONFIG_SAMV7_MCAN0) || \
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defined(CONFIG_SAMV7_MCAN1))
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* CAN BAUD */
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#if defined(CONFIG_SAMV7_CAN0) && !defined(CONFIG_SAMV7_CAN0_BAUD)
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# error "CONFIG_SAMV7_CAN0_BAUD is not defined"
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#endif
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#if defined(CONFIG_SAMV7_CAN1) && !defined(CONFIG_SAMV7_CAN1_BAUD)
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# error "CONFIG_SAMV7_CAN1_BAUD is not defined"
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#endif
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/* There must be at least one but not more than three receive mailboxes */
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#ifdef CONFIG_SAMV7_CAN0
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# if !defined(CONFIG_SAMV7_CAN0_NRECVMB) || CONFIG_SAMV7_CAN0_NRECVMB < 1
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# undef CONFIG_SAMV7_CAN0_NRECVMB
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# define CONFIG_SAMV7_CAN0_NRECVMB 1
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# endif
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# if CONFIG_SAMV7_CAN0_NRECVMB > 3
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# warning Current implementation only supports up to three receive mailboxes
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# undef CONFIG_SAMV7_CAN0_NRECVMB
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# define CONFIG_SAMV7_CAN0_NRECVMB 3
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# endif
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#else
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# undef CONFIG_SAMV7_CAN0_NRECVMB
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# define CONFIG_SAMV7_CAN0_NRECVMB 0
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#endif
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#ifdef CONFIG_SAMV7_CAN1
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# if !defined(CONFIG_SAMV7_CAN1_NRECVMB) || CONFIG_SAMV7_CAN1_NRECVMB < 1
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# undef CONFIG_SAMV7_CAN1_NRECVMB
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# define CONFIG_SAMV7_CAN1_NRECVMB 1
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# endif
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# if CONFIG_SAMV7_CAN1_NRECVMB > 3
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# warning Current implementation only supports up to three receive mailboxes
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# undef CONFIG_SAMV7_CAN1_NRECVMB
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# define CONFIG_SAMV7_CAN1_NRECVMB 3
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# endif
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#else
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# undef CONFIG_SAMV7_CAN1_NRECVMB
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# define CONFIG_SAMV7_CAN1_NRECVMB 0
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#endif
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/* Port numbers for use with sam_mcan_initialize() */
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@ -149,5 +106,5 @@ FAR struct can_dev_s *sam_mcan_initialize(int port);
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_CAN && (CONFIG_SAMV7_CAN0 || CONFIG_SAMV7_CAN1) */
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#endif /* CONFIG_CAN && (CONFIG_SAMV7_MCAN0 || CONFIG_SAMV7_MCAN1) */
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#endif /* __ARCH_ARM_SRC_SAMV7_SAM_MCAN_H */
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