Enhanced debug; need a delay after removing PWDN
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2198 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
995e1e32d9
commit
e8b481d5e3
@ -336,10 +336,12 @@ struct stm32_usbdev_s
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static uint16 stm32_getreg(uint32 addr);
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static void stm32_putreg(uint16 val, uint32 addr);
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static void stm32_checksetup(void);
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static void stm32_dumpep(int epno);
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#else
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# define stm32_getreg(addr) getreg16(addr)
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# define stm32_putreg(val,addr) putreg16(val,addr)
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# define stm32_getreg(addr) getreg16(addr)
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# define stm32_putreg(val,addr) putreg16(val,addr)
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# define stm32_checksetup()
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# define stm32_dumpep(epno)
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#endif
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/* Low-Level Helpers ********************************************************/
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@ -548,7 +550,7 @@ static uint16 stm32_getreg(uint32 addr)
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/* Show the register value read */
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lldbg("%08x->%08x\n", addr, val);
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lldbg("%08x->%04x\n", addr, val);
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return val;
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}
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#endif
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@ -562,7 +564,7 @@ static void stm32_putreg(uint16 val, uint32 addr)
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{
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/* Show the register value being written */
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lldbg("%08x<-%08x\n", addr, val);
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lldbg("%08x<-%04x\n", addr, val);
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/* Write the value */
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@ -570,6 +572,47 @@ static void stm32_putreg(uint16 val, uint32 addr)
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}
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#endif
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/****************************************************************************
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* Name: stm32_dumpep
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****************************************************************************/
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static void stm32_dumpep(int epno)
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{
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uint32 addr;
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/* Common registers */
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lldbg("CNTR: %04x\n", getreg16(STM32_USB_CNTR));
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lldbg("ISTR: %04x\n", getreg16(STM32_USB_ISTR));
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lldbg("FNR: %04x\n", getreg16(STM32_USB_FNR));
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lldbg("DADDR: %04x\n", getreg16(STM32_USB_DADDR));
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lldbg("BTABLE: %04x\n", getreg16(STM32_USB_BTABLE));
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/* Endpoint register */
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addr = STM32_USB_EPR(epno);
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lldbg("EPR%02d: [%08x] %04x\n", epno, addr, getreg16(addr));
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/* Endpoint descriptor */
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addr = STM32_USB_BTABLE_ADDR(epno, 0);
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lldbg("DESC: %08x\n", addr);
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/* Endpoint buffer descriptor */
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addr = STM32_USB_ADDR_TX(epno);
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lldbg(" TX ADDR: [%08x] %04x\n", addr, getreg16(addr));
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addr = STM32_USB_COUNT_TX(epno);
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lldbg(" COUNT: [%08x] %04x\n", addr, getreg16(addr));
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addr = STM32_USB_ADDR_RX(epno);
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lldbg(" RX ADDR: [%08x] %04x\n", addr, getreg16(addr));
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addr = STM32_USB_COUNT_RX(epno);
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lldbg(" COUNT: [%08x] %04x\n", addr, getreg16(addr));
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}
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/****************************************************************************
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* Name: stm32_checksetup
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****************************************************************************/
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@ -577,7 +620,7 @@ static void stm32_putreg(uint16 val, uint32 addr)
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#if defined(CONFIG_STM32_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG)
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static void stm32_checksetup(void)
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{
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uint32 cfgr = getreg32(STM32_RCC_CFGR);
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uint32 cfgr = getreg32(STM32_RCC_CFGR);
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uint32 apb1rstr = getreg32(STM32_RCC_APB1RSTR);
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uint32 apb1enr = getreg32(STM32_RCC_APB1ENR);
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@ -623,31 +666,39 @@ static void stm32_epsetrxcount(ubyte epno, uint16 count)
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uint32 *epaddr = (uint32*)STM32_USB_COUNT_RX(epno);
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uint16 nblocks;
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/* The upper bits of the RX COUNT value contain the size of allocated
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* RX buffer. This is based on a block size of 2 or 32:
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*
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* USB_COUNT_RX_BL_SIZE not set:
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* nblocks is in units of 2 bytes.
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* 00000 - not allowed
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* 00001 - 2 bytes
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* ....
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* 11111 - 62 bytes
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*
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* USB_COUNT_RX_BL_SIZE set:
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* 00000 - 32 bytes
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* 00001 - 64 bytes
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* ...
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* 01111 - 512 bytes
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* 1xxxx - Not allowed
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*/
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if (count > 62)
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{
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/* Blocks of 32 */
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/* Blocks of 32 (with 0 meaning one block of 32) */
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nblocks = count >> 5;
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if((count & 0x1f) == 0)
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{
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nblocks--;
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}
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*epaddr = (uint32)((nblocks << 10) | 0x8000);
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nblocks = (count >> 5) - 1 ;
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DEBUGASSERT(nblocks <= 0x0f);
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*epaddr = (uint32)((nblocks << USB_COUNT_RX_NUM_BLOCK_SHIFT) | USB_COUNT_RX_BL_SIZE);
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}
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else
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{
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/* Blocks of 2 */
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/* Blocks of 2 (with 1 meaning one block of 2) */
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nblocks = count >> 1;
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if((count & 0x1) != 0)
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{
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nblocks++;
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}
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*epaddr = (uint32)(nblocks << 10);
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nblocks = (count + 1) >> 1;
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DEBUGASSERT(nblocks > 0 && nblocks < 0x1f);
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*epaddr = (uint32)(nblocks << USB_COUNT_RX_NUM_BLOCK_SHIFT);
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}
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}
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@ -2542,6 +2593,8 @@ static int stm32_epconfigure(struct usbdev_ep_s *ep,
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stm32_seteprxstatus(epno, USB_EPR_STATRX_VALID);
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stm32_seteptxstatus(epno, USB_EPR_STATTX_DIS);
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}
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stm32_dumpep(epno);
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return OK;
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}
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@ -3059,6 +3112,7 @@ static int stm32_selfpowered(struct usbdev_s *dev, boolean selfpowered)
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/****************************************************************************
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* Initialization
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_reset
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****************************************************************************/
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@ -3067,9 +3121,9 @@ static void stm32_reset(struct stm32_usbdev_s *priv)
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{
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int epno;
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/* Disable the USB controller, disable all USB interrupts */
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/* Put the USB controller in reset, disable all interrupts */
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stm32_putreg(USB_CNTR_FRES|USB_CNTR_PDWN, STM32_USB_CNTR);
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stm32_putreg(USB_CNTR_FRES, STM32_USB_CNTR);
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/* Reset the device state structure */
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@ -3098,16 +3152,6 @@ static void stm32_reset(struct stm32_usbdev_s *priv)
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/* Re-configure the USB controller in its initial, unconnected state */
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stm32_hwreset(priv);
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/* Enable USB controller interrupts */
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up_enable_irq(STM32_IRQ_USBHPCANTX);
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up_enable_irq(STM32_IRQ_USBLPCANRX0);
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/* Set the interrrupt priority */
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up_prioritize_irq(STM32_IRQ_USBHPCANTX, CONFIG_USB_PRI);
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up_prioritize_irq(STM32_IRQ_USBLPCANRX0, CONFIG_USB_PRI);
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}
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/****************************************************************************
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@ -3116,7 +3160,7 @@ static void stm32_reset(struct stm32_usbdev_s *priv)
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static void stm32_hwreset(struct stm32_usbdev_s *priv)
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{
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/* Put the USB controller into reset */
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/* Put the USB controller into reset, clear all interrupt enables */
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stm32_putreg(USB_CNTR_FRES, STM32_USB_CNTR);
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@ -3125,7 +3169,7 @@ static void stm32_hwreset(struct stm32_usbdev_s *priv)
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priv->imask = 0;
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stm32_putreg(priv->imask, STM32_USB_CNTR);
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/* Clear pending interrupts */
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/* Clear any pending interrupts */
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stm32_putreg(0, STM32_USB_ISTR);
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@ -3147,9 +3191,10 @@ static void stm32_hwreset(struct stm32_usbdev_s *priv)
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stm32_setdevaddr(priv, 0);
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/* Enable interrupts at the USB controllr */
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/* Enable interrupts at the USB controller */
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stm32_setimask(priv, STM32_CNTR_SETUP, (USB_CNTR_ALLINTS & ~STM32_CNTR_SETUP));
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stm32_dumpep(EP0);
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}
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/****************************************************************************
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@ -3180,7 +3225,9 @@ void up_usbinitialize(void)
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usbtrace(TRACE_DEVINIT, 0);
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stm32_checksetup();
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/* Disable the USB controller, disable all USB interrupts */
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/* Power the USB controller, put the USB controller into reset, disable
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* all USB interrupts
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*/
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stm32_putreg(USB_CNTR_FRES|USB_CNTR_PDWN, STM32_USB_CNTR);
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@ -3223,17 +3270,27 @@ void up_usbinitialize(void)
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priv->eplist[epno].ep.maxpacket = STM32_MAXPACKET_SIZE;
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}
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/* Select a smallest endpoint size for EP0 */
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/* Select a smaller endpoint size for EP0 */
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#if STM32_EP0MAXPACKET < STM32_MAXPACKET_SIZE
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priv->eplist[EP0].ep.maxpacket = STM32_EP0MAXPACKET;
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#endif
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/* Power up the USB controller, holding it in reset. There is a delay of
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* about 1uS after applying power before the USB will behave predictably.
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* One millisecond is more than enough.
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*/
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stm32_putreg(USB_CNTR_FRES, STM32_USB_CNTR);
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up_mdelay(1);
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/* Setup the USB controller */
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stm32_hwreset(priv);
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/* Attach USB controller interrupt handlers */
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/* Attach USB controller interrupt handlers. Interrupts will not be
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* enabled until the class device is registered
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*/
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if (irq_attach(STM32_IRQ_USBHPCANTX, stm32_hpinterrupt) != 0)
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{
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@ -3295,11 +3352,11 @@ void up_usbuninitialize(void)
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irq_detach(STM32_IRQ_USBHPCANTX);
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irq_detach(STM32_IRQ_USBLPCANRX0);
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/* Disable all ints and force USB reset */
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/* Disable all interrupts and force the USB controller into reset */
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stm32_putreg(USB_CNTR_FRES, STM32_USB_CNTR);
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/* Clear pending interrupts */
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/* Clear any pending interrupts */
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stm32_putreg(0, STM32_USB_ISTR);
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@ -3307,7 +3364,7 @@ void up_usbuninitialize(void)
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stm32_usbpullup(&priv->usbdev, FALSE);
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/* Disable USB */
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/* Power down the USB controller */
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stm32_putreg(USB_CNTR_FRES|USB_CNTR_PDWN, STM32_USB_CNTR);
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irqrestore(flags);
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