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STM32L4 RCC: enable ADC clock source

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This commit is contained in:
Juha Niskanen 2017-08-28 06:50:13 -06:00 committed by Gregory Nutt
parent 81d6cefd65
commit e8cd2f88b8
3 changed files with 115 additions and 46 deletions
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55
arch/arm/src/stm32l4/stm32l4x3xx_rcc.c
View File

@ -204,7 +204,7 @@ static inline void rcc_enableahb2(void)
);
#endif
#if defined(CONFIG_STM32L4_ADC1) || defined(CONFIG_STM32L4_ADC2) || defined(CONFIG_STM32L4_ADC3)
#if defined(CONFIG_STM32L4_ADC1)
/* ADC clock enable */
regval |= RCC_AHB2ENR_ADCEN;
@ -500,6 +500,43 @@ static inline void rcc_enableapb2(void)
putreg32(regval, STM32L4_RCC_APB2ENR); /* Enable peripherals */
}
/****************************************************************************
* Name: rcc_enableccip
*
* Description:
* Set peripherals independent clock configuration.
*
****************************************************************************/
static inline void rcc_enableccip(void)
{
uint32_t regval;
/* Certain peripherals have no clock selected even when their enable bit is
* set. Set some defaults in the CCIPR register so those peripherals
* will at least have a clock.
*/
regval = getreg32(STM32L4_RCC_CCIPR);
#if defined(STM32L4_USE_CLK48)
/* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source
* and then we can also do away with STM32L4_USE_CLK48, and give better
* warning messages.
*/
regval |= STM32L4_CLK48_SEL;
#endif
#if defined(CONFIG_STM32L4_ADC1)
/* Select SYSCLK as ADC clock source */
regval |= RCC_CCIPR_ADCSEL_SYSCLK;
#endif
putreg32(regval, STM32L4_RCC_CCIPR);
}
/****************************************************************************
* Name: stm32l4_stdclockconfig
*
@ -828,21 +865,6 @@ static void stm32l4_stdclockconfig(void)
regval |= RCC_CR_MSIPLLEN;
putreg32(regval, STM32L4_RCC_CR);
# endif
#endif
#if defined(STM32L4_USE_CLK48)
/* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source
* and then we can also do away with STM32L4_USE_CLK48, and give better
* warning messages
*
* XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already
* enabled ZZZ
*/
regval = getreg32(STM32L4_RCC_CCIPR);
regval &= RCC_CCIPR_CLK48SEL_MASK;
regval |= STM32L4_CLK48_SEL;
putreg32(regval, STM32L4_RCC_CCIPR);
#endif
}
}
@ -854,6 +876,7 @@ static void stm32l4_stdclockconfig(void)
static inline void rcc_enableperipherals(void)
{
rcc_enableccip();
rcc_enableahb1();
rcc_enableahb2();
rcc_enableahb3();

53
arch/arm/src/stm32l4/stm32l4x5xx_rcc.c
View File

@ -529,6 +529,43 @@ static inline void rcc_enableapb2(void)
putreg32(regval, STM32L4_RCC_APB2ENR); /* Enable peripherals */
}
/****************************************************************************
* Name: rcc_enableccip
*
* Description:
* Set peripherals independent clock configuration.
*
****************************************************************************/
static inline void rcc_enableccip(void)
{
uint32_t regval;
/* Certain peripherals have no clock selected even when their enable bit is
* set. Set some defaults in the CCIPR register so those peripherals
* will at least have a clock.
*/
regval = getreg32(STM32L4_RCC_CCIPR);
#if defined(STM32L4_USE_CLK48)
/* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source
* and then we can also do away with STM32L4_USE_CLK48, and give better
* warning messages.
*/
regval |= STM32L4_CLK48_SEL;
#endif
#if defined(CONFIG_STM32L4_ADC1) || defined(CONFIG_STM32L4_ADC2) || defined(CONFIG_STM32L4_ADC3)
/* Select SYSCLK as ADC clock source */
regval |= RCC_CCIPR_ADCSEL_SYSCLK;
#endif
putreg32(regval, STM32L4_RCC_CCIPR);
}
/****************************************************************************
* Name: stm32l4_stdclockconfig
*
@ -857,21 +894,6 @@ static void stm32l4_stdclockconfig(void)
regval |= RCC_CR_MSIPLLEN;
putreg32(regval, STM32L4_RCC_CR);
# endif
#endif
#if defined(STM32L4_USE_CLK48)
/* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source
* and then we can also do away with STM32L4_USE_CLK48, and give better
* warning messages
*
* XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already
* enabled ZZZ
*/
regval = getreg32(STM32L4_RCC_CCIPR);
regval &= RCC_CCIPR_CLK48SEL_MASK;
regval |= STM32L4_CLK48_SEL;
putreg32(regval, STM32L4_RCC_CCIPR);
#endif
}
}
@ -883,6 +905,7 @@ static void stm32l4_stdclockconfig(void)
static inline void rcc_enableperipherals(void)
{
rcc_enableccip();
rcc_enableahb1();
rcc_enableahb2();
rcc_enableahb3();

53
arch/arm/src/stm32l4/stm32l4x6xx_rcc.c
View File

@ -574,6 +574,43 @@ static inline void rcc_enableapb2(void)
putreg32(regval, STM32L4_RCC_APB2ENR); /* Enable peripherals */
}
/****************************************************************************
* Name: rcc_enableccip
*
* Description:
* Set peripherals independent clock configuration.
*
****************************************************************************/
static inline void rcc_enableccip(void)
{
uint32_t regval;
/* Certain peripherals have no clock selected even when their enable bit is
* set. Set some defaults in the CCIPR register so those peripherals
* will at least have a clock.
*/
regval = getreg32(STM32L4_RCC_CCIPR);
#if defined(STM32L4_USE_CLK48)
/* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source
* and then we can also do away with STM32L4_USE_CLK48, and give better
* warning messages.
*/
regval |= STM32L4_CLK48_SEL;
#endif
#if defined(CONFIG_STM32L4_ADC1) || defined(CONFIG_STM32L4_ADC2) || defined(CONFIG_STM32L4_ADC3)
/* Select SYSCLK as ADC clock source */
regval |= RCC_CCIPR_ADCSEL_SYSCLK;
#endif
putreg32(regval, STM32L4_RCC_CCIPR);
}
/****************************************************************************
* Name: stm32l4_stdclockconfig
*
@ -902,21 +939,6 @@ static void stm32l4_stdclockconfig(void)
regval |= RCC_CR_MSIPLLEN;
putreg32(regval, STM32L4_RCC_CR);
# endif
#endif
#if defined(STM32L4_USE_CLK48)
/* XXX sanity if sdmmc1 or usb or rng, then we need to set the clk48 source
* and then we can also do away with STM32L4_USE_CLK48, and give better
* warning messages
*
* XXX sanity if our STM32L4_CLK48_SEL is YYY then we need to have already
* enabled ZZZ
*/
regval = getreg32(STM32L4_RCC_CCIPR);
regval &= RCC_CCIPR_CLK48SEL_MASK;
regval |= STM32L4_CLK48_SEL;
putreg32(regval, STM32L4_RCC_CCIPR);
#endif
}
}
@ -928,6 +950,7 @@ static void stm32l4_stdclockconfig(void)
static inline void rcc_enableperipherals(void)
{
rcc_enableccip();
rcc_enableahb1();
rcc_enableahb2();
rcc_enableahb3();