From dbe4978c6a2ec33db22380f903e698d88abc1964 Mon Sep 17 00:00:00 2001 From: Sungki Kim Date: Sun, 13 Aug 2017 22:42:10 +0900 Subject: [PATCH 1/2] fix gpio enable reg --- arch/xtensa/src/esp32/esp32_gpio.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/xtensa/src/esp32/esp32_gpio.c b/arch/xtensa/src/esp32/esp32_gpio.c index b351765126..15e431973d 100644 --- a/arch/xtensa/src/esp32/esp32_gpio.c +++ b/arch/xtensa/src/esp32/esp32_gpio.c @@ -178,7 +178,7 @@ int esp32_configgpio(int pin, gpio_pinattr_t attr) } else { - putreg32((1ul << (pin - 32)), GPIO_ENABLE1_DATA_W1TC); + putreg32((1ul << (pin - 32)), GPIO_ENABLE1_W1TC_REG); } if ((attr & PULLUP) != 0) @@ -197,11 +197,11 @@ int esp32_configgpio(int pin, gpio_pinattr_t attr) { if (pin < 32) { - putreg32((1ul << pin), GPIO_ENABLE_DATA_W1TS); + putreg32((1ul << pin), GPIO_ENABLE_W1TS_REG); } else { - putreg32((1ul << (pin - 32)), GPIO_ENABLE1_DATA_W1TS); + putreg32((1ul << (pin - 32)), GPIO_ENABLE1_W1TS_REG); } } From d9c1f37ed58d2e5fb5d98353d068a2e9b114423c Mon Sep 17 00:00:00 2001 From: Sungki Kim Date: Sun, 13 Aug 2017 22:42:42 +0900 Subject: [PATCH 2/2] modify default uart pin for ESP-WROOM-32 --- arch/xtensa/src/esp32/Kconfig | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/xtensa/src/esp32/Kconfig b/arch/xtensa/src/esp32/Kconfig index 92e6002125..4a320d3325 100644 --- a/arch/xtensa/src/esp32/Kconfig +++ b/arch/xtensa/src/esp32/Kconfig @@ -234,23 +234,23 @@ if ESP32_UART0 config ESP32_UART0_TXPIN int "UART0 Tx Pin" - default 0 + default 1 range 0 39 config ESP32_UART0_RXPIN int "UART0 Rx Pin" - default 0 + default 3 range 0 39 if SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL config ESP32_UART0_RTSPIN int "UART0 RTS Pin" - default 0 + default 22 range 0 39 config ESP32_UART0_CTSPIN int "UART0 CTS Pin" - default 0 + default 19 range 0 39 endif # SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL @@ -260,23 +260,23 @@ if ESP32_UART1 config ESP32_UART1_TXPIN int "UART1 Tx Pin" - default 0 + default 10 range 0 39 config ESP32_UART1_RXPIN int "UART1 Rx Pin" - default 0 + default 9 range 0 39 if SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL config ESP32_UART1_RTSPIN int "UART1 RTS Pin" - default 0 + default 11 range 0 39 config ESP32_UART1_CTSPIN int "UART1 CTS Pin" - default 0 + default 6 range 0 39 endif # SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL @@ -286,23 +286,23 @@ if ESP32_UART2 config ESP32_UART2_TXPIN int "UART2 Tx Pin" - default 0 + default 17 range 0 39 config ESP32_UART2_RXPIN int "UART2 Rx Pin" - default 0 + default 16 range 0 39 if SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL config ESP32_UART2_RTSPIN int "UART2 RTS Pin" - default 0 + default 7 range 0 39 config ESP32_UART2_CTSPIN int "UART2 CTS Pin" - default 0 + default 8 range 0 39 endif # SERIAL_IFLOWCONTROL || SERIAL_OFLOWCONTROL