arch/arm: add qemu support for ARM32
Signed-off-by: wangming9 <wangming9@xiaomi.com>
This commit is contained in:
wangming9
Xiang Xiao
parent
88f3bc77f1
commit
e953715e6d
@ -631,6 +631,11 @@ config ARCH_CHIP_TLSR82
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---help---
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Telink tlsr82xx architectures (Customed armv6m)
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config ARCH_CHIP_QEMU_ARM
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bool "QEMU virt platform (ARMv7a)"
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---help---
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QEMU virt platform (ARMv7a)
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config ARCH_CHIP_ARM_CUSTOM
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bool "Custom ARM chip"
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select ARCH_CHIP_CUSTOM
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@ -1033,6 +1038,7 @@ config ARCH_CHIP
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default "cxd56xx" if ARCH_CHIP_CXD56XX
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default "phy62xx" if ARCH_CHIP_PHY62XX
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default "tlsr82" if ARCH_CHIP_TLSR82
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default "qemu" if ARCH_CHIP_QEMU_ARM
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config ARM_THUMB
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bool "Thumb Mode"
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@ -1492,4 +1498,7 @@ endif
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if ARCH_CHIP_TLSR82
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source "arch/arm/src/tlsr82/Kconfig"
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endif
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if ARCH_CHIP_QEMU_ARM
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source "arch/arm/src/qemu/Kconfig"
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endif
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endif # ARCH_ARM
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46
arch/arm/include/qemu/chip.h
Normal file
46
arch/arm/include/qemu/chip.h
Normal file
@ -0,0 +1,46 @@
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/****************************************************************************
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* arch/arm/include/qemu/chip.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_QEMU_CHIP_H
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#define __ARCH_ARM_INCLUDE_QEMU_CHIP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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#endif /* __ARCH_ARM_INCLUDE_QEMU_CHIP_H */
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69
arch/arm/include/qemu/irq.h
Normal file
69
arch/arm/include/qemu/irq.h
Normal file
@ -0,0 +1,69 @@
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/****************************************************************************
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* arch/arm/include/qemu/irq.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather,
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* only indirectly through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_QEMU_IRQ_H
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#define __ARCH_ARM_INCLUDE_QEMU_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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#define NR_IRQS 220 /* Total number of interrupts */
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_ARM_INCLUDE_QEMU_IRQ_H */
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@ -179,6 +179,7 @@
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#define CP15_VBAR(r) _CP15(0, r, c12, c0, 0) /* Vector Base Address Register */
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#define CP15_MVBAR(r) _CP15(0, r, c12, c0, 1) /* Monitor Vector Base Address Register */
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#define CP15_HVBAR(r) _CP15(4, r, c12, c0, 0) /* Hyp Vector Base Address Register */
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#define CP15_ISR(r) _CP15(0, r, c12, c1, 0) /* Interrupt Status Register */
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#define CP15_VIR(r) _CP15(0, r, c12, c1, 1) /* Virtualization Interrupt Register */
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@ -193,9 +194,12 @@
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#define CP15_CNTP_TVAL(r) _CP15(0, r, c14, c2, 0) /* PL1 Physical TimerValue register */
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#define CP15_CNTP_CTL(r) _CP15(0, r, c14, c2, 1) /* PL1 Physical Timer Control register */
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#define CP15_CNTV_TVAL(r) _CP15(0, r, c14, c3, 0) /* Virtual TimerValue register */
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#define CP15_CNTV_CTL(r) _CP15(0, r, c14, c3, 0) /* Virtual Timer Control register */
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#define CP15_CNTV_CTL(r) _CP15(0, r, c14, c3, 1) /* Virtual Timer Control register */
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#define CP15_CNTPCT(lo,hi) _CP15_64(0, lo, hi, c14) /* Physical Count register */
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#define CP15_CNTPCT(lo,hi) _CP15_64(0, lo, hi, c14) /* Physical Count register */
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#define CP15_CNTVCT(lo,hi) _CP15_64(1, lo, hi, c14) /* Virtual Count register */
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#define CP15_CNTV_CVAL(lo,hi) _CP15_64(3, lo, hi, c14) /* Virtual Timer CompareValue register */
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#define CP15_CNTP_CVAL(lo,hi) _CP15_64(2, lo, hi, c14) /* Physical Timer CompareValue register */
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#define CP15_PWRCTRL(r) _CP15(0, r, c15, c0, 0) /* Power Control Register (Cortex-A9) */
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#define CP15_NEONBUSY(r) _CP15(0, r, c15, c1, 1) /* NEON Busy Register (Cortex-A9) */
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@ -44,17 +44,27 @@
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/* Peripheral Base Offsets **************************************************/
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#ifndef MPCORE_SCU_OFFSET
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#define MPCORE_SCU_OFFSET 0x0000 /* 0x0000-0x00fc SCU registers */
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#endif
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#ifndef MPCORE_ICC_OFFSET
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#ifdef CONFIG_ARCH_CORTEXA7
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#define MPCORE_ICC_OFFSET 0x2000 /* 0x0000-0x00FC Interrupt controller interface */
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#else
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#define MPCORE_ICC_OFFSET 0x0100 /* 0x0000-0x00FC Interrupt controller interface */
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#endif
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#endif
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#ifndef MPCORE_GTM_OFFSET
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#define MPCORE_GTM_OFFSET 0x0200 /* 0x0200-0x02ff Global timer */
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#endif
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/* 0x0300-0x05ff Reserved */
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#ifndef MPCORE_PTM_OFFSET
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#define MPCORE_PTM_OFFSET 0x0600 /* 0x0600-0x06ff Private timers and watchdogs */
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#endif
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/* 0x0700-0x07ff Reserved */
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#ifndef MPCORE_ICD_OFFSET
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#define MPCORE_ICD_OFFSET 0x1000 /* 0x1000-0x1fff Interrupt Distributor */
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#endif
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/* Peripheral Base Addresses ************************************************/
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@ -495,11 +495,31 @@ static inline unsigned int cp15_rdvbar(void)
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return CP15_GET(VBAR);
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}
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static inline unsigned int cp15_rdmvbar(void)
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{
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return CP15_GET(MVBAR);
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}
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static inline unsigned int cp15_rdhvbar(void)
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{
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return CP15_GET(HVBAR);
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}
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static inline void cp15_wrvbar(unsigned int vbar)
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{
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CP15_SET(VBAR, vbar);
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}
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static inline void cp15_wrhvbar(unsigned int vbar)
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{
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CP15_SET(HVBAR, vbar);
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}
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static inline void cp15_wrmvbar(unsigned int vbar)
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{
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CP15_SET(MVBAR, vbar);
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}
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/* Read/write the implementation defined Auxiliary Control Register (ACTLR) */
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static inline unsigned int cp15_rdactlr(void)
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@ -155,7 +155,7 @@
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#define CP15_CNTP_TVAL(r) _CP15(0, r, c14, c2, 0) /* PL1 Physical TimerValue register */
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#define CP15_CNTP_CTL(r) _CP15(0, r, c14, c2, 1) /* PL1 Physical Timer Control register */
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#define CP15_CNTV_TVAL(r) _CP15(0, r, c14, c3, 0) /* Virtual TimerValue register */
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#define CP15_CNTV_CTL(r) _CP15(0, r, c14, c3, 0) /* Virtual Timer Control register */
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#define CP15_CNTV_CTL(r) _CP15(0, r, c14, c3, 1) /* Virtual Timer Control register */
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#define CP15_CNTPCT(lo,hi) _CP15_64(0, lo, hi, c14) /* Physical Count register */
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30
arch/arm/src/qemu/Kconfig
Normal file
30
arch/arm/src/qemu/Kconfig
Normal file
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#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_CHIP_QEMU_ARM
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menu "Qemu Virt Chip Selection"
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choice
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prompt "Qemu Core Configuration"
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default ARCH_CHIP_QEMU_CORTEXA7
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config ARCH_CHIP_QEMU_CORTEXA7
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bool "Qemu virtual Processor (cortex-a7)"
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select ARCH_CORTEXA7
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select ARCH_HAVE_ADDRENV
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select ARCH_HAVE_LOWVECTORS
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select ARCH_HAVE_MULTICPU
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select ARCH_HAVE_TRUSTZONE
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select ARCH_NEED_ADDRENV_MAPPING
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select ARMV7A_HAVE_GICv2
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select ARMV7A_HAVE_GTM
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select ARMV7A_HAVE_PTM
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endchoice # Qemu Chip Selection
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endmenu # "Qemu Virt Chip Selection"
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endif # ARCH_CHIP_QEMU_ARM
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28
arch/arm/src/qemu/Make.defs
Normal file
28
arch/arm/src/qemu/Make.defs
Normal file
@ -0,0 +1,28 @@
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############################################################################
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# arch/arm/src/qemu/Make.defs
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more
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# contributor license agreements. See the NOTICE file distributed with
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# this work for additional information regarding copyright ownership. The
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# ASF licenses this file to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance with the
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# License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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#
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############################################################################
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include armv7-a/Make.defs
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# qemu-specific C source files
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CHIP_CSRCS = qemu_boot.c qemu_serial.c qemu_irq.c qemu_timer.c qemu_memorymap.c
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ifeq ($(CONFIG_DRIVERS_VIRTIO_NET),y)
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CHIP_CSRCS += qemu_net.c
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endif
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114
arch/arm/src/qemu/chip.h
Normal file
114
arch/arm/src/qemu/chip.h
Normal file
@ -0,0 +1,114 @@
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/****************************************************************************
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* arch/arm/src/qemu/chip.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_QEMU_CHIP_H
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#define __ARCH_ARM_SRC_QEMU_CHIP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define CHIP_MPCORE_VBASE 0x8000000
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#define MPCORE_ICD_OFFSET 0x0000
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#define MPCORE_ICC_OFFSET 0x10000
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#define PGTABLE_BASE_PADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - ALL_PGTABLE_SIZE)
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#define PGTABLE_BASE_VADDR (CONFIG_RAM_START + CONFIG_RAM_SIZE - ALL_PGTABLE_SIZE)
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#define NUTTX_TEXT_VADDR (CONFIG_FLASH_VSTART & 0xfff00000)
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#define NUTTX_TEXT_PADDR (CONFIG_FLASH_VSTART & 0xfff00000)
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#define NUTTX_TEXT_PEND ((CONFIG_FLASH_END + 0x000fffff) & 0xfff00000)
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#define NUTTX_TEXT_SIZE (NUTTX_TEXT_PEND - NUTTX_TEXT_PADDR)
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#define NUTTX_RAM_VADDR (CONFIG_RAM_VSTART & 0xfff00000)
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#define NUTTX_RAM_PADDR (CONFIG_RAM_START & 0xfff00000)
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#define NUTTX_RAM_PEND ((CONFIG_RAM_END + 0x000fffff) & 0xfff00000)
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#define NUTTX_RAM_SIZE (NUTTX_RAM_PEND - NUTTX_RAM_PADDR)
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/****************************************************************************
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* Macro Definitions
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****************************************************************************/
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#ifdef __ASSEMBLY__
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/****************************************************************************
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* Name: cpuindex
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*
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* Description:
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* Return an index idenifying the current CPU.
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*
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****************************************************************************/
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#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
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.macro cpuindex, index
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mrc p15, 0, \index, c0, c0, 5 /* Read the MPIDR */
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and \index, \index, #3 /* Bits 0-1=CPU ID */
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.endm
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#endif
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/****************************************************************************
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* Name: setirqstack
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*
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* Description:
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* Set the current stack pointer to the -"top" of the IRQ interrupt
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* stack for the current CPU.
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*
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****************************************************************************/
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#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
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.macro setirqstack, tmp1, tmp2
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mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */
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and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */
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ldr \tmp2, =g_irqstack_top /* tmp2=Array of IRQ stack pointers */
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lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */
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add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */
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ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */
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.endm
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#endif
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/****************************************************************************
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* Name: setfiqstack
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*
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* Description:
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* Set the current stack pointer to the -"top" of the FIQ interrupt
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* stack for the current CPU.
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*
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****************************************************************************/
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#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
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.macro setfiqstack, tmp1, tmp2
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mrc p15, 0, \tmp1, c0, c0, 5 /* tmp1=MPIDR */
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and \tmp1, \tmp1, #3 /* Bits 0-1=CPU ID */
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ldr \tmp2, =g_fiqstack_top /* tmp2=Array of FIQ stack pointers */
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lsls \tmp1, \tmp1, #2 /* tmp1=Array byte offset */
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add \tmp2, \tmp2, \tmp1 /* tmp2=Offset address into array */
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ldr sp, [\tmp2, #0] /* sp=Address in stack allocation */
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.endm
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_QEMU_CHIP_H */
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57
arch/arm/src/qemu/qemu_boot.c
Normal file
57
arch/arm/src/qemu/qemu_boot.c
Normal file
@ -0,0 +1,57 @@
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/****************************************************************************
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* arch/arm/src/qemu/qemu_boot.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
|
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* this work for additional information regarding copyright ownership. The
|
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
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* "License"); you may not use this file except in compliance with the
|
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
|
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "arm_internal.h"
|
||||
|
||||
#include "qemu_irq.h"
|
||||
#include "qemu_memorymap.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_boot
|
||||
*
|
||||
* Description:
|
||||
* Complete boot operations started in arm_head.S
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void arm_boot(void)
|
||||
{
|
||||
/* Set the page table for section */
|
||||
|
||||
qemu_setupmappings();
|
||||
|
||||
#ifdef USE_EARLYSERIALINIT
|
||||
/* Perform early serial initialization if we are going to use the serial
|
||||
* driver.
|
||||
*/
|
||||
|
||||
arm_earlyserialinit();
|
||||
#endif
|
||||
}
|
||||
159
arch/arm/src/qemu/qemu_irq.c
Normal file
159
arch/arm/src/qemu/qemu_irq.c
Normal file
@ -0,0 +1,159 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/qemu/qemu_irq.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/arch.h>
|
||||
|
||||
#include "arm_internal.h"
|
||||
#include "sctlr.h"
|
||||
#include "gic.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Size of the interrupt stack allocation */
|
||||
|
||||
#define INTSTACK_ALLOC (CONFIG_SMP_NCPUS * INTSTACK_SIZE)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
|
||||
/* In the SMP configuration, we will need custom IRQ and FIQ stacks.
|
||||
* These definitions provide the aligned stack allocations.
|
||||
*/
|
||||
|
||||
static uint64_t g_irqstack_alloc[INTSTACK_ALLOC >> 3];
|
||||
static uint64_t g_fiqstack_alloc[INTSTACK_ALLOC >> 3];
|
||||
|
||||
/* These are arrays that point to the top of each interrupt stack */
|
||||
|
||||
uintptr_t g_irqstack_top[CONFIG_SMP_NCPUS] =
|
||||
{
|
||||
(uintptr_t)g_irqstack_alloc + INTSTACK_SIZE,
|
||||
#if CONFIG_SMP_NCPUS > 1
|
||||
(uintptr_t)g_irqstack_alloc + (2 * INTSTACK_SIZE),
|
||||
#endif
|
||||
#if CONFIG_SMP_NCPUS > 2
|
||||
(uintptr_t)g_irqstack_alloc + (3 * INTSTACK_SIZE),
|
||||
#endif
|
||||
#if CONFIG_SMP_NCPUS > 3
|
||||
(uintptr_t)g_irqstack_alloc + (4 * INTSTACK_SIZE)
|
||||
#endif
|
||||
};
|
||||
|
||||
uintptr_t g_fiqstack_top[CONFIG_SMP_NCPUS] =
|
||||
{
|
||||
(uintptr_t)g_fiqstack_alloc + INTSTACK_SIZE,
|
||||
#if CONFIG_SMP_NCPUS > 1
|
||||
(uintptr_t)g_fiqstack_alloc + 2 * INTSTACK_SIZE,
|
||||
#endif
|
||||
#if CONFIG_SMP_NCPUS > 2
|
||||
(uintptr_t)g_fiqstack_alloc + 3 * INTSTACK_SIZE,
|
||||
#endif
|
||||
#if CONFIG_SMP_NCPUS > 3
|
||||
(uintptr_t)g_fiqstack_alloc + 4 * INTSTACK_SIZE
|
||||
#endif
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
/* Symbols defined via the linker script */
|
||||
|
||||
extern uint8_t _vector_start[]; /* Beginning of vector block */
|
||||
extern uint8_t _vector_end[]; /* End+1 of vector block */
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_irqinitialize
|
||||
*
|
||||
* Description:
|
||||
* This function is called by up_initialize() during the bring-up of the
|
||||
* system. It is the responsibility of this function to but the interrupt
|
||||
* subsystem into the working and ready state.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_irqinitialize(void)
|
||||
{
|
||||
#ifdef CONFIG_ARCH_LOWVECTORS
|
||||
/* Set the VBAR register to the address of the vector table */
|
||||
|
||||
DEBUGASSERT((((uintptr_t)_vector_start) & ~VBAR_MASK) == 0);
|
||||
cp15_wrvbar((uint32_t)_vector_start);
|
||||
#endif
|
||||
|
||||
/* The following operations need to be atomic, but since this function is
|
||||
* called early in the initialization sequence, we expect to have exclusive
|
||||
* access to the GIC.
|
||||
*/
|
||||
|
||||
/* Initialize the Generic Interrupt Controller (GIC) for CPU0 */
|
||||
|
||||
arm_gic0_initialize(); /* Initialization unique to CPU0 */
|
||||
arm_gic_initialize(); /* Initialization common to all CPUs */
|
||||
|
||||
#ifndef CONFIG_SUPPRESS_INTERRUPTS
|
||||
/* And finally, enable interrupts */
|
||||
|
||||
up_irq_enable();
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_intstack_top
|
||||
*
|
||||
* Description:
|
||||
* Return a pointer to the top the correct interrupt stack allocation
|
||||
* for the current CPU.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
|
||||
uintptr_t arm_intstack_top(void)
|
||||
{
|
||||
return g_irqstack_top[up_cpu_index()];
|
||||
}
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_intstack_alloc
|
||||
*
|
||||
* Description:
|
||||
* Return a pointer to the "alloc" the correct interrupt stack allocation
|
||||
* for the current CPU.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_SMP) && CONFIG_ARCH_INTERRUPTSTACK > 7
|
||||
uintptr_t arm_intstack_alloc(void)
|
||||
{
|
||||
return g_irqstack_top[up_cpu_index()] - INTSTACK_SIZE;
|
||||
}
|
||||
#endif
|
||||
51
arch/arm/src/qemu/qemu_irq.h
Normal file
51
arch/arm/src/qemu/qemu_irq.h
Normal file
@ -0,0 +1,51 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/qemu/qemu_irq.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_QEMU_QEMU_IRQ_H
|
||||
#define __ARCH_ARM_SRC_QEMU_QEMU_IRQ_H
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_earlyirqinit
|
||||
****************************************************************************/
|
||||
|
||||
void arm_earlyirqinit(void);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_QEMU_QEMU_IRQ_H */
|
||||
73
arch/arm/src/qemu/qemu_memorymap.c
Normal file
73
arch/arm/src/qemu/qemu_memorymap.c
Normal file
@ -0,0 +1,73 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/qemu/qemu_memorymap.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <sys/param.h>
|
||||
|
||||
#include "mmu.h"
|
||||
#include "qemu_memorymap.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Macro Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define _NSECTIONS(b) (((b) + 0x000fffff) >> 20)
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
static const struct section_mapping_s g_section_mapping[] =
|
||||
{
|
||||
{
|
||||
VIRT_FLASH_PSECTION, VIRT_FLASH_VSECTION,
|
||||
MMU_MEMFLAGS, _NSECTIONS(VIRT_FLASH_SECSIZE)
|
||||
},
|
||||
{
|
||||
VIRT_IO_PSECTION, VIRT_IO_VSECTION,
|
||||
MMU_IOFLAGS, _NSECTIONS(VIRT_IO_SECSIZE)
|
||||
},
|
||||
{
|
||||
VIRT_PCIE_PSECTION, VIRT_PCIE_VSECTION,
|
||||
MMU_IOFLAGS, _NSECTIONS(VIRT_PCIE_SECSIZE)
|
||||
},
|
||||
};
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: qemu_setupmappings
|
||||
*
|
||||
* Description:
|
||||
* Initializes the non-code area page table
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int qemu_setupmappings(void)
|
||||
{
|
||||
mmu_l1_map_regions(g_section_mapping, nitems(g_section_mapping));
|
||||
|
||||
return 0;
|
||||
}
|
||||
80
arch/arm/src/qemu/qemu_memorymap.h
Normal file
80
arch/arm/src/qemu/qemu_memorymap.h
Normal file
@ -0,0 +1,80 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/qemu/qemu_memorymap.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_QEMU_QEMU_MEMORYMAP_H
|
||||
#define __ARCH_ARM_SRC_QEMU_QEMU_MEMORYMAP_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/compiler.h>
|
||||
#include <sys/types.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <arch/chip/chip.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* Qemu virt Physical Memory Map ********************************************/
|
||||
|
||||
#define VIRT_FLASH_PSECTION 0x00000000 /* 0x00000000-0x08000000 */
|
||||
#define VIRT_IO_PSECTION 0x08000000 /* 0x08000000-0x0f000000 */
|
||||
#define VIRT_PCIE_PSECTION 0x10000000 /* 0x10000000-0x40000000 */
|
||||
|
||||
/* Qemu virt Virtual Memory Map *********************************************/
|
||||
|
||||
#define VIRT_FLASH_VSECTION VIRT_FLASH_PSECTION
|
||||
#define VIRT_IO_VSECTION VIRT_IO_PSECTION
|
||||
#define VIRT_PCIE_VSECTION VIRT_PCIE_PSECTION
|
||||
|
||||
/* Sizes of memory regions in bytes. */
|
||||
|
||||
#define VIRT_FLASH_SECSIZE (128*1024*1024)
|
||||
#define VIRT_IO_SECSIZE (112*1024*1024)
|
||||
#define VIRT_PCIE_SECSIZE (3*256*1024*1024)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
int qemu_setupmappings(void);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM_SRC_QEMU_QEMU_MEMORYMAP_H */
|
||||
34
arch/arm/src/qemu/qemu_net.c
Normal file
34
arch/arm/src/qemu/qemu_net.c
Normal file
@ -0,0 +1,34 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/qemu/qemu_net.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/virtio/virtio-mmio.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
void arm_netinitialize(void)
|
||||
{
|
||||
virtio_mmio_init();
|
||||
}
|
||||
65
arch/arm/src/qemu/qemu_serial.c
Normal file
65
arch/arm/src/qemu/qemu_serial.c
Normal file
@ -0,0 +1,65 @@
|
||||
/***************************************************************************
|
||||
* arch/arm/src/qemu/qemu_serial.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
***************************************************************************/
|
||||
|
||||
/***************************************************************************
|
||||
* Included Files
|
||||
***************************************************************************/
|
||||
|
||||
#include <nuttx/serial/uart_pl011.h>
|
||||
|
||||
#include "arm_internal.h"
|
||||
|
||||
#ifdef CONFIG_UART_PL011
|
||||
|
||||
/***************************************************************************
|
||||
* Public Functions
|
||||
***************************************************************************/
|
||||
|
||||
/***************************************************************************
|
||||
* Name: arm_earlyserialinit
|
||||
*
|
||||
* Description:
|
||||
* see arm_internal.h
|
||||
*
|
||||
***************************************************************************/
|
||||
|
||||
void arm_earlyserialinit(void)
|
||||
{
|
||||
/* Enable the console UART. The other UARTs will be initialized if and
|
||||
* when they are first opened.
|
||||
*/
|
||||
|
||||
pl011_earlyserialinit();
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
* Name: arm_serialinit
|
||||
*
|
||||
* Description:
|
||||
* see arm_internal.h
|
||||
*
|
||||
***************************************************************************/
|
||||
|
||||
void arm_serialinit(void)
|
||||
{
|
||||
pl011_serialinit();
|
||||
}
|
||||
|
||||
#endif /* CONFIG_UART_PL011 */
|
||||
42
arch/arm/src/qemu/qemu_timer.c
Normal file
42
arch/arm/src/qemu/qemu_timer.c
Normal file
@ -0,0 +1,42 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/qemu/qemu_timer.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/timers/arch_alarm.h>
|
||||
|
||||
#include "arm_timer.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define CYCLES_PER_SEC 62500000
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
void up_timer_initialize(void)
|
||||
{
|
||||
up_alarm_set_lowerhalf(arm_timer_initialize(CYCLES_PER_SEC));
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user