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F103VC, F105, and F107: Fix configuration and building of USB. configs/viewtools-stm32f107: Fix build for F103 and F107: F103 has USB device; F107 has OTGFS

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This commit is contained in:
Gregory Nutt 2013-12-25 18:34:15 -06:00
parent 091e5fdf66
commit e963a4d862
10 changed files with 56 additions and 47 deletions
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7
ChangeLog
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@ -6307,3 +6307,10 @@
and stm32_usbmsc.c: Lay out basic framework for USB and SD card and stm32_usbmsc.c: Lay out basic framework for USB and SD card
support. Code is incomplete and has been neither built nor tested support. Code is incomplete and has been neither built nor tested
(2013-12-25). (2013-12-25).
* nuttx/arch/arm/src/stm32/Kconfig, chip/stm32f103vc_pinmap.h,
stm32f105vb_pinmap.h, and stm32f107vc_pinmap.h: Fix configuration and
pin definition that would prevent building USB for the connectivity and
performance lines (2013-12-25).
* stm32l15xxx_pinmap.h: Fix a typo in USB pin definitions (2013-12-25).
* configs/viewtools-stm32f107: Fix building of USB for F103 and F107.
F103 has device only; F107 has OTG FS (2013-12-25).

18
arch/arm/src/stm32/Kconfig
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@ -548,6 +548,7 @@ endchoice
config STM32_STM32L15XX config STM32_STM32L15XX
bool bool
default n default n
select STM32_HAVE_USBDEV
config STM32_ENERGYLITE config STM32_ENERGYLITE
bool bool
@ -564,10 +565,12 @@ config STM32_VALUELINE
config STM32_CONNECTIVITYLINE config STM32_CONNECTIVITYLINE
bool bool
default n default n
select STM32_HAVE_OTGFS
config STM32_PERFORMANCELINE config STM32_PERFORMANCELINE
bool bool
default n default n
select STM32_HAVE_USBDEV
config STM32_HIGHDENSITY config STM32_HIGHDENSITY
bool bool
@ -584,14 +587,17 @@ config STM32_LOWDENSITY
config STM32_STM32F20XX config STM32_STM32F20XX
bool bool
default n default n
select STM32_HAVE_OTGFS
config STM32_STM32F30XX config STM32_STM32F30XX
bool bool
default n default n
select STM32_HAVE_USBDEV
config STM32_STM32F40XX config STM32_STM32F40XX
bool bool
default n default n
select STM32_HAVE_OTGFS
# This is really 427/437, but we treat the two the same. # This is really 427/437, but we treat the two the same.
config STM32_STM32F427 config STM32_STM32F427
@ -611,6 +617,14 @@ config STM32_DFU
menu "STM32 Peripheral Support" menu "STM32 Peripheral Support"
config STM32_HAVE_USBDEV
bool
default n
config STM32_HAVE_OTGFS
bool
default n
config STM32_ADC1 config STM32_ADC1
bool "ADC1" bool "ADC1"
default n default n
@ -755,7 +769,7 @@ config STM32_LTDC
config STM32_OTGFS config STM32_OTGFS
bool "OTG FS" bool "OTG FS"
default n default n
depends on STM32_STM32F20XX || STM32_STM32F40XX depends on STM32_HAVE_OTGFS
config STM32_OTGHS config STM32_OTGHS
bool "OTG HS" bool "OTG HS"
@ -980,7 +994,7 @@ config STM32_UART8
config STM32_USB config STM32_USB
bool "USB Device" bool "USB Device"
default n default n
depends on (STM32_STM32F10XX && !STM32_VALUELINE) || STM32_STM32L15XX || STM32_STM32F30XX depends on STM32_HAVE_USBDEV
select USBDEV select USBDEV
config STM32_LCD config STM32_LCD

11
arch/arm/src/stm32/chip/stm32f103vc_pinmap.h
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@ -155,17 +155,10 @@
#define GPIO_I2S3_SD (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5) #define GPIO_I2S3_SD (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
#define GPIO_I2S3_WS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15) #define GPIO_I2S3_WS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15)
#if 0 /* Needs further investigation */
#define GPIO_MCO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8) #define GPIO_MCO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
#endif
#if 0 /* Needs further investigation */ #define GPIO_USB_DM (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
#define GPIO_OTG_FSDM (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11) #define GPIO_USB_DP (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
#define GPIO_OTG_FSDP (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
#define GPIO_OTG_FSID (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10)
#define GPIO_OTG_FSSOF (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
#define GPIO_OTG_FSVBUS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
#endif
#if defined(CONFIG_STM32_SPI1_REMAP) #if defined(CONFIG_STM32_SPI1_REMAP)
# define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15) # define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)

14
arch/arm/src/stm32/chip/stm32f105vb_pinmap.h
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@ -148,17 +148,13 @@
#define GPIO_I2S3_SD (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5) #define GPIO_I2S3_SD (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTB|GPIO_PIN5)
#define GPIO_I2S3_WS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15) #define GPIO_I2S3_WS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN15)
#if 0 /* Needs further investigation */
#define GPIO_MCO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8) #define GPIO_MCO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
#endif
#if 0 /* Needs further investigation */ #define GPIO_OTGFS_DM (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
#define GPIO_OTG_FSDM (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11) #define GPIO_OTGFS_DP (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
#define GPIO_OTG_FSDP (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12) #define GPIO_OTGFS_ID (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10)
#define GPIO_OTG_FSID (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10) #define GPIO_OTGFS_SOF (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
#define GPIO_OTG_FSSOF (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8) #define GPIO_OTGFS_VBUS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
#define GPIO_OTG_FSVBUS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
#endif
#if defined(CONFIG_STM32_SPI1_REMAP) #if defined(CONFIG_STM32_SPI1_REMAP)
# define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15) # define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)

12
arch/arm/src/stm32/chip/stm32f107vc_pinmap.h
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@ -156,13 +156,11 @@
#define GPIO_MCO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8) #define GPIO_MCO (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
#if 0 /* Needs further investigation */ #define GPIO_OTGFS_DM (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11)
#define GPIO_OTG_FSDM (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN11) #define GPIO_OTGFS_DP (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12)
#define GPIO_OTG_FSDP (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN12) #define GPIO_OTGFS_ID (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10)
#define GPIO_OTG_FSID (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN10) #define GPIO_OTGFS_SOF (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8)
#define GPIO_OTG_FSSOF (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN8) #define GPIO_OTGFS_VBUS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
#define GPIO_OTG_FSVBUS (GPIO_ALT|GPIO_CNF_AFPP|GPIO_MODE_50MHz|GPIO_PORTA|GPIO_PIN9)
#endif
#if defined(CONFIG_STM32_SPI1_REMAP) #if defined(CONFIG_STM32_SPI1_REMAP)
# define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15) # define GPIO_SPI1_NSS (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_MODE_INPUT|GPIO_PORTA|GPIO_PIN15)

2
arch/arm/src/stm32/chip/stm32l15xxx_pinmap.h
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@ -534,7 +534,7 @@
/* USB */ /* USB */
#define GPIO_USB_DM (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_40MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN11) #define GPIO_USB_DM (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_40MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN11)
#define GPIO_USG_DP (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_40MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN12) #define GPIO_USB_DP (GPIO_ALT | GPIO_AF10 | GPIO_SPEED_40MHz | GPIO_PUSHPULL | GPIO_PORTA | GPIO_PIN12)
/* Wakeup inputs */ /* Wakeup inputs */

10
configs/viewtool-stm32f107/README.txt
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@ -137,9 +137,9 @@ USB Interface
Pin Signal Pin Signal
--- --------- ----------- ------------------------------------ --- --------- ----------- ------------------------------------
1 USB_VBUS VDD_USB (No sensing available) 1 USB_VBUS VDD_USB (No sensing available)
2 OTG_DM PA11 GPIO_OTG_FSDM 2 OTG_DM PA11 GPIO_OTGFS_DM (F107) GPIO_USB_DM (F103)
3 OTG_DP PA12 GPIO_OTG_FSDP 3 OTG_DP PA12 GPIO_OTGFS_DP (F107) GPIO_USB_DP (F103)
4 OTG_ID PA10 GPIO_OTG_FSID 4 OTG_ID PA10 GPIO_OTGFS_ID (F107)
5 Shield N/A N/A 5 Shield N/A N/A
6 Shield N/A N/A 6 Shield N/A N/A
7 Shield N/A N/A 7 Shield N/A N/A
@ -148,8 +148,8 @@ USB Interface
PE11 USB_EN GPIO controlled soft pull-up PE11 USB_EN GPIO controlled soft pull-up
NOTES: NOTES:
1. GPIO_OTG_FSVBUS should not be configured. No VBUS sensing 1. GPIO_OTGFS_VBUS (F107) should not be configured. No VBUS sensing
2. GPIO_OTG_FSSOF is not used 2. GPIO_OTGFS_SOF (F107) is not used
Configuration Configuration
------------- -------------

6
configs/viewtool-stm32f107/src/Makefile
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@ -54,8 +54,12 @@ ifeq ($(CONFIG_MMCSD),y)
CSRCS += stm32_mmcsd.c CSRCS += stm32_mmcsd.c
endif endif
ifeq ($(CONFIG_STM32_OTGFS),y) ifeq ($(CONFIG_STM32_OTGFS),y) # F107
CSRCS += stm32_usbdev.c CSRCS += stm32_usbdev.c
else
ifeq ($(CONFIG_STM32_USB),y) # F103
CSRCS += stm32_usbdev.c
endif
endif endif
ifeq ($(CONFIG_NSH_ARCHINIT),y) ifeq ($(CONFIG_NSH_ARCHINIT),y)

13
configs/viewtool-stm32f107/src/stm32_usbdev.c
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@ -48,7 +48,7 @@
#include "stm32_otgfs.h" #include "stm32_otgfs.h"
#include "viewtool_stm32f107.h" #include "viewtool_stm32f107.h"
#ifdef CONFIG_STM32_OTGFS #if defined(CONFIG_STM32_OTGFS) || defined(CONFIG_STM32_USB)
/************************************************************************************ /************************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
@ -57,7 +57,7 @@
#ifdef CONFIG_USBDEV #ifdef CONFIG_USBDEV
# define HAVE_USB 1 # define HAVE_USB 1
#else #else
# warning CONFIG_STM32_OTGFS is enabled but CONFIG_USBDEV is not # warning CONFIG_STM32_OTGFS (F107) or CONFIG_STM32_USB (F103) is enabled but CONFIG_USBDEV is not
# undef HAVE_USB # undef HAVE_USB
#endif #endif
@ -87,15 +87,12 @@ void stm32_usbdev_initialize(void)
/* The OTG FS has an internal soft pull-up. No GPIO configuration is required */ /* The OTG FS has an internal soft pull-up. No GPIO configuration is required */
#warning REVISIT: The Viewtool board does, indeed, have a soft connect GPIO #warning REVISIT: The Viewtool board does, indeed, have a soft connect GPIO
/* Configure the OTG FS VBUS sensing GPIO, Power On, and Overcurrent GPIOs */ /* Configure the OTG FS VBUS sensing GPIO and power enable GPIO */
#ifdef CONFIG_STM32_OTGFS
#warning REVISIT: GPIO setup #warning REVISIT: GPIO setup
#endif
} }
/************************************************************************************ /************************************************************************************
* Name: stm32_usbsuspend * Name: stm32_usbsuspend
* *
* Description: * Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is * Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
@ -110,4 +107,4 @@ void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
ulldbg("resume: %d\n", resume); ulldbg("resume: %d\n", resume);
} }
#endif /* CONFIG_STM32_OTGFS */ #endif /* CONFIG_STM32_OTGFS || CONFIG_STM32_USB*/

10
configs/viewtool-stm32f107/src/viewtool_stm32f107.h
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@ -129,9 +129,9 @@
* Pin Signal * Pin Signal
* --- --------- ----------- ------------------------------------ * --- --------- ----------- ------------------------------------
* 1 USB_VBUS VDD_USB (No sensing available) * 1 USB_VBUS VDD_USB (No sensing available)
* 2 OTG_DM PA11 GPIO_OTG_FSDM * 2 OTG_DM PA11 GPIO_OTGFS_DM (F107) GPIO_USB_DM (F103)
* 3 OTG_DP PA12 GPIO_OTG_FSDP * 3 OTG_DP PA12 GPIO_OTGFS_DP (F107) GPIO_USB_DP (F103)
* 4 OTG_ID PA10 GPIO_OTG_FSID * 4 OTG_ID PA10 GPIO_OTGFS_ID (F107)
* 5 Shield N/A N/A * 5 Shield N/A N/A
* 6 Shield N/A N/A * 6 Shield N/A N/A
* 7 Shield N/A N/A * 7 Shield N/A N/A
@ -140,8 +140,8 @@
* PE11 USB_EN GPIO controlled soft pull-up * PE11 USB_EN GPIO controlled soft pull-up
* *
* NOTES: * NOTES:
* 1. GPIO_OTG_FSVBUS should not be configured. No VBUS sensing * 1. GPIO_OTGFS_VBUS (F107) should not be configured. No VBUS sensing
* 2. GPIO_OTG_FSSOF is not used * 2. GPIO_OTGFS_SOF (F107) is not used
*/ */
/************************************************************************************ /************************************************************************************