Fix clang compiler warning in boards/arm/stm32/
Error: board/stm32_ssd1289.c:290:33: error: shifting a negative signed value is undefined [-Werror,-Wshift-negative-value] putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~ /github/workspace/sources/nuttx/arch/arm/src/chip/hardware/stm32_fsmc.h:164:42: note: expanded from macro 'FSMC_BTR_ADDHLD' ^ /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:135:54: note: expanded from macro 'putreg32' ^ Error: board/stm32_ssd1289.c:291:33: error: shifting a negative signed value is undefined [-Werror,-Wshift-negative-value] FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) | ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~ /github/workspace/sources/nuttx/arch/arm/src/chip/hardware/stm32_fsmc.h:172:42: note: expanded from macro 'FSMC_BTR_BUSTURN' ^ /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:135:54: note: expanded from macro 'putreg32' ^ Error: board/stm32_ssd1289.c:292:12: error: shifting a negative signed value is undefined [-Werror,-Wshift-negative-value] FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ /github/workspace/sources/nuttx/arch/arm/src/chip/hardware/stm32_fsmc.h:176:42: note: expanded from macro 'FSMC_BTR_CLKDIV' ^ /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:135:54: note: expanded from macro 'putreg32' ^ Error: board/stm32_ssd1289.c:292:33: error: shifting a negative signed value is undefined [-Werror,-Wshift-negative-value] FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~ /github/workspace/sources/nuttx/arch/arm/src/chip/hardware/stm32_fsmc.h:180:42: note: expanded from macro 'FSMC_BTR_DATLAT' ^ /github/workspace/sources/nuttx/arch/arm/src/common/arm_internal.h:135:54: note: expanded from macro 'putreg32' ^ Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
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2d6503646d
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@ -165,7 +165,7 @@ void stm32_selectlcd(void)
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putreg32(FSMC_BTR_ADDSET(1) | FSMC_BTR_ADDHLD(0) |
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FSMC_BTR_DATAST(2) | FSMC_BTR_BUSTURN(0) |
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FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
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FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
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FSMC_BTR_ACCMODA, STM32_FSMC_BTR1);
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putreg32(0xffffffff, STM32_FSMC_BWTR4);
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@ -296,7 +296,7 @@ static void stm32_selectlcd(void)
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/* Bank1 NOR/SRAM timing register configuration */
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putreg32(FSMC_BTR_ADDSET(2) | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(2) |
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FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
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FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
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FSMC_BTR_ACCMODA,
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STM32_FSMC_BTR1);
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@ -375,7 +375,7 @@ static void stm32_selectlcd(void)
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/* Bank1 NOR/SRAM timing register configuration */
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putreg32(FSMC_BTR_ADDSET(1) | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(2) |
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FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
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FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
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FSMC_BTR_ACCMODA,
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STM32_FSMC_BTR1);
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@ -117,7 +117,7 @@ void stm32_selectlcd(void)
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putreg32(FSMC_BTR_ADDSET(1) | FSMC_BTR_ADDHLD(0) |
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FSMC_BTR_DATAST(2) | FSMC_BTR_BUSTURN(0) |
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FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
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FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
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FSMC_BTR_ACCMODA, STM32_FSMC_BTR4);
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putreg32(0xffffffff, STM32_FSMC_BWTR4);
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@ -136,9 +136,9 @@ void stm32_selectlcd(void)
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/* Bank3 NOR/SRAM timing register configuration */
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putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) |
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FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) |
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FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
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putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(1) |
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FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(1) |
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FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
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FSMC_BTR_ACCMODA, STM32_FSMC_BTR3);
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putreg32(0xffffffff, STM32_FSMC_BWTR3);
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@ -136,9 +136,9 @@ void stm32_selectlcd(void)
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/* Bank3 NOR/SRAM timing register configuration */
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putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) |
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FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) |
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FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
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putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(1) |
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FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(1) |
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FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
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FSMC_BTR_ACCMODA, STM32_FSMC_BTR3);
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putreg32(0xffffffff, STM32_FSMC_BWTR3);
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@ -287,9 +287,9 @@ void stm32_selectlcd(void)
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/* Bank1 NOR/SRAM timing register configuration */
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putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) |
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FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(0) |
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FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
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putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(1) |
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FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTURN(1) |
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FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
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FSMC_BTR_ACCMODA, STM32_FSMC_BTR1);
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putreg32(0xffffffff, STM32_FSMC_BWTR1);
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@ -445,7 +445,7 @@ static void stm32_selectlcd(void)
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putreg32(
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FSMC_BTR_ADDSET(1) | FSMC_BTR_ADDHLD(0) |
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FSMC_BTR_DATAST(2) | FSMC_BTR_BUSTURN(0) |
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FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
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FSMC_BTR_CLKDIV(1) | FSMC_BTR_DATLAT(2) |
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FSMC_BTR_ACCMODA,
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STM32_FSMC_BTR1);
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