diff --git a/arch/arm/src/efm32/efm32_gpio.h b/arch/arm/src/efm32/efm32_gpio.h
index 4e1339d278..ed54bb5148 100644
--- a/arch/arm/src/efm32/efm32_gpio.h
+++ b/arch/arm/src/efm32/efm32_gpio.h
@@ -328,6 +328,20 @@ void efm32_gpioirqdisable(int irq);
 #  define efm32_gpioirqdisable(irq)
 #endif
 
+/************************************************************************************
+ * Name: efm32_gpioirqclear
+ *
+ * Description:
+ *   clear the interrupt for specified PIO IRQ
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_EFM32_GPIO_IRQ
+void efm32_gpioirqclear(int irq);
+#else
+#  define efm32_gpioirqclear(irq)
+#endif
+
 /************************************************************************************
  * Function:  efm32_dumpgpio
  *
diff --git a/arch/arm/src/efm32/efm32_gpioirq.c b/arch/arm/src/efm32/efm32_gpioirq.c
index 58d42023a7..4dbbd009d4 100644
--- a/arch/arm/src/efm32/efm32_gpioirq.c
+++ b/arch/arm/src/efm32/efm32_gpioirq.c
@@ -314,4 +314,32 @@ void efm32_gpioirqdisable(int irq)
     }
 }
 
+/************************************************************************************
+ * Name: efm32_gpioirqclear
+ *
+ * Description:
+ *   Disable the interrupt for specified PIO IRQ
+ *
+ ************************************************************************************/
+
+void efm32_gpioirqclear(int irq)
+{
+
+      irqstate_t flags;
+      uint32_t regval;
+      uint32_t bit;
+
+  if (irq >= EFM32_IRQ_EXTI0 && irq <= EFM32_IRQ_EXTI15)
+    {
+      /* Enable the interrupt associated with the pin */
+
+      bit     = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
+      flags   = irqsave();
+      regval  = getreg32(EFM32_GPIO_IFC);
+      regval |= bit;
+      putreg32(regval, EFM32_GPIO_IFC);
+      irqrestore(flags);
+    }
+}
+
 #endif /* CONFIG_EFM32_GPIO_IRQ */