Port STM3240G-EVAL ILI93xx driver to Shenzhou board
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5188 42af7a65-404d-4744-a932-0658087f49c3
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@ -33,6 +33,9 @@
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*
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************************************************************************************/
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#ifndef __CONFIGS_OLIMEX_STM32_P107_INCLUDE_BOARD_H
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#define __CONFIGS_OLIMEX_STM32_P107_INCLUDE_BOARD_H 1
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/************************************************************************************
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* Included Files
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************************************************************************************/
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@ -105,6 +108,20 @@
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# define STM32_PLL_PLL3MUL RCC_CFGR2_PLL3MULx10 /* MCO 5MHz * 10 = 50MHz */
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#endif
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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@ -118,4 +135,12 @@
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*
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************************************************************************************/
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void stm32_boardinitialize(void);
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EXTERN void stm32_boardinitialize(void);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __CONFIGS_OLIMEX_STM32_P107_INCLUDE_BOARD_H */
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@ -33,6 +33,9 @@
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*
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************************************************************************************/
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#ifndef __CONFIGS_SHENZHOU_INCLUDE_BOARD_H
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#define __CONFIGS_SHENZHOU_INCLUDE_BOARD_H 1
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/************************************************************************************
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* Included Files
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************************************************************************************/
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@ -321,6 +324,20 @@
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* 63 PC6 I2S_MCK GPIO_I2S2_MCK. Audio DAC. Active low: Pulled high
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*/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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@ -382,3 +399,24 @@ EXTERN void stm32_ledinit(void);
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EXTERN void stm32_setled(int led, bool ledon);
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EXTERN void stm32_setleds(uint8_t ledset);
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#endif
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/************************************************************************************
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* Name: stm32_lcdclear
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*
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* Description:
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* This is a non-standard LCD interface just for the Shenzhou board. Because
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* of the various rotations, clearing the display in the normal way by writing a
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* sequences of runs that covers the entire display can be very slow. Here the
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* display is cleared by simply setting all GRAM memory to the specified color.
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*
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************************************************************************************/
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EXTERN void stm32_lcdclear(uint16_t color);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __CONFIGS_SHENZHOU_INCLUDE_BOARD_H */
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@ -84,8 +84,12 @@ ifeq ($(CONFIG_WATCHDOG),y)
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CSRCS += up_watchdog.c
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endif
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# NOTE: SSD1289 is not supported on the board
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ifeq ($(CONFIG_LCD_SSD1289),y)
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CSRCS += up_ssd1289.c
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CSRCS += up_ssd1289.c
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else
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CSRCS += up_lcd.c
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endif
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COBJS = $(CSRCS:.c=$(OBJEXT))
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@ -224,39 +224,56 @@
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/* TFT LCD GPIOs */
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#define GPIO_LCD_D0 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D0OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN0)
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#define GPIO_LCD_D1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D1OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN1)
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#define GPIO_LCD_D2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D2OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN2)
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#define GPIO_LCD_D3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D3OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3)
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#define GPIO_LCD_D4 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D4OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4)
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#define GPIO_LCD_D5 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D5OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN5)
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#define GPIO_LCD_D6 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D6OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN6)
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#define GPIO_LCD_D7 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D7OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN7)
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#define GPIO_LCD_D8 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D8OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN8)
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#define GPIO_LCD_D9 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D9OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN9)
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#define GPIO_LCD_D10 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D10OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN10)
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#define GPIO_LCD_D11 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D11OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN11)
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#define GPIO_LCD_D12 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D12OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN12)
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#define GPIO_LCD_D13 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D13OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN13)
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#define GPIO_LCD_D14 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D14OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN14)
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#define GPIO_LCD_D15 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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#define GPIO_LCD_D15OUT (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN15)
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#define GPIO_LCD_D0IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN0)
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#define GPIO_LCD_D1IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN1)
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#define GPIO_LCD_D2IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN2)
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#define GPIO_LCD_D3IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN3)
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#define GPIO_LCD_D4IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN4)
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#define GPIO_LCD_D5IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN5)
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#define GPIO_LCD_D6IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN6)
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#define GPIO_LCD_D7IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN7)
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#define GPIO_LCD_D8IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN8)
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#define GPIO_LCD_D9IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN9)
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#define GPIO_LCD_D10IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN10)
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#define GPIO_LCD_D11IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN11)
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#define GPIO_LCD_D12IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN12)
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#define GPIO_LCD_D13IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN13)
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#define GPIO_LCD_D14IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN14)
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#define GPIO_LCD_D15IN (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_PORTE|GPIO_PIN15)
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#define GPIO_LCD_RS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN13)
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#define GPIO_LCD_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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@ -290,7 +307,12 @@
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#define LCD_LE_CLEAR LCD_BIT_CLEAR(STM32_GPIOB_OFFSET, 2) /* GPIO_PORTB|GPIO_PIN2 */
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#define LCD_LE_SET LCD_BIT_SET(STM32_GPIOB_OFFSET, 2)
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#define LCD_DATA STM32_GPIOE_ODR
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#define LCD_CRL STM32_GPIOE_CRL
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#define LCD_CRH STM32_GPIOE_CRH
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#define LCD_INPUT 0x44444444
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#define LCD_OUTPUT 0x33333333
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#define LCD_ODR STM32_GPIOE_ODR
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#define LCD_IDR STM32_GPIOE_IDR
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/* Touchscreen IC on the LCD module */
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1940
configs/shenzhou/src/up_lcd.c
Normal file
1940
configs/shenzhou/src/up_lcd.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -68,11 +68,6 @@
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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#ifndef CONFIG_SSD1289_WRONLY
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# warning "Only write access is supported; CONFIG_SSD1289_WRONLY should be defined"
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#endif
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/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
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* also be enabled.
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*/
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@ -87,6 +82,9 @@
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# undef CONFIG_DEBUG_LCD
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#endif
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#undef CONFIG_LCD_FASTCONFIG
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#define CONFIG_LCD_FASTCONFIG 1
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/* Shenzhou LCD Hardware Definitions ************************************************/
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/* Debug ****************************************************************************/
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@ -108,6 +106,9 @@
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/* Helpers */
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static void stm32_wrdata(uint16_t data);
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#ifndef CONFIG_SSD1289_WRONLY
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static uint16_t stm32_rddata(void);
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#endif
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/* Low Level LCD access */
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@ -125,9 +126,9 @@ static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power);
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************************************************************************************/
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/* TFT LCD
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*
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* -- ---- -------------- -------------------------------------------------------------------
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* -- ---- -------------- -----------------------------------------------------------
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* PN NAME SIGNAL NOTES
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* -- ---- -------------- -------------------------------------------------------------------
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* -- ---- -------------- -----------------------------------------------------------
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* 37 PB2 DATA_LE To TFT LCD (CN13, ping 28)
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* 96 PB9 F_CS To both the TFT LCD (CN13, pin 30) and to the W25X16 SPI FLASH
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* 34 PC5 TP_INT JP6. To TFT LCD (CN13) module (CN13, pin 26)
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@ -198,14 +199,27 @@ static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power);
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/* LCD GPIO configurations */
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#ifndef CONFIG_LCD_FASTCONFIG
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static const uint32_t g_lcdout[16] =
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{
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GPIO_LCD_D0OUT, GPIO_LCD_D1OUT, GPIO_LCD_D2OUT, GPIO_LCD_D3OUT,
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GPIO_LCD_D4OUT, GPIO_LCD_D5OUT, GPIO_LCD_D6OUT, GPIO_LCD_D7OUT,
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GPIO_LCD_D8OUT, GPIO_LCD_D9OUT, GPIO_LCD_D10OUT, GPIO_LCD_D11OUT,
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GPIO_LCD_D12OUT, GPIO_LCD_D13OUT, GPIO_LCD_D14OUT, GPIO_LCD_D15OUT
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};
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static const uint32_t g_lcdin[16] =
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{
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GPIO_LCD_D0IN, GPIO_LCD_D1IN, GPIO_LCD_D2IN, GPIO_LCD_D3IN,
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GPIO_LCD_D4IN, GPIO_LCD_D5IN, GPIO_LCD_D6IN, GPIO_LCD_D7IN,
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GPIO_LCD_D8IN, GPIO_LCD_D9IN, GPIO_LCD_D10IN, GPIO_LCD_D11IN,
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GPIO_LCD_D12IN, GPIO_LCD_D13IN, GPIO_LCD_D14IN, GPIO_LCD_D15IN
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};
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#endif
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static const uint32_t g_lcdconfig[] =
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{
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GPIO_LCD_D0, GPIO_LCD_D1, GPIO_LCD_D2, GPIO_LCD_D3,
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GPIO_LCD_D4, GPIO_LCD_D5, GPIO_LCD_D6, GPIO_LCD_D7,
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GPIO_LCD_D8, GPIO_LCD_D9, GPIO_LCD_D10, GPIO_LCD_D11,
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GPIO_LCD_D12, GPIO_LCD_D13, GPIO_LCD_D14, GPIO_LCD_D15,
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GPIO_LCD_RS, GPIO_LCD_CS, GPIO_LCD_RD, GPIO_LCD_WR,
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GPIO_LCD_RS, GPIO_LCD_CS, GPIO_LCD_RD, GPIO_LCD_WR,
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GPIO_LCD_LE,
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};
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#define NLCD_CONFIG (sizeof(g_lcdconfig)/sizeof(uint32_t))
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@ -242,13 +256,41 @@ static FAR struct lcd_dev_s *g_ssd1289drvr;
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static void stm32_wrdata(uint16_t data)
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{
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/* Make sure D0-D15 are configured as outputs */
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stm32_lcdoutput();
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/* Latch the 16-bit LCD data and toggle the WR line */
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putreg32((uint32_t)data, LCD_DATA);
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putreg32(1, LCD_WR_CLEAR);
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putreg32((uint32_t)data, LCD_ODR);
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putreg32(1, LCD_WR_SET);
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}
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/************************************************************************************
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* Name: stm32_rddata
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*
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* Description:
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* Latch data on D0-D15 and toggle the WR line.
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*
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************************************************************************************/
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#ifndef CONFIG_SSD1289_WRONLY
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static uint16_t stm32_rddata(void);
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{
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/* Make sure D0-D15 are configured as inputs */
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stm32_lcdinput();
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/* Toggle the RD line to latch the 16-bit LCD data */
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#warning "Requires pins configured as inputs"
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putreg32(1, LCD_RD_CLEAR);
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putreg32(1, LCD_RD_SET);
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return (uin16_t)getreg32(LCD_IDR);
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}
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#endif
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/************************************************************************************
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* Name: stm32_select
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*
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@ -309,7 +351,13 @@ static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index)
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#ifndef CONFIG_SSD1289_WRONLY
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static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev)
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{
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#warning "Missing logic"
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/* Set the RS signal */
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putreg32(1, LCD_RS_CLR);
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/* And return the data */
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return stm32_rddata();
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}
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#endif
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@ -345,6 +393,51 @@ static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power)
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/* There is no software control over the backlight */
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}
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/************************************************************************************
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* Name: stm32_lcdinput
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*
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* Description:
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* Config data lines for input operations.
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*
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************************************************************************************/
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static void stm32_lcdinput(void)
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{
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#ifdef CONFIG_LCD_FASTCONFIG
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putreg32(LCD_INPUT, LCD_CRL);
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putreg32(LCD_INPUT, LCD_CRH);
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#else
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int i;
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/* Configure GPIO data lines as inputs */
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for (i = 0; i < 16; i++)
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{
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stm32_configgpio(g_lcdin[i]);
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}
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#endif
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}
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/************************************************************************************
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* Name: stm32_lcdoutput
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*
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* Description:
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* Config data lines for output operations.
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*
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************************************************************************************/
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static void stm32_lcdoutput(void)
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{
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int i;
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/* Configure GPIO data lines as outputs */
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for (i = 0; i < 16; i++)
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{
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stm32_configgpio(g_lcdout[i]);
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}
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}
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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@ -371,6 +464,7 @@ int up_lcdinitialize(void)
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/* Configure GPIO pins */
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stm32_lcdoutput();
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for (i = 0; i < NLCD_CONFIG; i++)
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{
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stm32_configgpio(g_lcdconfig[i]);
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