boards/arm/imxrt/teensy-4.x: fixed build error and nx style

Signed-off-by: Michal Lenc <lencmich@fel.cvut.cz>
This commit is contained in:
Michal Lenc 2020-12-03 18:38:39 +01:00 committed by Brennan Ashton
parent 2de4b68389
commit eabd79f97b
16 changed files with 245 additions and 300 deletions

View File

@ -24,13 +24,4 @@ config TEENSY_41
endchoice # Board configuration
menu "Sensors interfaces"
config BMP280_LPI2C
int "LPI2C interface for BMP280 sensor"
depends on SENSORS_BMP280
default 4
endmenu # Sensors interfaces
endif

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@ -41,9 +41,9 @@ LEDs and buttons
- dim: ready
- bright: writing
- blink: no USB
- USER LED(D8)
- USER LED (D3)
Only a single LED, D8, is under software control.
Only a single LED, D3, is under software control.
This LED is not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
@ -121,7 +121,6 @@ Configurations
Configuration sub-directories
-----------------------------
nsh-4.0:
Configures the NuttShell (nsh) located at examples/nsh for Teensy 4.0.

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@ -21,32 +21,9 @@ CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_BOARD_LOOPSPERMSEC=104926
CONFIG_BUILTIN=y
CONFIG_TEENSY_41=y
CONFIG_CAN=y
CONFIG_CANUTILS_CANDUMP=y
CONFIG_CANUTILS_CANSEND=y
CONFIG_DEBUG_BINFMT=y
CONFIG_DEBUG_BINFMT_ERROR=y
CONFIG_DEBUG_BINFMT_INFO=y
CONFIG_DEBUG_BINFMT_WARN=y
CONFIG_DEBUG_CAN=y
CONFIG_DEBUG_CAN_ERROR=y
CONFIG_DEBUG_CAN_INFO=y
CONFIG_DEBUG_CAN_WARN=y
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FULLOPT=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_IRQ=y
CONFIG_DEBUG_IRQ_ERROR=y
CONFIG_DEBUG_IRQ_INFO=y
CONFIG_DEBUG_IRQ_WARN=y
CONFIG_DEBUG_NET=y
CONFIG_DEBUG_NET_ERROR=y
CONFIG_DEBUG_NET_INFO=y
CONFIG_DEBUG_NET_WARN=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEBUG_WARN=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_IMXRT_FLEXCAN3=y
@ -77,4 +54,5 @@ CONFIG_SIG_DEFAULT=y
CONFIG_START_DAY=14
CONFIG_START_MONTH=3
CONFIG_SYSTEM_NSH=y
CONFIG_TEENSY_41=y
CONFIG_USER_ENTRYPOINT="nsh_main"

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@ -19,14 +19,6 @@ CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_BOARD_LOOPSPERMSEC=104926
CONFIG_BUILTIN=y
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_NET=y
CONFIG_DEBUG_NET_ERROR=y
CONFIG_DEBUG_NET_INFO=y
CONFIG_DEBUG_NET_WARN=y
CONFIG_DEBUG_WARN=y
CONFIG_ETH0_PHY_DP83825I=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=2048

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@ -12,7 +12,6 @@ CONFIG_ARCH_CHIP="imxrt"
CONFIG_ARCH_CHIP_IMXRT=y
CONFIG_ARCH_CHIP_MIMXRT1062DVL6A=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_TEENSY_40=y
CONFIG_ARMV7M_DCACHE=y
CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
CONFIG_ARMV7M_ICACHE=y

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@ -20,15 +20,6 @@ CONFIG_ARMV7M_ICACHE=y
CONFIG_ARMV7M_USEBASEPRI=y
CONFIG_BOARD_LOOPSPERMSEC=104926
CONFIG_BUILTIN=y
CONFIG_DEBUG_ASSERTIONS=y
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_FS_ERROR=y
CONFIG_DEBUG_FS_INFO=y
CONFIG_DEBUG_FS_WARN=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_WARN=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y

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@ -128,18 +128,16 @@
/* LED definitions **********************************************************/
/* There are four LED status indicators located on the EVK Board.
/* There are two LED status indicators located on the Teensy 4.x board.
* The functions of these LEDs include:
*
* - Main Power Supply(D3)
* Green: DC 5V main supply is normal.
* Red: J2 input voltage is over 5.6V.
* Off: The board is not powered.
* - Reset RED LED(D15)
* - OpenSDA LED(D16)
* - USER LED(D8)
* - RED LED (loading status)
* - dim: ready
* - bright: writing
* - blink: no USB
* - USER LED (D3)
*
* Only a single LED, D8, is under software control.
* Only a single LED, D3, is under software control.
*/
/* LED index values for use with board_userled() */
@ -227,12 +225,7 @@
/* PIO Disambiguation *******************************************************/
/* LPUARTs
*
* Virtual console port provided by OpenSDA on UART1 and
* Arduino RS-232 Shield on UART3.
*
*/
/* LPUARTs */
#define GPIO_LPUART1_RX (GPIO_LPUART1_RX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B0_13 */
#define GPIO_LPUART1_TX (GPIO_LPUART1_TX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B0_12 */

View File

@ -50,12 +50,12 @@
MEMORY
{
flash (rx) : ORIGIN = 0x60000000, LENGTH = 7M
flashxip (rx) : ORIGIN = 0x60700000, LENGTH = 1M
/* Vectors @ boot+ivt OCRAM2 Flex RAM Boot IVT */
sram (rwx) : ORIGIN = 0x2020A000, LENGTH = 512K + 256K + 128K - (32K + 8K)
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 0K
dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
flash (rx) : ORIGIN = 0x60000000, LENGTH = 7M
flashxip (rx) : ORIGIN = 0x60700000, LENGTH = 1M
/* Vectors @ boot+ivt OCRAM2 Flex RAM Boot IVT */
sram (rwx) : ORIGIN = 0x2020A000, LENGTH = 512K + 256K + 128K - (32K + 8K)
itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 0K
dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
}
OUTPUT_ARCH(arm)
@ -69,26 +69,26 @@ ENTRY(_stext)
SECTIONS
{
/* Image Vector Table and Boot Data for booting from external flash */
/* Image Vector Table and Boot Data for booting from external flash */
.boot_hdr : ALIGN(4)
{
FILL(0xff)
__boot_hdr_start__ = ABSOLUTE(.) ;
KEEP(*(.boot_hdr.conf))
. = 0x1000 ;
KEEP(*(.boot_hdr.ivt))
. = 0x1020 ;
KEEP(*(.boot_hdr.boot_data))
. = 0x1030 ;
KEEP(*(.boot_hdr.dcd_data))
__boot_hdr_end__ = ABSOLUTE(.) ;
. = 0x2000 ;
} > flash
.boot_hdr : ALIGN(4)
{
FILL(0xff)
__boot_hdr_start__ = ABSOLUTE(.) ;
KEEP(*(.boot_hdr.conf))
. = 0x1000 ;
KEEP(*(.boot_hdr.ivt))
. = 0x1020 ;
KEEP(*(.boot_hdr.boot_data))
. = 0x1030 ;
KEEP(*(.boot_hdr.dcd_data))
__boot_hdr_end__ = ABSOLUTE(.) ;
. = 0x2000 ;
} > flash
/* Catch all the section we want not in OCRAM so that the *(.text .text.*) in flash does not */
.flashxip : ALIGN(4)
.flashxip : ALIGN(4)
{
FILL(0xff)
@ -109,78 +109,78 @@ SECTIONS
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
} > flashxip
} > flashxip
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
_etext = ABSOLUTE(.);
} > sram AT > flash
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
_etext = ABSOLUTE(.);
} > sram AT > flash
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab :
{
*(.ARM.extab*)
} > flash
.ARM.extab :
{
*(.ARM.extab*)
} > flash
.ARM.exidx :
{
__exidx_start = ABSOLUTE(.);
*(.ARM.exidx*)
__exidx_end = ABSOLUTE(.);
} > flash
.ARM.exidx :
{
__exidx_start = ABSOLUTE(.);
*(.ARM.exidx*)
__exidx_end = ABSOLUTE(.);
} > flash
_eronly = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.ramfunc ALIGN(4):
{
_sramfuncs = ABSOLUTE(.);
*(.ramfunc .ramfunc.*)
_eramfuncs = ABSOLUTE(.);
} > sram AT > flash
.ramfunc ALIGN(4):
{
_sramfuncs = ABSOLUTE(.);
*(.ramfunc .ramfunc.*)
_eramfuncs = ABSOLUTE(.);
} > sram AT > flash
_framfuncs = LOADADDR(.ramfunc);
_framfuncs = LOADADDR(.ramfunc);
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

View File

@ -70,6 +70,7 @@ int imxrt_adc_initialize(void)
int ret;
/* Call imxrt_adcinitialize() to get an instance of the ADC interface */
#ifdef CONFIG_IMXRT_ADC1
adc = imxrt_adcinitialize(1, g_chanlist, ADC_NCHANNELS);
if (adc == NULL)

View File

@ -18,18 +18,17 @@
*
****************************************************************************/
/* There are four LED status indicators located on the EVK Board. The
* functions of these LEDs include:
/* There are two LED status indicators located on the Teensy 4.x board.
* The functions of these LEDs include:
*
* - Main Power Supply(D3)??
* Green: DC 5V main supply is normal.
* Red: J2 input voltage is over 5.6V.
* Off: The board is not powered.
* - Reset RED LED(D21)??
* - OpenSDA LED(D20)??
* - USER LED(D8)
* - RED LED (loading status)
* - dim: ready
* - bright: writing
* - blink: no USB
* - USER LED (D3)
*
* Only a single LED, D3, is under software control.
*
* Only a single LED, D8, is under software control.
*
* This LED is not used by the board port unless CONFIG_ARCH_LEDS is
* defined. In that case, the usage by the board port is defined in

View File

@ -29,28 +29,28 @@
****************************************************************************/
__attribute__((section(".boot_hdr.ivt")))
const struct ivt_s g_image_vector_table =
const struct ivt_s g_image_vector_table =
{
IVT_HEADER, /* IVT Header */
IMAGE_ENTRY_ADDRESS, /* Image Entry Function */
IVT_RSVD, /* Reserved = 0 */
(uint32_t) DCD_ADDRESS, /* Address where DCD information is
* stored */
(uint32_t) BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure
* is stored */
(uint32_t) IMAG_VECTOR_TABLE, /* Pointer to IVT Self (absolute
* address */
(uint32_t) CSF_ADDRESS, /* Address where CSF file is stored */
IVT_RSVD /* Reserved = 0 */
IVT_HEADER, /* IVT Header */
IMAGE_ENTRY_ADDRESS, /* Image Entry Function */
IVT_RSVD, /* Reserved = 0 */
(uint32_t) DCD_ADDRESS, /* Address where DCD information is
* stored */
(uint32_t) BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure
* is stored */
(uint32_t) IMAG_VECTOR_TABLE, /* Pointer to IVT Self (absolute
* address */
(uint32_t) CSF_ADDRESS, /* Address where CSF file is stored */
IVT_RSVD /* Reserved = 0 */
};
__attribute__((section(".boot_hdr.boot_data")))
const struct boot_data_s g_boot_data =
const struct boot_data_s g_boot_data =
{
IMAGE_DEST, /* boot start location */
(IMAGE_DEST_END - IMAGE_DEST), /* size */
PLUGIN_FLAG, /* Plugin flag */
0xffffffff /* empty - extra data word */
IMAGE_DEST, /* boot start location */
(IMAGE_DEST_END - IMAGE_DEST), /* size */
PLUGIN_FLAG, /* Plugin flag */
0xffffffff /* empty - extra data word */
};
/****************************************************************************

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@ -19,7 +19,7 @@
****************************************************************************/
#ifndef __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_IMXRT_FLEXSPI_NOR_BOOT_H
# define __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_IMXRT_FLEXSPI_NOR_BOOT_H
#define __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_IMXRT_FLEXSPI_NOR_BOOT_H
/****************************************************************************
* Included Files

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@ -18,7 +18,7 @@
*
****************************************************************************/
#ifndef __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_IMXRT_FLEXSPI_NOR_FLASH_H
# define __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_IMXRT_FLEXSPI_NOR_FLASH_H
#define __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_IMXRT_FLEXSPI_NOR_FLASH_H
/****************************************************************************
* Included Files
@ -188,177 +188,177 @@
/* Definitions for FlexSPI Serial Clock Frequency */
enum flexspi_serial_clkfreq_e
{
FLEXSPI_SERIAL_CLKFREQ_30MHz = 1,
FLEXSPI_SERIAL_CLKFREQ_50MHz = 2,
FLEXSPI_SERIAL_CLKFREQ_60MHz = 3,
FLEXSPI_SERIAL_CLKFREQ_75MHz = 4,
FLEXSPI_SERIAL_CLKFREQ_80MHz = 5,
FLEXSPI_SERIAL_CLKFREQ_100MHz = 6,
FLEXSPI_SERIAL_CLKFREQ_133MHz = 7,
FLEXSPI_SERIAL_CLKFREQ_166MHz = 8,
FLEXSPI_SERIAL_CLKFREQ_200MHz = 9,
};
{
FLEXSPI_SERIAL_CLKFREQ_30MHz = 1,
FLEXSPI_SERIAL_CLKFREQ_50MHz = 2,
FLEXSPI_SERIAL_CLKFREQ_60MHz = 3,
FLEXSPI_SERIAL_CLKFREQ_75MHz = 4,
FLEXSPI_SERIAL_CLKFREQ_80MHz = 5,
FLEXSPI_SERIAL_CLKFREQ_100MHz = 6,
FLEXSPI_SERIAL_CLKFREQ_133MHz = 7,
FLEXSPI_SERIAL_CLKFREQ_166MHz = 8,
FLEXSPI_SERIAL_CLKFREQ_200MHz = 9,
};
/* FlexSPI clock configuration type */
enum flexspi_serial_clockmode_e
{
FLEXSPI_CLKMODE_SDR,
FLEXSPI_CLKMODE_DDR,
};
{
FLEXSPI_CLKMODE_SDR,
FLEXSPI_CLKMODE_DDR,
};
/* FlexSPI Read Sample Clock Source definition */
enum flash_read_sample_clk_e
{
FLASH_READ_SAMPLE_CLK_LOOPBACK_INTERNELLY = 0,
FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_DQSPAD = 1,
FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_SCKPAD = 2,
FLASH_READ_SAMPLE_CLK_EXTERNALINPUT_FROM_DQSPAD = 3,
};
{
FLASH_READ_SAMPLE_CLK_LOOPBACK_INTERNELLY = 0,
FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_DQSPAD = 1,
FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_SCKPAD = 2,
FLASH_READ_SAMPLE_CLK_EXTERNALINPUT_FROM_DQSPAD = 3,
};
/* Misc feature bit definitions */
enum flash_misc_feature_e
{
FLEXSPIMISC_OFFSET_DIFFCLKEN = 0, /* Bit for Differential clock enable */
FLEXSPIMISC_OFFSET_CK2EN = 1, /* Bit for CK2 enable */
FLEXSPIMISC_OFFSET_PARALLELEN = 2, /* Bit for Parallel mode enable */
{
FLEXSPIMISC_OFFSET_DIFFCLKEN = 0, /* Bit for Differential clock enable */
FLEXSPIMISC_OFFSET_CK2EN = 1, /* Bit for CK2 enable */
FLEXSPIMISC_OFFSET_PARALLELEN = 2, /* Bit for Parallel mode enable */
FLEXSPIMISC_OFFSET_WORD_ADDRESSABLE_EN = 3, /* Bit for Word Addressable
FLEXSPIMISC_OFFSET_WORD_ADDRESSABLE_EN = 3, /* Bit for Word Addressable
* enable */
FLEXSPIMISC_OFFSET_SAFECONFIG_FREQ_EN = 4, /* Bit for Safe Configuration
FLEXSPIMISC_OFFSET_SAFECONFIG_FREQ_EN = 4, /* Bit for Safe Configuration
* Frequency enable */
FLEXSPIMISC_OFFSET_PAD_SETTING_OVERRIDE_EN = 5, /* Bit for Pad setting
FLEXSPIMISC_OFFSET_PAD_SETTING_OVERRIDE_EN = 5, /* Bit for Pad setting
* override enable */
FLEXSPIMISC_OFFSET_DDR_MODE_EN = 6, /* Bit for DDR clock confiuration
FLEXSPIMISC_OFFSET_DDR_MODE_EN = 6, /* Bit for DDR clock confiuration
* indication. */
};
};
/* Flash Type Definition */
enum flash_flash_type_e
{
FLEXSPI_DEVICE_TYPE_SERIAL_NOR = 1, /* Flash devices are Serial NOR */
FLEXSPI_DEVICE_TYPE_SERIAL_NAND = 2, /* Flash devices are Serial
{
FLEXSPI_DEVICE_TYPE_SERIAL_NOR = 1, /* Flash devices are Serial NOR */
FLEXSPI_DEVICE_TYPE_SERIAL_NAND = 2, /* Flash devices are Serial
* NAND */
FLEXSPI_DEVICE_TYPE_SERIAL_RAM = 3, /* Flash devices are Serial
FLEXSPI_DEVICE_TYPE_SERIAL_RAM = 3, /* Flash devices are Serial
* RAM/HyperFLASH */
FLEXSPI_DEVICE_TYPE_MCP_NOR_NAND = 0x12, /* Flash device is MCP device,
FLEXSPI_DEVICE_TYPE_MCP_NOR_NAND = 0x12, /* Flash device is MCP device,
* A1 is Serial NOR, A2 is
* Serial NAND */
FLEXSPI_DEVICE_TYPE_MCP_NOR_RAM = 0x13, /* Flash device is MCP device,
FLEXSPI_DEVICE_TYPE_MCP_NOR_RAM = 0x13, /* Flash device is MCP device,
* A1 is Serial NOR, A2 is
* Serial RAMs */
};
};
/* Flash Pad Definitions */
enum flash_flash_pad_e
{
SERIAL_FLASH_1PAD = 1,
SERIAL_FLASH_2PADS = 2,
SERIAL_FLASH_4PADS = 4,
SERIAL_FLASH_8PADS = 8,
};
{
SERIAL_FLASH_1PAD = 1,
SERIAL_FLASH_2PADS = 2,
SERIAL_FLASH_4PADS = 4,
SERIAL_FLASH_8PADS = 8,
};
/* Flash Configuration Command Type */
enum flash_config_cmd_e
{
DEVICE_CONFIG_CMD_TYPE_GENERIC, /* Generic command, for example:
{
DEVICE_CONFIG_CMD_TYPE_GENERIC, /* Generic command, for example:
* configure dummy cycles, drive
* strength, etc */
DEVICE_CONFIG_CMD_TYPE_QUADENABLE, /* Quad Enable command */
DEVICE_CONFIG_CMD_TYPE_SPI2XPI, /* Switch from SPI to DPI/QPI/OPI mode */
DEVICE_CONFIG_CMD_TYPE_XPI2SPI, /* Switch from DPI/QPI/OPI to SPI mode */
DEVICE_CONFIG_CMD_TYPE_SPI2NO_CMD, /* Switch to 0-4-4/0-8-8 mode */
DEVICE_CONFIG_CMD_TYPE_RESET, /* Reset device command */
};
DEVICE_CONFIG_CMD_TYPE_QUADENABLE, /* Quad Enable command */
DEVICE_CONFIG_CMD_TYPE_SPI2XPI, /* Switch from SPI to DPI/QPI/OPI mode */
DEVICE_CONFIG_CMD_TYPE_XPI2SPI, /* Switch from DPI/QPI/OPI to SPI mode */
DEVICE_CONFIG_CMD_TYPE_SPI2NO_CMD, /* Switch to 0-4-4/0-8-8 mode */
DEVICE_CONFIG_CMD_TYPE_RESET, /* Reset device command */
};
/* FlexSPI LUT Sequence structure */
struct flexspi_lut_seq_s
{
uint8_t seq_num; /* Sequence Number, valid number: 1-16 */
uint8_t seq_id; /* Sequence Index, valid number: 0-15 */
uint16_t reserved;
};
{
uint8_t seq_num; /* Sequence Number, valid number: 1-16 */
uint8_t seq_id; /* Sequence Index, valid number: 0-15 */
uint16_t reserved;
};
/* FlexSPI Memory Configuration Block */
struct flexspi_mem_config_s
{
uint32_t tag;
uint32_t version;
uint32_t reserved0;
uint8_t read_sample_clksrc;
uint8_t cs_hold_time;
uint8_t cs_setup_time;
uint8_t column_address_width; /* [0x00f-0x00f] Column Address with,
{
uint32_t tag;
uint32_t version;
uint32_t reserved0;
uint8_t read_sample_clksrc;
uint8_t cs_hold_time;
uint8_t cs_setup_time;
uint8_t column_address_width; /* [0x00f-0x00f] Column Address with,
* for HyperBus protocol, it is fixed
* to 3, For Serial NAND, need to refer
* to datasheet */
uint8_t device_mode_cfg_enable;
uint8_t device_mode_type;
uint16_t wait_time_cfg_commands;
struct flexspi_lut_seq_s device_mode_seq;
uint32_t device_mode_arg;
uint8_t config_cmd_enable;
uint8_t config_mode_type[3];
struct flexspi_lut_seq_s config_cmd_seqs[3];
uint32_t reserved1;
uint32_t config_cmd_args[3];
uint32_t reserved2;
uint32_t controller_misc_option;
uint8_t device_type;
uint8_t sflash_pad_type;
uint8_t serial_clk_freq;
uint8_t lut_custom_seq_enable;
uint32_t reserved3[2];
uint32_t sflash_a1size;
uint32_t sflash_a2size;
uint32_t sflash_b1size;
uint32_t sflash_b2size;
uint32_t cspad_setting_override;
uint32_t sclkpad_setting_override;
uint32_t datapad_setting_override;
uint32_t dqspad_setting_override;
uint32_t timeout_in_ms;
uint32_t command_interval;
uint16_t data_valid_time[2];
uint16_t busy_offset;
uint16_t busybit_polarity;
uint32_t lookup_table[64];
struct flexspi_lut_seq_s lut_customseq[12];
uint32_t reserved4[4];
};
uint8_t device_mode_cfg_enable;
uint8_t device_mode_type;
uint16_t wait_time_cfg_commands;
struct flexspi_lut_seq_s device_mode_seq;
uint32_t device_mode_arg;
uint8_t config_cmd_enable;
uint8_t config_mode_type[3];
struct flexspi_lut_seq_s config_cmd_seqs[3];
uint32_t reserved1;
uint32_t config_cmd_args[3];
uint32_t reserved2;
uint32_t controller_misc_option;
uint8_t device_type;
uint8_t sflash_pad_type;
uint8_t serial_clk_freq;
uint8_t lut_custom_seq_enable;
uint32_t reserved3[2];
uint32_t sflash_a1size;
uint32_t sflash_a2size;
uint32_t sflash_b1size;
uint32_t sflash_b2size;
uint32_t cspad_setting_override;
uint32_t sclkpad_setting_override;
uint32_t datapad_setting_override;
uint32_t dqspad_setting_override;
uint32_t timeout_in_ms;
uint32_t command_interval;
uint16_t data_valid_time[2];
uint16_t busy_offset;
uint16_t busybit_polarity;
uint32_t lookup_table[64];
struct flexspi_lut_seq_s lut_customseq[12];
uint32_t reserved4[4];
};
/* Serial NOR configuration block */
struct flexspi_nor_config_s
{
struct flexspi_mem_config_s mem_config; /* Common memory configuration
{
struct flexspi_mem_config_s mem_config; /* Common memory configuration
* info via FlexSPI */
uint32_t page_size; /* Page size of Serial NOR */
uint32_t sector_size; /* Sector size of Serial NOR */
uint8_t ipcmd_serial_clkfreq; /* Clock frequency for IP command */
uint8_t is_uniform_blocksize; /* Sector/Block size is the same */
uint8_t reserved0[2]; /* Reserved for future use */
uint8_t serial_nor_type; /* Serial NOR Flash type: 0/1/2/3 */
uint8_t need_exit_nocmdmode; /* Need to exit NoCmd mode before other
uint32_t page_size; /* Page size of Serial NOR */
uint32_t sector_size; /* Sector size of Serial NOR */
uint8_t ipcmd_serial_clkfreq; /* Clock frequency for IP command */
uint8_t is_uniform_blocksize; /* Sector/Block size is the same */
uint8_t reserved0[2]; /* Reserved for future use */
uint8_t serial_nor_type; /* Serial NOR Flash type: 0/1/2/3 */
uint8_t need_exit_nocmdmode; /* Need to exit NoCmd mode before other
* IP command */
uint8_t halfclk_for_nonreadcmd; /* Half the Serial Clock for non-read
uint8_t halfclk_for_nonreadcmd; /* Half the Serial Clock for non-read
* command: true/false */
uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP
uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP
* command execution */
uint32_t blocksize; /* Block size */
uint32_t reserve2[11]; /* Reserved for future use */
};
uint32_t blocksize; /* Block size */
uint32_t reserve2[11]; /* Reserved for future use */
};
#endif /* __BOARDS_ARM_IMXRT_TEENSY_4_SRC_IMXRT_FLEXSPI_NOR_FLASH_H */

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@ -36,6 +36,8 @@
#ifdef CONFIG_IMXRT_LPI2C
#define BMP280_LPI2C 3
/****************************************************************************
* Public Functions
****************************************************************************/
@ -70,7 +72,7 @@ static void imxrt_i2c_register(int bus)
}
#ifdef SENSORS_BMP280
if (CONFIG_BMP280_LPI2C == bus)
if (BMP280_LPI2C == bus)
{
/* Register the BMP280 driver */

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@ -18,16 +18,16 @@
*
****************************************************************************/
/* There are two LED status indicators located on the EVK Board. The
/* There are two LED status indicators located on Teensy-4.x Board. The
* functions of these LEDs include:
*
* - RED LED (loading status)
* - dim: ready
* - bright: writing
* - blink: no USB
* - USER LED (D8)
* - USER LED (D3)
*
* Only a single LED, D8, is under software control.
* Only a single LED, D3, is under software control.
*/
/****************************************************************************

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@ -51,9 +51,9 @@
* - dim: ready
* - bright: writing
* - blink: no USB
* - USER LED(D8)
* - USER LED (D3)
*
* Only a single LED, D8, is under software control.
* Only a single LED, D3, is under software control.
*/
# define GPIO_LED (GPIO_OUTPUT | IOMUX_LED_DEFAULT | \