boards/arm/imxrt/teensy-4.x: fixed build error and nx style
Signed-off-by: Michal Lenc <lencmich@fel.cvut.cz>
This commit is contained in:
parent
2de4b68389
commit
eabd79f97b
@ -24,13 +24,4 @@ config TEENSY_41
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endchoice # Board configuration
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menu "Sensors interfaces"
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config BMP280_LPI2C
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int "LPI2C interface for BMP280 sensor"
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depends on SENSORS_BMP280
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default 4
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endmenu # Sensors interfaces
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endif
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@ -41,9 +41,9 @@ LEDs and buttons
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- dim: ready
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- bright: writing
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- blink: no USB
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- USER LED(D8)
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- USER LED (D3)
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Only a single LED, D8, is under software control.
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Only a single LED, D3, is under software control.
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This LED is not used by the board port unless CONFIG_ARCH_LEDS is
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defined. In that case, the usage by the board port is defined in
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@ -121,7 +121,6 @@ Configurations
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Configuration sub-directories
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-----------------------------
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nsh-4.0:
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Configures the NuttShell (nsh) located at examples/nsh for Teensy 4.0.
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@ -21,32 +21,9 @@ CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARD_LOOPSPERMSEC=104926
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CONFIG_BUILTIN=y
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CONFIG_TEENSY_41=y
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CONFIG_CAN=y
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CONFIG_CANUTILS_CANDUMP=y
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CONFIG_CANUTILS_CANSEND=y
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CONFIG_DEBUG_BINFMT=y
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CONFIG_DEBUG_BINFMT_ERROR=y
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CONFIG_DEBUG_BINFMT_INFO=y
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CONFIG_DEBUG_BINFMT_WARN=y
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CONFIG_DEBUG_CAN=y
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CONFIG_DEBUG_CAN_ERROR=y
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CONFIG_DEBUG_CAN_INFO=y
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CONFIG_DEBUG_CAN_WARN=y
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CONFIG_DEBUG_ERROR=y
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CONFIG_DEBUG_FEATURES=y
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CONFIG_DEBUG_FULLOPT=y
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CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_IRQ=y
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CONFIG_DEBUG_IRQ_ERROR=y
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CONFIG_DEBUG_IRQ_INFO=y
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CONFIG_DEBUG_IRQ_WARN=y
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CONFIG_DEBUG_NET=y
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CONFIG_DEBUG_NET_ERROR=y
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CONFIG_DEBUG_NET_INFO=y
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CONFIG_DEBUG_NET_WARN=y
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CONFIG_DEBUG_SYMBOLS=y
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CONFIG_DEBUG_WARN=y
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CONFIG_FS_PROCFS=y
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CONFIG_IDLETHREAD_STACKSIZE=2048
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CONFIG_IMXRT_FLEXCAN3=y
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@ -77,4 +54,5 @@ CONFIG_SIG_DEFAULT=y
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CONFIG_START_DAY=14
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CONFIG_START_MONTH=3
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CONFIG_SYSTEM_NSH=y
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CONFIG_TEENSY_41=y
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CONFIG_USER_ENTRYPOINT="nsh_main"
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@ -19,14 +19,6 @@ CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARD_LOOPSPERMSEC=104926
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CONFIG_BUILTIN=y
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CONFIG_DEBUG_ERROR=y
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CONFIG_DEBUG_FEATURES=y
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CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_NET=y
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CONFIG_DEBUG_NET_ERROR=y
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CONFIG_DEBUG_NET_INFO=y
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CONFIG_DEBUG_NET_WARN=y
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CONFIG_DEBUG_WARN=y
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CONFIG_ETH0_PHY_DP83825I=y
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CONFIG_FS_PROCFS=y
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CONFIG_IDLETHREAD_STACKSIZE=2048
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@ -12,7 +12,6 @@ CONFIG_ARCH_CHIP="imxrt"
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CONFIG_ARCH_CHIP_IMXRT=y
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CONFIG_ARCH_CHIP_MIMXRT1062DVL6A=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_TEENSY_40=y
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CONFIG_ARMV7M_DCACHE=y
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CONFIG_ARMV7M_DCACHE_WRITETHROUGH=y
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CONFIG_ARMV7M_ICACHE=y
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@ -20,15 +20,6 @@ CONFIG_ARMV7M_ICACHE=y
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CONFIG_ARMV7M_USEBASEPRI=y
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CONFIG_BOARD_LOOPSPERMSEC=104926
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CONFIG_BUILTIN=y
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CONFIG_DEBUG_ASSERTIONS=y
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CONFIG_DEBUG_ERROR=y
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CONFIG_DEBUG_FEATURES=y
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CONFIG_DEBUG_FS=y
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CONFIG_DEBUG_FS_ERROR=y
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CONFIG_DEBUG_FS_INFO=y
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CONFIG_DEBUG_FS_WARN=y
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CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_WARN=y
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CONFIG_FAT_LCNAMES=y
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CONFIG_FAT_LFN=y
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CONFIG_FS_FAT=y
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@ -128,18 +128,16 @@
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/* LED definitions **********************************************************/
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/* There are four LED status indicators located on the EVK Board.
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/* There are two LED status indicators located on the Teensy 4.x board.
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* The functions of these LEDs include:
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*
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* - Main Power Supply(D3)
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* Green: DC 5V main supply is normal.
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* Red: J2 input voltage is over 5.6V.
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* Off: The board is not powered.
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* - Reset RED LED(D15)
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* - OpenSDA LED(D16)
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* - USER LED(D8)
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* - RED LED (loading status)
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* - dim: ready
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* - bright: writing
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* - blink: no USB
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* - USER LED (D3)
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*
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* Only a single LED, D8, is under software control.
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* Only a single LED, D3, is under software control.
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*/
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/* LED index values for use with board_userled() */
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@ -227,12 +225,7 @@
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/* PIO Disambiguation *******************************************************/
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/* LPUARTs
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*
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* Virtual console port provided by OpenSDA on UART1 and
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* Arduino RS-232 Shield on UART3.
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*
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*/
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/* LPUARTs */
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#define GPIO_LPUART1_RX (GPIO_LPUART1_RX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B0_13 */
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#define GPIO_LPUART1_TX (GPIO_LPUART1_TX_1|IOMUX_UART_DEFAULT) /* GPIO_AD_B0_12 */
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@ -50,12 +50,12 @@
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MEMORY
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{
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flash (rx) : ORIGIN = 0x60000000, LENGTH = 7M
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flashxip (rx) : ORIGIN = 0x60700000, LENGTH = 1M
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/* Vectors @ boot+ivt OCRAM2 Flex RAM Boot IVT */
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sram (rwx) : ORIGIN = 0x2020A000, LENGTH = 512K + 256K + 128K - (32K + 8K)
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itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 0K
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dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
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flash (rx) : ORIGIN = 0x60000000, LENGTH = 7M
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flashxip (rx) : ORIGIN = 0x60700000, LENGTH = 1M
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/* Vectors @ boot+ivt OCRAM2 Flex RAM Boot IVT */
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sram (rwx) : ORIGIN = 0x2020A000, LENGTH = 512K + 256K + 128K - (32K + 8K)
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itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 0K
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dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
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}
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OUTPUT_ARCH(arm)
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@ -69,26 +69,26 @@ ENTRY(_stext)
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SECTIONS
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{
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/* Image Vector Table and Boot Data for booting from external flash */
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/* Image Vector Table and Boot Data for booting from external flash */
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.boot_hdr : ALIGN(4)
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{
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FILL(0xff)
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__boot_hdr_start__ = ABSOLUTE(.) ;
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KEEP(*(.boot_hdr.conf))
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. = 0x1000 ;
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KEEP(*(.boot_hdr.ivt))
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. = 0x1020 ;
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KEEP(*(.boot_hdr.boot_data))
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. = 0x1030 ;
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KEEP(*(.boot_hdr.dcd_data))
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__boot_hdr_end__ = ABSOLUTE(.) ;
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. = 0x2000 ;
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} > flash
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.boot_hdr : ALIGN(4)
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{
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FILL(0xff)
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__boot_hdr_start__ = ABSOLUTE(.) ;
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KEEP(*(.boot_hdr.conf))
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. = 0x1000 ;
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KEEP(*(.boot_hdr.ivt))
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. = 0x1020 ;
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KEEP(*(.boot_hdr.boot_data))
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. = 0x1030 ;
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KEEP(*(.boot_hdr.dcd_data))
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__boot_hdr_end__ = ABSOLUTE(.) ;
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. = 0x2000 ;
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} > flash
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/* Catch all the section we want not in OCRAM so that the *(.text .text.*) in flash does not */
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.flashxip : ALIGN(4)
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.flashxip : ALIGN(4)
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{
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FILL(0xff)
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@ -109,78 +109,78 @@ SECTIONS
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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} > flashxip
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} > flashxip
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.text :
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{
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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_etext = ABSOLUTE(.);
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} > sram AT > flash
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.text :
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{
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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_etext = ABSOLUTE(.);
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} > sram AT > flash
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.init_section :
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{
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_sinit = ABSOLUTE(.);
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*(.init_array .init_array.*)
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_einit = ABSOLUTE(.);
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} > flash
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.init_section :
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{
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_sinit = ABSOLUTE(.);
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*(.init_array .init_array.*)
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_einit = ABSOLUTE(.);
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} > flash
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.ARM.extab :
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{
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*(.ARM.extab*)
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} > flash
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.ARM.extab :
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{
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*(.ARM.extab*)
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} > flash
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.ARM.exidx :
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{
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__exidx_start = ABSOLUTE(.);
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*(.ARM.exidx*)
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__exidx_end = ABSOLUTE(.);
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} > flash
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.ARM.exidx :
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{
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__exidx_start = ABSOLUTE(.);
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*(.ARM.exidx*)
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__exidx_end = ABSOLUTE(.);
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} > flash
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_eronly = ABSOLUTE(.);
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_eronly = ABSOLUTE(.);
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.data :
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{
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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} > sram AT > flash
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.data :
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{
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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} > sram AT > flash
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.ramfunc ALIGN(4):
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{
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_sramfuncs = ABSOLUTE(.);
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*(.ramfunc .ramfunc.*)
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_eramfuncs = ABSOLUTE(.);
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} > sram AT > flash
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.ramfunc ALIGN(4):
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{
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_sramfuncs = ABSOLUTE(.);
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*(.ramfunc .ramfunc.*)
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_eramfuncs = ABSOLUTE(.);
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} > sram AT > flash
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_framfuncs = LOADADDR(.ramfunc);
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_framfuncs = LOADADDR(.ramfunc);
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.bss :
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{
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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} > sram
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.bss :
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{
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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} > sram
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/* Stabs debugging sections. */
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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@ -70,6 +70,7 @@ int imxrt_adc_initialize(void)
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int ret;
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/* Call imxrt_adcinitialize() to get an instance of the ADC interface */
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#ifdef CONFIG_IMXRT_ADC1
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adc = imxrt_adcinitialize(1, g_chanlist, ADC_NCHANNELS);
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if (adc == NULL)
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@ -18,18 +18,17 @@
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*
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****************************************************************************/
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/* There are four LED status indicators located on the EVK Board. The
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* functions of these LEDs include:
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/* There are two LED status indicators located on the Teensy 4.x board.
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* The functions of these LEDs include:
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*
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* - Main Power Supply(D3)??
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* Green: DC 5V main supply is normal.
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* Red: J2 input voltage is over 5.6V.
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* Off: The board is not powered.
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* - Reset RED LED(D21)??
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* - OpenSDA LED(D20)??
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* - USER LED(D8)
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* - RED LED (loading status)
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* - dim: ready
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* - bright: writing
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* - blink: no USB
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* - USER LED (D3)
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*
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* Only a single LED, D3, is under software control.
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*
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* Only a single LED, D8, is under software control.
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*
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* This LED is not used by the board port unless CONFIG_ARCH_LEDS is
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* defined. In that case, the usage by the board port is defined in
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@ -29,28 +29,28 @@
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****************************************************************************/
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__attribute__((section(".boot_hdr.ivt")))
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const struct ivt_s g_image_vector_table =
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const struct ivt_s g_image_vector_table =
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{
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IVT_HEADER, /* IVT Header */
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IMAGE_ENTRY_ADDRESS, /* Image Entry Function */
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IVT_RSVD, /* Reserved = 0 */
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(uint32_t) DCD_ADDRESS, /* Address where DCD information is
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* stored */
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(uint32_t) BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure
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* is stored */
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(uint32_t) IMAG_VECTOR_TABLE, /* Pointer to IVT Self (absolute
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* address */
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(uint32_t) CSF_ADDRESS, /* Address where CSF file is stored */
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IVT_RSVD /* Reserved = 0 */
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IVT_HEADER, /* IVT Header */
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IMAGE_ENTRY_ADDRESS, /* Image Entry Function */
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IVT_RSVD, /* Reserved = 0 */
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(uint32_t) DCD_ADDRESS, /* Address where DCD information is
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* stored */
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(uint32_t) BOOT_DATA_ADDRESS, /* Address where BOOT Data Structure
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* is stored */
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(uint32_t) IMAG_VECTOR_TABLE, /* Pointer to IVT Self (absolute
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* address */
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(uint32_t) CSF_ADDRESS, /* Address where CSF file is stored */
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IVT_RSVD /* Reserved = 0 */
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};
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__attribute__((section(".boot_hdr.boot_data")))
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const struct boot_data_s g_boot_data =
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const struct boot_data_s g_boot_data =
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{
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IMAGE_DEST, /* boot start location */
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(IMAGE_DEST_END - IMAGE_DEST), /* size */
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PLUGIN_FLAG, /* Plugin flag */
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0xffffffff /* empty - extra data word */
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IMAGE_DEST, /* boot start location */
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(IMAGE_DEST_END - IMAGE_DEST), /* size */
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PLUGIN_FLAG, /* Plugin flag */
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0xffffffff /* empty - extra data word */
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};
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/****************************************************************************
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@ -19,7 +19,7 @@
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****************************************************************************/
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#ifndef __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_IMXRT_FLEXSPI_NOR_BOOT_H
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# define __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_IMXRT_FLEXSPI_NOR_BOOT_H
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#define __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_IMXRT_FLEXSPI_NOR_BOOT_H
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/****************************************************************************
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* Included Files
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|
@ -18,7 +18,7 @@
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_IMXRT_FLEXSPI_NOR_FLASH_H
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# define __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_IMXRT_FLEXSPI_NOR_FLASH_H
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#define __BOARDS_ARM_IMXRT_TEENSY_4X_SRC_IMXRT_FLEXSPI_NOR_FLASH_H
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|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
@ -188,177 +188,177 @@
|
||||
/* Definitions for FlexSPI Serial Clock Frequency */
|
||||
|
||||
enum flexspi_serial_clkfreq_e
|
||||
{
|
||||
FLEXSPI_SERIAL_CLKFREQ_30MHz = 1,
|
||||
FLEXSPI_SERIAL_CLKFREQ_50MHz = 2,
|
||||
FLEXSPI_SERIAL_CLKFREQ_60MHz = 3,
|
||||
FLEXSPI_SERIAL_CLKFREQ_75MHz = 4,
|
||||
FLEXSPI_SERIAL_CLKFREQ_80MHz = 5,
|
||||
FLEXSPI_SERIAL_CLKFREQ_100MHz = 6,
|
||||
FLEXSPI_SERIAL_CLKFREQ_133MHz = 7,
|
||||
FLEXSPI_SERIAL_CLKFREQ_166MHz = 8,
|
||||
FLEXSPI_SERIAL_CLKFREQ_200MHz = 9,
|
||||
};
|
||||
{
|
||||
FLEXSPI_SERIAL_CLKFREQ_30MHz = 1,
|
||||
FLEXSPI_SERIAL_CLKFREQ_50MHz = 2,
|
||||
FLEXSPI_SERIAL_CLKFREQ_60MHz = 3,
|
||||
FLEXSPI_SERIAL_CLKFREQ_75MHz = 4,
|
||||
FLEXSPI_SERIAL_CLKFREQ_80MHz = 5,
|
||||
FLEXSPI_SERIAL_CLKFREQ_100MHz = 6,
|
||||
FLEXSPI_SERIAL_CLKFREQ_133MHz = 7,
|
||||
FLEXSPI_SERIAL_CLKFREQ_166MHz = 8,
|
||||
FLEXSPI_SERIAL_CLKFREQ_200MHz = 9,
|
||||
};
|
||||
|
||||
/* FlexSPI clock configuration type */
|
||||
|
||||
enum flexspi_serial_clockmode_e
|
||||
{
|
||||
FLEXSPI_CLKMODE_SDR,
|
||||
FLEXSPI_CLKMODE_DDR,
|
||||
};
|
||||
{
|
||||
FLEXSPI_CLKMODE_SDR,
|
||||
FLEXSPI_CLKMODE_DDR,
|
||||
};
|
||||
|
||||
/* FlexSPI Read Sample Clock Source definition */
|
||||
|
||||
enum flash_read_sample_clk_e
|
||||
{
|
||||
FLASH_READ_SAMPLE_CLK_LOOPBACK_INTERNELLY = 0,
|
||||
FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_DQSPAD = 1,
|
||||
FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_SCKPAD = 2,
|
||||
FLASH_READ_SAMPLE_CLK_EXTERNALINPUT_FROM_DQSPAD = 3,
|
||||
};
|
||||
{
|
||||
FLASH_READ_SAMPLE_CLK_LOOPBACK_INTERNELLY = 0,
|
||||
FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_DQSPAD = 1,
|
||||
FLASH_READ_SAMPLE_CLK_LOOPBACK_FROM_SCKPAD = 2,
|
||||
FLASH_READ_SAMPLE_CLK_EXTERNALINPUT_FROM_DQSPAD = 3,
|
||||
};
|
||||
|
||||
/* Misc feature bit definitions */
|
||||
|
||||
enum flash_misc_feature_e
|
||||
{
|
||||
FLEXSPIMISC_OFFSET_DIFFCLKEN = 0, /* Bit for Differential clock enable */
|
||||
FLEXSPIMISC_OFFSET_CK2EN = 1, /* Bit for CK2 enable */
|
||||
FLEXSPIMISC_OFFSET_PARALLELEN = 2, /* Bit for Parallel mode enable */
|
||||
{
|
||||
FLEXSPIMISC_OFFSET_DIFFCLKEN = 0, /* Bit for Differential clock enable */
|
||||
FLEXSPIMISC_OFFSET_CK2EN = 1, /* Bit for CK2 enable */
|
||||
FLEXSPIMISC_OFFSET_PARALLELEN = 2, /* Bit for Parallel mode enable */
|
||||
|
||||
FLEXSPIMISC_OFFSET_WORD_ADDRESSABLE_EN = 3, /* Bit for Word Addressable
|
||||
FLEXSPIMISC_OFFSET_WORD_ADDRESSABLE_EN = 3, /* Bit for Word Addressable
|
||||
* enable */
|
||||
FLEXSPIMISC_OFFSET_SAFECONFIG_FREQ_EN = 4, /* Bit for Safe Configuration
|
||||
FLEXSPIMISC_OFFSET_SAFECONFIG_FREQ_EN = 4, /* Bit for Safe Configuration
|
||||
* Frequency enable */
|
||||
|
||||
FLEXSPIMISC_OFFSET_PAD_SETTING_OVERRIDE_EN = 5, /* Bit for Pad setting
|
||||
FLEXSPIMISC_OFFSET_PAD_SETTING_OVERRIDE_EN = 5, /* Bit for Pad setting
|
||||
* override enable */
|
||||
|
||||
FLEXSPIMISC_OFFSET_DDR_MODE_EN = 6, /* Bit for DDR clock confiuration
|
||||
FLEXSPIMISC_OFFSET_DDR_MODE_EN = 6, /* Bit for DDR clock confiuration
|
||||
* indication. */
|
||||
};
|
||||
};
|
||||
|
||||
/* Flash Type Definition */
|
||||
|
||||
enum flash_flash_type_e
|
||||
{
|
||||
FLEXSPI_DEVICE_TYPE_SERIAL_NOR = 1, /* Flash devices are Serial NOR */
|
||||
FLEXSPI_DEVICE_TYPE_SERIAL_NAND = 2, /* Flash devices are Serial
|
||||
{
|
||||
FLEXSPI_DEVICE_TYPE_SERIAL_NOR = 1, /* Flash devices are Serial NOR */
|
||||
FLEXSPI_DEVICE_TYPE_SERIAL_NAND = 2, /* Flash devices are Serial
|
||||
* NAND */
|
||||
FLEXSPI_DEVICE_TYPE_SERIAL_RAM = 3, /* Flash devices are Serial
|
||||
FLEXSPI_DEVICE_TYPE_SERIAL_RAM = 3, /* Flash devices are Serial
|
||||
* RAM/HyperFLASH */
|
||||
|
||||
FLEXSPI_DEVICE_TYPE_MCP_NOR_NAND = 0x12, /* Flash device is MCP device,
|
||||
FLEXSPI_DEVICE_TYPE_MCP_NOR_NAND = 0x12, /* Flash device is MCP device,
|
||||
* A1 is Serial NOR, A2 is
|
||||
* Serial NAND */
|
||||
FLEXSPI_DEVICE_TYPE_MCP_NOR_RAM = 0x13, /* Flash device is MCP device,
|
||||
FLEXSPI_DEVICE_TYPE_MCP_NOR_RAM = 0x13, /* Flash device is MCP device,
|
||||
* A1 is Serial NOR, A2 is
|
||||
* Serial RAMs */
|
||||
};
|
||||
};
|
||||
|
||||
/* Flash Pad Definitions */
|
||||
|
||||
enum flash_flash_pad_e
|
||||
{
|
||||
SERIAL_FLASH_1PAD = 1,
|
||||
SERIAL_FLASH_2PADS = 2,
|
||||
SERIAL_FLASH_4PADS = 4,
|
||||
SERIAL_FLASH_8PADS = 8,
|
||||
};
|
||||
{
|
||||
SERIAL_FLASH_1PAD = 1,
|
||||
SERIAL_FLASH_2PADS = 2,
|
||||
SERIAL_FLASH_4PADS = 4,
|
||||
SERIAL_FLASH_8PADS = 8,
|
||||
};
|
||||
|
||||
/* Flash Configuration Command Type */
|
||||
|
||||
enum flash_config_cmd_e
|
||||
{
|
||||
DEVICE_CONFIG_CMD_TYPE_GENERIC, /* Generic command, for example:
|
||||
{
|
||||
DEVICE_CONFIG_CMD_TYPE_GENERIC, /* Generic command, for example:
|
||||
* configure dummy cycles, drive
|
||||
* strength, etc */
|
||||
DEVICE_CONFIG_CMD_TYPE_QUADENABLE, /* Quad Enable command */
|
||||
DEVICE_CONFIG_CMD_TYPE_SPI2XPI, /* Switch from SPI to DPI/QPI/OPI mode */
|
||||
DEVICE_CONFIG_CMD_TYPE_XPI2SPI, /* Switch from DPI/QPI/OPI to SPI mode */
|
||||
DEVICE_CONFIG_CMD_TYPE_SPI2NO_CMD, /* Switch to 0-4-4/0-8-8 mode */
|
||||
DEVICE_CONFIG_CMD_TYPE_RESET, /* Reset device command */
|
||||
};
|
||||
DEVICE_CONFIG_CMD_TYPE_QUADENABLE, /* Quad Enable command */
|
||||
DEVICE_CONFIG_CMD_TYPE_SPI2XPI, /* Switch from SPI to DPI/QPI/OPI mode */
|
||||
DEVICE_CONFIG_CMD_TYPE_XPI2SPI, /* Switch from DPI/QPI/OPI to SPI mode */
|
||||
DEVICE_CONFIG_CMD_TYPE_SPI2NO_CMD, /* Switch to 0-4-4/0-8-8 mode */
|
||||
DEVICE_CONFIG_CMD_TYPE_RESET, /* Reset device command */
|
||||
};
|
||||
|
||||
/* FlexSPI LUT Sequence structure */
|
||||
|
||||
struct flexspi_lut_seq_s
|
||||
{
|
||||
uint8_t seq_num; /* Sequence Number, valid number: 1-16 */
|
||||
uint8_t seq_id; /* Sequence Index, valid number: 0-15 */
|
||||
uint16_t reserved;
|
||||
};
|
||||
{
|
||||
uint8_t seq_num; /* Sequence Number, valid number: 1-16 */
|
||||
uint8_t seq_id; /* Sequence Index, valid number: 0-15 */
|
||||
uint16_t reserved;
|
||||
};
|
||||
|
||||
/* FlexSPI Memory Configuration Block */
|
||||
|
||||
struct flexspi_mem_config_s
|
||||
{
|
||||
uint32_t tag;
|
||||
uint32_t version;
|
||||
uint32_t reserved0;
|
||||
uint8_t read_sample_clksrc;
|
||||
uint8_t cs_hold_time;
|
||||
uint8_t cs_setup_time;
|
||||
uint8_t column_address_width; /* [0x00f-0x00f] Column Address with,
|
||||
{
|
||||
uint32_t tag;
|
||||
uint32_t version;
|
||||
uint32_t reserved0;
|
||||
uint8_t read_sample_clksrc;
|
||||
uint8_t cs_hold_time;
|
||||
uint8_t cs_setup_time;
|
||||
uint8_t column_address_width; /* [0x00f-0x00f] Column Address with,
|
||||
* for HyperBus protocol, it is fixed
|
||||
* to 3, For Serial NAND, need to refer
|
||||
* to datasheet */
|
||||
uint8_t device_mode_cfg_enable;
|
||||
uint8_t device_mode_type;
|
||||
uint16_t wait_time_cfg_commands;
|
||||
struct flexspi_lut_seq_s device_mode_seq;
|
||||
uint32_t device_mode_arg;
|
||||
uint8_t config_cmd_enable;
|
||||
uint8_t config_mode_type[3];
|
||||
struct flexspi_lut_seq_s config_cmd_seqs[3];
|
||||
uint32_t reserved1;
|
||||
uint32_t config_cmd_args[3];
|
||||
uint32_t reserved2;
|
||||
uint32_t controller_misc_option;
|
||||
uint8_t device_type;
|
||||
uint8_t sflash_pad_type;
|
||||
uint8_t serial_clk_freq;
|
||||
uint8_t lut_custom_seq_enable;
|
||||
uint32_t reserved3[2];
|
||||
uint32_t sflash_a1size;
|
||||
uint32_t sflash_a2size;
|
||||
uint32_t sflash_b1size;
|
||||
uint32_t sflash_b2size;
|
||||
uint32_t cspad_setting_override;
|
||||
uint32_t sclkpad_setting_override;
|
||||
uint32_t datapad_setting_override;
|
||||
uint32_t dqspad_setting_override;
|
||||
uint32_t timeout_in_ms;
|
||||
uint32_t command_interval;
|
||||
uint16_t data_valid_time[2];
|
||||
uint16_t busy_offset;
|
||||
uint16_t busybit_polarity;
|
||||
uint32_t lookup_table[64];
|
||||
struct flexspi_lut_seq_s lut_customseq[12];
|
||||
uint32_t reserved4[4];
|
||||
};
|
||||
uint8_t device_mode_cfg_enable;
|
||||
uint8_t device_mode_type;
|
||||
uint16_t wait_time_cfg_commands;
|
||||
struct flexspi_lut_seq_s device_mode_seq;
|
||||
uint32_t device_mode_arg;
|
||||
uint8_t config_cmd_enable;
|
||||
uint8_t config_mode_type[3];
|
||||
struct flexspi_lut_seq_s config_cmd_seqs[3];
|
||||
uint32_t reserved1;
|
||||
uint32_t config_cmd_args[3];
|
||||
uint32_t reserved2;
|
||||
uint32_t controller_misc_option;
|
||||
uint8_t device_type;
|
||||
uint8_t sflash_pad_type;
|
||||
uint8_t serial_clk_freq;
|
||||
uint8_t lut_custom_seq_enable;
|
||||
uint32_t reserved3[2];
|
||||
uint32_t sflash_a1size;
|
||||
uint32_t sflash_a2size;
|
||||
uint32_t sflash_b1size;
|
||||
uint32_t sflash_b2size;
|
||||
uint32_t cspad_setting_override;
|
||||
uint32_t sclkpad_setting_override;
|
||||
uint32_t datapad_setting_override;
|
||||
uint32_t dqspad_setting_override;
|
||||
uint32_t timeout_in_ms;
|
||||
uint32_t command_interval;
|
||||
uint16_t data_valid_time[2];
|
||||
uint16_t busy_offset;
|
||||
uint16_t busybit_polarity;
|
||||
uint32_t lookup_table[64];
|
||||
struct flexspi_lut_seq_s lut_customseq[12];
|
||||
uint32_t reserved4[4];
|
||||
};
|
||||
|
||||
/* Serial NOR configuration block */
|
||||
|
||||
struct flexspi_nor_config_s
|
||||
{
|
||||
struct flexspi_mem_config_s mem_config; /* Common memory configuration
|
||||
{
|
||||
struct flexspi_mem_config_s mem_config; /* Common memory configuration
|
||||
* info via FlexSPI */
|
||||
|
||||
uint32_t page_size; /* Page size of Serial NOR */
|
||||
uint32_t sector_size; /* Sector size of Serial NOR */
|
||||
uint8_t ipcmd_serial_clkfreq; /* Clock frequency for IP command */
|
||||
uint8_t is_uniform_blocksize; /* Sector/Block size is the same */
|
||||
uint8_t reserved0[2]; /* Reserved for future use */
|
||||
uint8_t serial_nor_type; /* Serial NOR Flash type: 0/1/2/3 */
|
||||
uint8_t need_exit_nocmdmode; /* Need to exit NoCmd mode before other
|
||||
uint32_t page_size; /* Page size of Serial NOR */
|
||||
uint32_t sector_size; /* Sector size of Serial NOR */
|
||||
uint8_t ipcmd_serial_clkfreq; /* Clock frequency for IP command */
|
||||
uint8_t is_uniform_blocksize; /* Sector/Block size is the same */
|
||||
uint8_t reserved0[2]; /* Reserved for future use */
|
||||
uint8_t serial_nor_type; /* Serial NOR Flash type: 0/1/2/3 */
|
||||
uint8_t need_exit_nocmdmode; /* Need to exit NoCmd mode before other
|
||||
* IP command */
|
||||
uint8_t halfclk_for_nonreadcmd; /* Half the Serial Clock for non-read
|
||||
uint8_t halfclk_for_nonreadcmd; /* Half the Serial Clock for non-read
|
||||
* command: true/false */
|
||||
uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP
|
||||
uint8_t need_restore_nocmdmode; /* Need to Restore NoCmd mode after IP
|
||||
* command execution */
|
||||
uint32_t blocksize; /* Block size */
|
||||
uint32_t reserve2[11]; /* Reserved for future use */
|
||||
};
|
||||
uint32_t blocksize; /* Block size */
|
||||
uint32_t reserve2[11]; /* Reserved for future use */
|
||||
};
|
||||
|
||||
#endif /* __BOARDS_ARM_IMXRT_TEENSY_4_SRC_IMXRT_FLEXSPI_NOR_FLASH_H */
|
||||
|
@ -36,6 +36,8 @@
|
||||
|
||||
#ifdef CONFIG_IMXRT_LPI2C
|
||||
|
||||
#define BMP280_LPI2C 3
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
@ -70,7 +72,7 @@ static void imxrt_i2c_register(int bus)
|
||||
}
|
||||
|
||||
#ifdef SENSORS_BMP280
|
||||
if (CONFIG_BMP280_LPI2C == bus)
|
||||
if (BMP280_LPI2C == bus)
|
||||
{
|
||||
/* Register the BMP280 driver */
|
||||
|
||||
|
@ -18,16 +18,16 @@
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/* There are two LED status indicators located on the EVK Board. The
|
||||
/* There are two LED status indicators located on Teensy-4.x Board. The
|
||||
* functions of these LEDs include:
|
||||
*
|
||||
* - RED LED (loading status)
|
||||
* - dim: ready
|
||||
* - bright: writing
|
||||
* - blink: no USB
|
||||
* - USER LED (D8)
|
||||
* - USER LED (D3)
|
||||
*
|
||||
* Only a single LED, D8, is under software control.
|
||||
* Only a single LED, D3, is under software control.
|
||||
*/
|
||||
|
||||
/****************************************************************************
|
||||
|
@ -51,9 +51,9 @@
|
||||
* - dim: ready
|
||||
* - bright: writing
|
||||
* - blink: no USB
|
||||
* - USER LED(D8)
|
||||
* - USER LED (D3)
|
||||
*
|
||||
* Only a single LED, D8, is under software control.
|
||||
* Only a single LED, D3, is under software control.
|
||||
*/
|
||||
|
||||
# define GPIO_LED (GPIO_OUTPUT | IOMUX_LED_DEFAULT | \
|
||||
|
Loading…
x
Reference in New Issue
Block a user