Squashed commit of the following:
drivers/serial/uart_16550.c: Support 16550 auto hardware flow control
drivers/serial/uart_16550.c: Add configuration option CONFIG_16550_SUPRESS_INITIAL_CONFIG. This is identical to the standard configuration in arch/Kconfig CONFIG_SUPPRESS_UART_CONFIG, but with scope of only the 16550 driver.
This commit is contained in:
Xiang Xiao
Gregory Nutt
parent
fa08e69cca
commit
ead2c40cd4
@ -312,6 +312,11 @@ endchoice # 16550 Serial Console
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config 16550_SUPRESS_CONFIG
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bool "Suppress 16550 configuration"
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default n
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config 16550_SUPRESS_INITIAL_CONFIG
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bool "Suppress initial 16550 configuration"
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depends on !16550_SUPRESS_CONFIG
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default n
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---help---
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This option is useful, for example, if you are using a bootloader
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that configures the 16550_UART. In that case, you may want to
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@ -80,6 +80,9 @@ struct u16550_s
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (7 or 8) */
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bool stopbits2; /* true: Configure with 2 stop bits instead of 1 */
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#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
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bool flow; /* flow control (RTS/CTS) enabled */
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#endif
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#endif
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};
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@ -96,6 +99,10 @@ static int u16550_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
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static int u16550_receive(FAR struct uart_dev_s *dev, uint32_t *status);
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static void u16550_rxint(FAR struct uart_dev_s *dev, bool enable);
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static bool u16550_rxavailable(FAR struct uart_dev_s *dev);
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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static bool u16550_rxflowcontrol(struct uart_dev_s *dev, unsigned int nbuffered,
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bool upper);
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#endif
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#ifdef CONFIG_SERIAL_DMA
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static void u16550_dmasend(FAR struct uart_dev_s *dev);
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static void u16550_dmareceive(FAR struct uart_dev_s *dev);
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@ -122,7 +129,7 @@ static const struct uart_ops_s g_uart_ops =
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.rxint = u16550_rxint,
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.rxavailable = u16550_rxavailable,
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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.rxflowcontrol = NULL,
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.rxflowcontrol = u16550_rxflowcontrol,
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#endif
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#ifdef CONFIG_SERIAL_DMA
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.dmasend = u16550_dmasend,
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@ -170,6 +177,9 @@ static struct u16550_s g_uart0priv =
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.parity = CONFIG_16550_UART0_PARITY,
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.bits = CONFIG_16550_UART0_BITS,
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.stopbits2 = CONFIG_16550_UART0_2STOP,
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#if defined(CONFIG_16550_UART0_IFLOWCONTROL) || defined(CONFIG_16550_UART0_OFLOWCONTROL)
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.flow = true,
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#endif
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#endif
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};
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@ -205,6 +215,9 @@ static struct u16550_s g_uart1priv =
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.parity = CONFIG_16550_UART1_PARITY,
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.bits = CONFIG_16550_UART1_BITS,
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.stopbits2 = CONFIG_16550_UART1_2STOP,
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#if defined(CONFIG_16550_UART1_IFLOWCONTROL) || defined(CONFIG_16551_UART1_OFLOWCONTROL)
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.flow = true,
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#endif
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#endif
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};
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@ -240,6 +253,9 @@ static struct u16550_s g_uart2priv =
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.parity = CONFIG_16550_UART2_PARITY,
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.bits = CONFIG_16550_UART2_BITS,
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.stopbits2 = CONFIG_16550_UART2_2STOP,
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#if defined(CONFIG_16550_UART2_IFLOWCONTROL) || defined(CONFIG_16550_UART2_OFLOWCONTROL)
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.flow = true,
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#endif
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#endif
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};
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@ -275,6 +291,9 @@ static struct u16550_s g_uart3priv =
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.parity = CONFIG_16550_UART3_PARITY,
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.bits = CONFIG_16550_UART3_BITS,
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.stopbits2 = CONFIG_16550_UART3_2STOP,
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#if defined(CONFIG_16550_UART3_IFLOWCONTROL) || defined(CONFIG_16550_UART3_OFLOWCONTROL)
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.flow = true,
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#endif
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#endif
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};
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@ -606,6 +625,9 @@ static int u16550_setup(FAR struct uart_dev_s *dev)
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FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
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uint16_t div;
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uint32_t lcr;
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#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
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uint32_t mcr;
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#endif
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/* Clear fifos */
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@ -677,6 +699,23 @@ static int u16550_setup(FAR struct uart_dev_s *dev)
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u16550_serialout(priv, UART_FCR_OFFSET,
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(UART_FCR_RXTRIGGER_8 | UART_FCR_TXRST | UART_FCR_RXRST |
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UART_FCR_FIFOEN));
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/* Set up the auto flow control */
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#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
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mcr = u16550_serialin(priv, UART_MCR_OFFSET);
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if (priv->flow)
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{
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mcr |= UART_MCR_AFCE;
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}
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else
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{
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mcr &= ~UART_MCR_AFCE;
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}
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u16550_serialout(priv, UART_MCR_OFFSET, mcr);
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#endif /* defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL) */
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#endif
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return OK;
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}
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@ -934,6 +973,9 @@ static int u16550_ioctl(struct file *filep, int cmd, unsigned long arg)
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termiosp->c_cflag = ((priv->parity != 0) ? PARENB : 0) |
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((priv->parity == 1) ? PARODD : 0);
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termiosp->c_cflag |= (priv->stopbits2) ? CSTOPB : 0;
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#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
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termiosp->c_cflag |= priv->flow ? CRTSCTS : 0;
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#endif
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switch (priv->bits)
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{
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@ -1003,6 +1045,9 @@ static int u16550_ioctl(struct file *filep, int cmd, unsigned long arg)
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priv->baud = cfgetispeed(termiosp);
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priv->stopbits2 = (termiosp->c_cflag & CSTOPB) != 0;
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#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
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priv->flow = (termiosp->c_cflag & CRTSCTS) != 0;
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#endif
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u16550_setup(dev);
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leave_critical_section(flags);
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@ -1084,6 +1129,31 @@ static bool u16550_rxavailable(struct uart_dev_s *dev)
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*
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****************************************************************************/
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#ifdef CONFIG_SERIAL_IFLOWCONTROL
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static bool u16550_rxflowcontrol(struct uart_dev_s *dev, unsigned int nbuffered,
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bool upper)
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{
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#ifndef CONFIG_16550_SUPRESS_CONFIG
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FAR struct u16550_s *priv = (FAR struct u16550_s *)dev->priv;
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if (priv->flow)
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{
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/* Disable Rx interrupt to prevent more data being from
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* peripheral if the RX buffer is near full. When hardware
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* RTS is enabled, this will prevent more data from coming
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* in. Otherwise, enable Rx interrupt to make sure that more
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* input is received.
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*/
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u16550_rxint(dev, !upper);
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return true;
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}
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#endif
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return false;
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}
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#endif
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#ifdef CONFIG_SERIAL_DMA
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static void u16550_dmasend(FAR struct uart_dev_s *dev)
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{
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@ -1232,8 +1302,10 @@ void up_earlyserialinit(void)
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#ifdef CONSOLE_DEV
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CONSOLE_DEV.isconsole = true;
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#ifndef CONFIG_16550_SUPRESS_INITIAL_CONFIG
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u16550_setup(&CONSOLE_DEV);
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#endif
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#endif
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}
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/****************************************************************************
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@ -290,7 +290,8 @@
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#define UART_MCR_OUT1 (1 << 2) /* Bit 2: Auxiliary user-defined output 1 */
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#define UART_MCR_OUT2 (1 << 3) /* Bit 3: Auxiliary user-defined output 2 */
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#define UART_MCR_LPBK (1 << 4) /* Bit 4: Loopback Mode Select */
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/* Bit 5-7: Reserved */
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#define UART_MCR_AFCE (1 << 5) /* Bit 5: Auto Flow Control Enable */
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/* Bit 6-7: Reserved */
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/* LSR Line Status Register */
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