SAMV7 USBHS device: Beef up test for data sent in DMA complete interrupt handler
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@ -2490,6 +2490,7 @@ static void sam_dma_interrupt(struct sam_usbdev_s *priv, int epno)
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if (privep->epstate == USBHS_EPSTATE_SENDING)
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{
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uint32_t nbusybk;
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uint32_t byct;
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/* This is an IN endpoint. Continuing processing the write
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@ -2501,11 +2502,21 @@ static void sam_dma_interrupt(struct sam_usbdev_s *priv, int epno)
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/* Have all of the bytes in the FIFO been transmitted to the
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* host?
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*
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* BYCT == 0 Means that all of the data has been transferred
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* out of the FIFO.
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* Warning: This field may be updated one clock cycle
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* after the RWALL bit changes, so the user should not
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* poll this field as an interrupt bit.
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* NBUSYBK == 0 Indicates that all banks that have been sent to
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* the host.
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*/
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byct = (sam_getreg(SAM_USBHS_DEVEPTISR(epno)) & USBHS_DEVEPTISR_BYCT_MASK)
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>> USBHS_DEVEPTISR_BYCT_SHIFT;
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if (byct > 0)
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regval = sam_getreg(SAM_USBHS_DEVEPTISR(epno));
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byct = (regval & USBHS_DEVEPTISR_BYCT_MASK) >> USBHS_DEVEPTISR_BYCT_SHIFT;
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nbusybk = (regval & USBHS_DEVEPTISR_NBUSYBK_MASK) >> USBHS_DEVEPTISR_NBUSYBK_SHIFT;
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if (byct > 0 || nbusybk > 0)
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{
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/* Not all of the data has been sent to the host. A TXIN
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* interrupt will be generated later. Enable the TXIN
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