arch/mips/src/pic32mX/pic32mX-irq.c: Use the defined CS0 irq number.
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@ -111,6 +111,10 @@ void up_irqinitialize(void)
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up_prioritize_irq(irq, (INT_IPC_MID_PRIORITY << 2));
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up_prioritize_irq(irq, (INT_IPC_MID_PRIORITY << 2));
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}
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}
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/* Set the Software Interrupt0 to a special priority */
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up_prioritize_irq(PIC32MX_IRQSRC_CS0, (CHIP_MAX_PRIORITY - 1) << 2);
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/* Set the BEV bit in the STATUS register */
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/* Set the BEV bit in the STATUS register */
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regval = cp0_getstatus();
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regval = cp0_getstatus();
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@ -202,7 +202,7 @@ void up_irqinitialize(void)
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/* Set the Software Interrupt0 to a special priority */
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/* Set the Software Interrupt0 to a special priority */
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pic32mz_prioritize_irq(1, 7 << 2);
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pic32mz_prioritize_irq(PIC32MZ_IRQ_CS0, (CHIP_MAX_PRIORITY - 1) << 2);
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/* Set the BEV bit in the STATUS register */
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/* Set the BEV bit in the STATUS register */
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