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boards/riscv/esp32c3: Rename the iram_0_2 segment to irom_0_0 to avoid

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confusions.

Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
This commit is contained in:
Abdelatif Guettouche 2021-06-24 12:12:44 +01:00 committed by Xiang Xiao
parent 9cc41f44f0
commit eb403bc996
1 changed files with 2 additions and 2 deletions
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4
boards/risc-v/esp32c3/esp32c3-devkit/scripts/esp32c3.template.ld
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@ -66,7 +66,7 @@ MEMORY
* constraint that (paddr % 64KB == vaddr % 64KB).
*/
iram0_2_seg (RX) : org = 0x42000020, len = 0x8000000 - 0x20
irom0_0_seg (RX) : org = 0x42000020, len = 0x8000000 - 0x20
/* Shared data RAM, excluding memory reserved for ROM bss/data/stack. */
@ -86,7 +86,7 @@ MEMORY
REGION_ALIAS("default_code_seg", iram0_0_seg);
#else
REGION_ALIAS("default_rodata_seg", drom0_0_seg);
REGION_ALIAS("default_code_seg", iram0_2_seg);
REGION_ALIAS("default_code_seg", irom0_0_seg);
#endif /* CONFIG_ESP32C3_DEVKIT_RUN_IRAM */
/* Mark the end of the RTC heap (top of the RTC region) */