PCF85263 RTC register definition header file. Incomplete on initial commit
This commit is contained in:
Gregory Nutt
parent
db2fe45666
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drivers/timers/pcf85263.h
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drivers/timers/pcf85263.h
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/****************************************************************************
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* drivers/timers/pcf85263.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __DRIVERS_TIMERS_PCF85263_H
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#define __DRIVERS_TIMERS_PCF85263_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/compiler.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* RTC time and date registers */
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#define PCF85263_RTC_100TH_SECONDS 0x00 /* RTC 100ths of seconds register */
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/* Bits 0-7: 100ths of seconds register (0-99 BCD) */
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#define PCF85263_RTC_SECONDS 0x01 /* RTC seconds register */
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# define PCF85263_RTC_SECONDS_MASK (0x7f) /* Bits 0-6: Seconds (0-59 BCD) */
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# define PCF85263_RTC_SECONDS_OS (1 << 7) /* Bit 7: Oscillator stop */
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#define PCF85263_RTC_MINUTES 0x02 /* RTC minutes register */
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# define PCF85263_RTC_MINUTES_MASK (0x7f) /* Bits 0-6: Minutes (0-59 BCD) */
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# define PCF85263_RTC_MINUTES_EMON (1 << 7) /* Bit 7: Event monitor */
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#define PCF85263_RTC_HOURS 0x03 /* RTC hours register */
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# define PCF85263_RTC_HOURS12_MASK 0x1f /* Bits 0-4: Hours (1-12 BCD) */
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# define PCF85263_RTC_AMPM (1 << 5) /* Bit 5: AM/PM */
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# define PCF85263_RTC_HOURS24_MASK 0x3f /* Bits 0-5: Hours (0-23 BCD) */
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#define PCF85263_RTC_DAYS 0x04 /* RTC days register */
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# define PCF85263_RTC_DAYS_MASK 0x3f /* Bit 0-5: Day of the month (1-31 BCD) */
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#define PCF85263_RTC_WEEKDAYS 0x05 /* RTC day-of-week register */
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# define PCF85263_RTC_WEEKDAYS_MASK 0x07 /* Bits 0-2: Day of the week (0-6) */
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#define PCF85263_RTC_MONTHS 0x06 /* RTC month register */
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# define PCF85263_RTC_MONTHS_MASK 0x1f /* Bits 0-4: Month (1-12 BCD) */
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#define PCF85263_RTC_YEARS 0x07 /* RTC year register */
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/* Bits 0-7: Year (0-99 BCD) */
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/* RTC alarm1 */
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#define PCF85263_RTC_SECOND_ALARM1 0x08 /* RTC alarm1 seconds register */
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# define PCF85263_RTC_SECOND_ALARM1_MASK 0x7f /* Bits 0-6: Seconds (0-59 BCD) */
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#define PCF85263_RTC_MINUTE_ALARM1 0x09 /* RTC alarm1 minutes register */
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# define PCF85263_RTC_MINUTE_ALARM1_MASK 0x7f /* Bits 0-6: Minutes (0-59 BCD) */
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#define PCF85263_RTC_HOUR_ALARM1 0x0a /* RTC alarm1 hours register */
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# define PCF85263_RTC_HOURS12_ALARM1_MASK 0x1f /* Bits 0-4: Hours (1-12 BCD) */
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# define PCF85263_RTC_AMPM_ALARM1 (1 << 5) /* Bit 5: AM/PM */
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# define PCF85263_RTC_HOURS24_ALARM1_MASK 0x3f /* Bits 0-5: Hours (0-23 BCD) */
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#define PCF85263_RTC_DAY_ALARM1 0x0b /* RTC alarm1 days register */
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# define PCF85263_RTC_DAY_ALARM1_MASK 0x3f /* Bits 0-5: Days (1-31 BCD) */
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#define PCF85263_RTC_MONTH_ALARM1 0x0c /* RTC alarm1 month register */
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# define PCF85263_RTC_MONTH_ALARM1_MASK 0x1f /* Bits 0-4: Month (1-12 BCD) */
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/* RTC alarm2 */
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#define PCF85263_RTC_MINUTE_ALARM2 0x0d /* RTC alarm2 seconds register */
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# define PCF85263_RTC_MINUTE_ALARM2_MASK 0x7f /* Bits 0-6: Minutes (0-59 BCD) */
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#define PCF85263_RTC_HOUR_ALARM2 0x0e /* RTC alarm1 minutes register */
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# define PCF85263_RTC_HOURS12_ALARM2_MASK 0x1f /* Bits 0-4: Hours (1-12 BCD) */
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# define PCF85263_RTC_AMPM_ALARM2 (1 << 5) /* Bit 5: AM/PM */
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# define PCF85263_RTC_HOURS24_ALARM2_MASK 0x3f /* Bits 0-5: Hours (0-23 BCD) */
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#define PCF85263_RTC_WEEKDAY_ALARM 0x0f /* RTC alarm1 day-of-week register */
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# define PCF85263_RTC_WEEKDAY_ALARM_MASK 0x07 /* Bits 0-2: Day-of-week (0-6) */
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/* RTC alarm enables */
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#define PCF85263_RTC_ALARM_ENABLES 0x10 /* RTC alarem enables */
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# define PCF85263_RTC_ALARM_SEC_A1E (1 << 0) /* Second alarm1 enable */
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# define PCF85263_RTC_ALARM_MIN_A1E (1 << 1) /* Minute alarm1 enable */
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# define PCF85263_RTC_ALARM_HR_A1E (1 << 2) /* Hour alarm1 enable */
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# define PCF85263_RTC_ALARM_DAY_A1E (1 << 3) /* Day alarm1 enable */
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# define PCF85263_RTC_ALARM_MON_A1E (1 << 4) /* Month alarm1 enable */
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# define PCF85263_RTC_ALARM_MIN_A2E (1 << 5) /* Minute alarm2 enable */
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# define PCF85263_RTC_ALARM_HR_A2E (1 << 6) /* Hour alarm2 enable */
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# define PCF85263_RTC_ALARM_WDAY_A2E (1 << 7) /* Day-of-week alarm2 enable */
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/* RTC timestamp1 (TSR1) */
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#define PCF85263_RTC_TSR1_SECONDS 0x11 /* TSR1 seconds register */
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# define PCF85263_RTC_TSR1_SECONDS_MASK (0x7f) /* Bits 0-6: Seconds (0-59 BCD) */
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# define PCF85263_RTC_SECONDS_OS (1 << 7) /* Bit 7: Oscillator stop */
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#define PCF85263_RTC_TSR1_MINUTES 0x12 /* TSR1 minutes register */
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# define PCF85263_RTC_TSR1_MINUTES_MASK (0x7f) /* Bits 0-6: Minutes (0-59 BCD) */
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#define PCF85263_RTC_TSR1_HOURS 0x13 /* TSR1 hours register */
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# define PCF85263_RTC_TSR1_HOURS12_MASK 0x1f /* Bits 0-4: Hours (1-12 BCD) */
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# define PCF85263_RTC_TSR1_AMPM (1 << 5) /* Bit 5: AM/PM */
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# define PCF85263_RTC_TSR1_HOURS24_MASK 0x3f /* Bits 0-5: Hours (0-23 BCD) */
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#define PCF85263_RTC_TSR1_DAYS 0x14 /* TSR1 days register */
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# define PCF85263_RTC_TSR1_DAYS_MASK 0x3f /* Bits 0-5: Day of the month (1-31 BCD) */
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#define PCF85263_RTC_TSR1_MONTHS 0x15 /* TSR1 month register */
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# define PCF85263_RTC_TSR1_MONTHS_MASK 0x1f /* Bits 0-4: Month (1-12 BCD) */
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#define PCF85263_RTC_TSR1_YEARS 0x16 /* TSR1 year register */
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/* Bits 0-7: Year (0-99 BCD) */
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/* RTC timestamp2 (TSR2) */
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#define PCF85263_RTC_TSR2_SECONDS 0x17 /* TSR2 seconds register */
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# define PCF85263_RTC_TSR2_SECONDS_MASK (0x7f) /* Bits 0-6: Seconds (0-59 BCD) */
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#define PCF85263_RTC_TSR2_MINUTES 0x18 /* TSR2 minutes register */
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# define PCF85263_RTC_TSR2_MINUTES_MASK (0x7f) /* Bits 0-6: Minutes (0-59 BCD) */
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#define PCF85263_RTC_TSR2_HOURS 0x19 /* TSR2 hours register */
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# define PCF85263_RTC_TSR2_HOURS12_MASK 0x1f /* Bits 0-4: Hours (1-12 BCD) */
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# define PCF85263_RTC_TSR2_AMPM (1 << 5) /* Bit 5: AM/PM */
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# define PCF85263_RTC_TSR2_HOURS24_MASK 0x3f /* Bits 0-5: Hours (0-23 BCD) */
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#define PCF85263_RTC_TSR2_DAYS 0x1a /* TSR2 days register */
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# define PCF85263_RTC_TSR2_DAYS_MASK 0x3f /* Bits 0-5: Day of the month (1-31 BCD) */
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#define PCF85263_RTC_TSR2_MONTHS 0x1b /* TSR2 month register */
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# define PCF85263_RTC_TSR2_MONTHS_MASK 0x1f /* Bits 0-4: Month (1-12 BCD) */
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#define PCF85263_RTC_TSR2_YEARS 0x1c /* TSR2 year register */
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/* Bits 0-7: Year (0-99 BCD) */
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/* RTC timestamp3 (TSR3) */
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#define PCF85263_RTC_TSR3_SECONDS 0x1d /* TSR3 seconds register */
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# define PCF85263_RTC_TSR3_SECONDS_MASK (0x7f) /* Bits 0-6: Seconds (0-59 BCD) */
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#define PCF85263_RTC_TSR3_MINUTES 0x1e /* TSR3 minutes register */
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# define PCF85263_RTC_TSR3_MINUTES_MASK (0x7f) /* Bits 0-6: Minutes (0-59 BCD) */
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#define PCF85263_RTC_TSR3_HOURS 0x1f /* TSR3 hours register */
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# define PCF85263_RTC_TSR3_HOURS12_MASK 0x1f /* Bits 0-4: Hours (1-12 BCD) */
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# define PCF85263_RTC_TSR3_AMPM (1 << 5) /* Bit 5: AM/PM */
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# define PCF85263_RTC_TSR3_HOURS24_MASK 0x3f /* Bits 0-5: Hours (0-23 BCD) */
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#define PCF85263_RTC_TSR3_DAYS 0x20 /* TSR3 days register */
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# define PCF85263_RTC_TSR3_DAYS_MASK 0x3f /* Bits 0-5: Day of the month (1-31 BCD) */
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#define PCF85263_RTC_TSR3_MONTHS 0x21 /* TSR3 month register */
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# define PCF85263_RTC_TSR3_MONTHS_MASK 0x1f /* Bits 0-4: Month (1-12 BCD) */
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#define PCF85263_RTC_TSR3_YEARS 0x22 /* TSR3 year register */
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/* Bits 0-7: Year (0-99 BCD) */
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/* RTC timestamp mode control */
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#define PCF85263_RTC_TSR_MODE 0x23 /* Timestamp mode control register */
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# define PCF85263_RTC_TSR_TSR1M_SHIFT (0) /* Bit 0-1: Timestamp register 1 mode */
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# define PCF85263_RTC_TSR_TSR1M_MASK (3 << PCF85263_RTC_TSR_TSR1M_SHIFT)
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# define PCF85263_RTC_TSR_TSR1M_NONE (0 << PCF85263_RTC_TSR_TSR1M_SHIFT) /* No timestamp */
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# define PCF85263_RTC_TSR_TSR1M_FE (1 << PCF85263_RTC_TSR_TSR1M_SHIFT) /* Record First TS pin Event */
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# define PCF85263_RTC_TSR_TSR1M_LE (2 << PCF85263_RTC_TSR_TSR1M_SHIFT) /* Record Last TS pin Event */
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# define PCF85263_RTC_TSR_TSR2M_SHIFT (2) /* Bit 2-4: Timestamp register 2 mode */
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# define PCF85263_RTC_TSR_TSR2M_MASK (7 << PCF85263_RTC_TSR_TSR2M_SHIFT)
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# define PCF85263_RTC_TSR_TSR2M_NONE (0 << PCF85263_RTC_TSR_TSR2M_SHIFT) /* No timestamp */
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# define PCF85263_RTC_TSR_TSR2M_FB (1 << PCF85263_RTC_TSR_TSR2M_SHIFT) /* Record First time switch to Battery event */
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# define PCF85263_RTC_TSR_TSR2M_LB (2 << PCF85263_RTC_TSR_TSR2M_SHIFT) /* Record Last time switch to Battery event */
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# define PCF85263_RTC_TSR_TSR2M_LV (3 << PCF85263_RTC_TSR_TSR2M_SHIFT) /* Record Last time switch to VDD event */
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# define PCF85263_RTC_TSR_TSR2M_FE (4 << PCF85263_RTC_TSR_TSR2M_SHIFT) /* Record First TS pin Event */
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# define PCF85263_RTC_TSR_TSR2M_LE (5 << PCF85263_RTC_TSR_TSR2M_SHIFT) /* Record Last TS pin Event */
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# define PCF85263_RTC_TSR_TSR3M_SHIFT (6) /* Bit 6-7: Timestamp register 3 mode */
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# define PCF85263_RTC_TSR_TSR3M_MASK (3 << PCF85263_RTC_TSR_TSR3M_SHIFT)
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# define PCF85263_RTC_TSR_TSR3M_NONE (0 << PCF85263_RTC_TSR_TSR3M_SHIFT) /* No timestamp */
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# define PCF85263_RTC_TSR_TSR3M_FB (1 << PCF85263_RTC_TSR_TSR3M_SHIFT) /* Record First time switch to Battery event */
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# define PCF85263_RTC_TSR_TSR3M_LB (2 << PCF85263_RTC_TSR_TSR3M_SHIFT) /* Record Last time switch to Battery event */
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# define PCF85263_RTC_TSR_TSR3M_LV (3 << PCF85263_RTC_TSR_TSR3M_SHIFT) /* Record Last time switch to VDD event */
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/* Stop-watch time registers */
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#define PCF85263_STW_100TH_SECONDS 0x00 /* Stopwatch 100ths of seconds register */
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/* Bits 0-7: 100ths of seconds register (0-99 BCD) */
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#define PCF85263_STW_SECONDS 0x01 /* Stopwatch seconds register */
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# define PCF85263_STW_SECONDS_MASK (0x7f) /* Bits 0-6: Seconds (0-59 BCD) */
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# define PCF85263_STW_SECONDS_OS (1 << 7) /* Bit 7: Oscillator stop */
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#define PCF85263_STW_MINUTES 0x02 /* Stopwatch minutes register */
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# define PCF85263_STW_MINUTES_MASK (0x7f) /* Bits 0-6: Minutes (0-59 BCD) */
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#define PCF85263_STW_HOURS_XX_XX_00 0x03 /* Stopwatch hours register xx_xx_00 */
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/* Bits 0-7: hours (0-99 BCD) */
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#define PCF85263_STW_HOURS_XX_00_XX 0x04 /* Stopwatch hours register xx_00_xx */
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/* Bits 0-7: hours (0-99 BCD) */
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#define PCF85263_STW_HOURS_00_XX_XX 0x05 /* Stopwatch hours register 00_xx_xx */
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/* Bits 0-7: hours (0-99 BCD) */
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/* Stop-watch alarm1 */
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#define PCF85263_STW_SECOND_ALM1 0x08 /* Stopwatch alarm1 seconds register */
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# define PCF85263_STW_SECOND_ALM1_MASK (0x7f) /* Bits 0-6: Seconds (0-59 BCD) */
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#define PCF85263_STW_MINUTE_ALM1 0x09 /* Stopwatch alarm1 minutes register */
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# define PCF85263_STW_MINUTE_ALM1_MASK (0x7f) /* Bits 0-6: Minutes (0-59 BCD) */
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#define PCF85263_STW_HR_XX_XX_00_ALM1 0x0a /* Stopwatch alarm1 hours register xx_xx_00 */
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/* Bits 0-7: hours (0-99 BCD) */
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#define PCF85263_STW_HR_XX_00_XX_ALM1 0x0b /* Stopwatch alarm1 hours register xx_00_xx */
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/* Bits 0-7: hours (0-99 BCD) */
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#define PCF85263_STW_HR_00_XX_XX_ALM1 0x0c /* Stopwatch alarm1 hours register 00_xx_xx */
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/* Bits 0-7: hours (0-99 BCD) */
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/* Stop-watch alarm2 */
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#define PCF85263_STW_MINUTE_ALM2 0x0d /* Stopwatch alarm2 minutes register */
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# define PCF85263_STW_MINUTE_ALM2_MASK (0x7f) /* Bits 0-6: Minutes (0-59 BCD) */
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#define PCF85263_STW_HR_XX_00_ALM2 0x0e /* Stopwatch alarm2 hours register xx_00_xx */
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/* Bits 0-7: hours (0-99 BCD) */
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#define PCF85263_STW_HR_00_XX_ALM2 0x0f /* Stopwatch alarm2 hours register 00_xx_xx */
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/* Bits 0-7: hours (0-99 BCD) */
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/* Stop-watch alarm enables */
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#define PCF85263_STW_ALARM_ENABLES 0x10 /*
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HR_00_XX
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_A2E
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HR_XX_00
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_A2E
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MIN_A2E HR_00_XX
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_XX_A1E
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HR_XX_00
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_XX_A1E
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HR_XX_XX
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_00_A1E
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MIN_A1E SEC_A1E
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/* Stop-watch timestamp1 (TSR1) */
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#define PCF85263_STW_TSR1_SECONDS 0x11 /* TSR1 seconds register */
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# define PCF85263_STW_TSR1_SECONDS_MASK (0x7f) /* Bits 0-6: Seconds (0-59 BCD) */
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#define PCF85263_STW_TSR1_MINUTES 0x12 /* TSR1 minutes register */
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# define PCF85263_STW_TSR1_MINUTES_MASK (0x7f) /* Bits 0-6: Minutes (0-59 BCD) */
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#define PCF85263_STW_TSR1_HR_XX_XX_00 0x13 /* Stopwatch TSR1 hours register xx_xx_00 */
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/* Bits 0-7: hours (0-99 BCD) */
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#define PCF85263_STW_TSR1_HR_XX_00_XX 0x14 /* Stopwatch TSR1 hours register xx_00_xx */
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/* Bits 0-7: hours (0-99 BCD) */
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#define PCF85263_STW_TSR1_HR_00_XX_XX 0x15 /* Stopwatch TSR1 hours register 00_xx_xx */
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/* Bits 0-7: hours (0-99 BCD) */
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/* Stop-watch timestamp2 (TSR2) */
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#define PCF85263_STW_TSR2_SECONDS 0x17 /* TSR2 seconds register */
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# define PCF85263_STW_TSR2_SECONDS_MASK (0x7f) /* Bits 0-6: Seconds (0-59 BCD) */
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#define PCF85263_STW_TSR2_MINUTES 0x18 /* TSR2 minutes register */
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# define PCF85263_RTC_TSR2_MINUTES_MASK (0x7f) /* Bits 0-6: Minutes (0-59 BCD) */
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#define PCF85263_STW_TSR2_HR_XX_XX_00 0x19 /* Stopwatch TSR2 hours register xx_xx_00 */
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/* Bits 0-7: hours (0-99 BCD) */
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#define PCF85263_STW_TSR2_HR_XX_00_XX 0x1a /* Stopwatch TSR2 hours register xx_00_xx */
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/* Bits 0-7: hours (0-99 BCD) */
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#define PCF85263_STW_TSR2_HR_00_XX_XX 0x1b /* Stopwatch TSR2 hours register 00_xx_xx */
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/* Bits 0-7: hours (0-99 BCD) */
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/* Stop-watch timestamp3 (TSR3) */
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#define PCF85263_STW_TSR3_SECONDS 0x1d /* TSR3 seconds register */
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# define PCF85263_STW_TSR3_SECONDS_MASK (0x7f) /* Bits 0-6: Seconds (0-59 BCD) */
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#define PCF85263_STW_TSR3_MINUTES 0x1e /* TSR3 minutes register */
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# define PCF85263_RTC_TSR3_MINUTES_MASK (0x7f) /* Bits 0-6: Minutes (0-59 BCD) */
|
||||
#define PCF85263_STW_TSR3_HR_XX_XX_00 0x1f /* Stopwatch TSR3 hours register xx_xx_00 */
|
||||
/* Bits 0-7: hours (0-99 BCD) */
|
||||
#define PCF85263_STW_TSR3_HR_XX_00_XX 0x20 /* Stopwatch TSR3 hours register xx_00_xx */
|
||||
/* Bits 0-7: hours (0-99 BCD) */
|
||||
#define PCF85263_STW_TSR3_HR_00_XX_XX 0x21 /* Stopwatch TSR3 hours register 00_xx_xx */
|
||||
/* Bits 0-7: hours (0-99 BCD) */
|
||||
|
||||
/* Stop-watch timestamp mode control */
|
||||
|
||||
#define PCF85263_STW_TSR_MODE 0x23 /*
|
||||
TSR3M[1:0] - TSR2M[2:0] TSR1M[1:0]
|
||||
|
||||
/* Offset register */
|
||||
|
||||
#define PCF85263_STW_OFFSET 0x24 /*
|
||||
OFFSET[7:0]
|
||||
|
||||
/* Control registers */
|
||||
|
||||
#define PCF85263_STW_OSCILLATOR 0x25 /*
|
||||
CLKIV OFFM 12_24 LOWJ OSCD[1:0] CL[1:0]
|
||||
#define PCF85263_STW_BATTERY_SWITCH 0x26 /*
|
||||
BSOFF BSRR BSM[1:0] BSTH
|
||||
#define PCF85263_STW_PIN_IO 0x27 /*
|
||||
CLKPM TSPULL TSL TSIM TSPM[1:0] INTAPM[1:0]
|
||||
#define PCF85263_STW_FUNCTION 0x28 /*
|
||||
100TH PI[1:0] RTCM STOPM COF[2:0]
|
||||
#define PCF85263_STW_INTA_ENABLE 0x29 /*
|
||||
ILPA PIEA OIEA A1IEA A2IEA TSRIEA BSIEA WDIEA
|
||||
#define PCF85263_STW_INTB_ENABLE 0x2a /*
|
||||
ILPB PIEB OIEB A1IEB A2IEB TSRIEB BSIEB WDIEB
|
||||
#define PCF85263_STW_FLAGS 0x2b /*
|
||||
PIF A2F A1F WDF BSF TSR3F TSR2F TSR1F
|
||||
|
||||
/* RAM byte */
|
||||
|
||||
#define PCF85263_STW_RAM_BYTE 0x2c /*
|
||||
/* Bits 0-7: RAM data */
|
||||
|
||||
/* WatchDog registers */
|
||||
|
||||
#define PCF85263_STW_WATCHDOG 0x2d /*
|
||||
WDM WDR[4:0] WDS[1:0]
|
||||
|
||||
/* Stop */
|
||||
|
||||
#define PCF85263_STW_STOP_ENABLE 0x2e /*
|
||||
STOP
|
||||
|
||||
/* Reset */
|
||||
|
||||
#define PCF85263_STW_RESETS 0x2f /*
|
||||
CPR 0 1 0 SR 1 0 CTS
|
||||
|
||||
#endif /* __DRIVERS_TIMERS_PCF85263_H */
|
||||
Loading…
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Reference in New Issue
Block a user