Minor updates from review of last PR.
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@ -110,7 +110,6 @@
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/* File Header */
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struct bbsramfh_s
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{
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uint32_t crc; /* CRC calculated over data and this struct
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@ -118,14 +117,13 @@ struct bbsramfh_s
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union
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{
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uint32_t unit32; /* uint32 access to force ECC from preventing
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commit */
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* commit */
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struct
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{
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uint8_t fileno; /* The minor number */
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uint8_t dirty; /* Data has been written to the file */
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uint16_t len; /* Total Bytes in this file */
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};
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};
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struct timespec lastwrite; /* Last write time */
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@ -239,7 +237,7 @@ static void stm32_bbsram_semgive(FAR struct stm32_bbsram_s *priv)
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* Returned Value:
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* None
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*
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****************************************************************************/
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****************************************************************************/
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static void stm32_bbsram_semtake(FAR struct stm32_bbsram_s *priv)
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{
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@ -470,6 +468,7 @@ static off_t stm32_bbsram_seek(FAR struct file *filep, off_t offset,
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break;
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default:
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/* Return EINVAL if the whence argument is invalid */
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stm32_bbsram_semgive(bbr);
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@ -739,7 +738,6 @@ static int stm32_bbsram_probe(int *ent, struct stm32_bbsram_s pdev[])
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pf->fileno != i ||
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pf->crc != stm32_bbsram_crc(pf))
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{
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/* Not Valid so wipe the file in BBSRAM */
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memset((uint8_t *)pf, 0, alloc);
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@ -106,6 +106,7 @@ extern "C"
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Function: stm32_bbsraminitialize
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*
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@ -74,7 +74,8 @@ static inline void stm32_pwr_putreg(uint32_t offset, uint32_t value)
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putreg32(value, STM32_PWR_BASE + offset);
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}
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static inline void stm32_pwr_modifyreg(uint32_t offset, uint32_t clearbits, uint32_t setbits)
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static inline void stm32_pwr_modifyreg(uint32_t offset, uint32_t clearbits,
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uint32_t setbits)
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{
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modifyreg32(STM32_PWR_BASE + offset, clearbits, setbits);
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}
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@ -183,7 +184,7 @@ void stm32_pwr_enablebkp(bool writable)
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stm32_pwr_putreg(STM32_PWR_CR1_OFFSET, regval);
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wait = true;
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}
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}
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leave_critical_section(flags);
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@ -282,7 +283,6 @@ void stm32_pwr_disablepvd(void)
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void stm32_pwr_enablebreg(bool regon)
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{
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irqstate_t flags;
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uint32_t regval;
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uint32_t reg_wait = 0;
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@ -53,6 +53,11 @@
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/* Clocking *****************************************************************/
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/* The S32K118EVB is fitted with a 40MHz Crystal */
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#define BOARD_XTAL_FREQUENCY 40000000
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/* The S32K118 will run at 48MHz *.
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/* LED definitions **********************************************************/
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