sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Merged nuttx/nuttx/master into master

Browse Source
This commit is contained in:
Masayuki Ishikawa 2017-03-31 11:05:20 +09:00
commit eb5523d3a7
469 changed files with 13527 additions and 1430 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
Documentation/NuttxUserGuide.html
View File

@ -7037,7 +7037,7 @@ interface of the same name.
<p>
<pre>
#include &lt;pthread.h&gt;
#ifdef CONFIG_MUTEX_TYPES
#ifdef CONFIG_PTHREAD_MUTEX_TYPES
int pthread_mutexattr_gettype(const pthread_mutexattr_t *attr, int *type);
#endif
</pre>
@ -7072,7 +7072,7 @@ returned to indicate the error:
<p>
<pre>
#include &lt;pthread.h&gt;
#ifdef CONFIG_MUTEX_TYPES
#ifdef CONFIG_PTHREAD_MUTEX_TYPES
int pthread_mutexattr_settype(pthread_mutexattr_t *attr, int type);
#endif
</pre>

3
README.txt
View File

@ -197,6 +197,9 @@ Ubuntu Bash under Windows 10
C:\Users\Username\AppData\Local\lxss\rootfs
However, I am unable to see my files under the rootfs/home directory
so this is not very useful.
Install Linux Software.
-----------------------
Use "sudo apt-get install <package name>". As examples, this is how

30
TODO
View File

@ -1,4 +1,4 @@
NuttX TODO List (Last updated March 14, 2017)
NuttX TODO List (Last updated March 26, 2017)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
This file summarizes known NuttX bugs, limitations, inconsistencies with
@ -14,7 +14,7 @@ nuttx/:
(1) Memory Management (mm/)
(0) Power Management (drivers/pm)
(3) Signals (sched/signal, arch/)
(2) pthreads (sched/pthread)
(4) pthreads (sched/pthread)
(0) Message Queues (sched/mqueue)
(8) Kernel/Protected Build
(3) C++ Support
@ -346,7 +346,7 @@ o Signals (sched/signal, arch/)
Priority: Low. Even if there are only 31 usable signals, that is still a lot.
o pthreads (sched/pthreads)
^^^^^^^^^^^^^^^^^
^^^^^^^^^^^^^^^^^^^^^^^^^
Title: PTHREAD_PRIO_PROTECT
Description: Extend pthread_mutexattr_setprotocol(). It should support
@ -448,6 +448,30 @@ o pthreads (sched/pthreads)
Status: Not really open. This is just the way it is.
Priority: Nothing additional is planned.
Title: PTHREAD FILES IN WRONG LOCATTION
Description: There are many pthread interface functions in files located in
sched/pthread. These should be moved from that location to
libc/pthread. In the flat build, this really does not matter,
but in the protected build that location means that system calls
are required to access the pthread interface functions.
Status: Open
Priority: Medium-low. Priority may be higher if system call overheade becomes
an issue.
Title: ROBUST MUTEX ATTRIBUTE NOT SUPPORTED
Description: In NuttX, all mutexes are 'robust' in the sense that an attmpt
to lock a mutex will return EOWNDERDEAD if the holder of the
mutex has died. Unlocking of a mutex will fail if the caller
is not the holder of the mutex.
POSIX, however, requires that there be a mutex attribute called
robust that determines which behavior is supported. non-robust
should be the default. NuttX does not support this attribute
and robust behavior is the default and only supported behavior.
Status: Open
Priority: Low. The non-robust behavior is dangerous and really should never
be used.
o Message Queues (sched/mqueue)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

2
arch/arm/src/lpc43xx/lpc43_allocateheap.c
View File

@ -186,7 +186,7 @@
#ifndef CONFIG_LPC43_BOOT_SRAM
/* Configuration A */
/* CONFIG_RAM_START shoudl be set to the base of local SRAM, Bank 0. */
/* CONFIG_RAM_START should be set to the base of local SRAM, Bank 0. */
# if CONFIG_RAM_START != LPC43_LOCSRAM_BANK0_BASE
# error "CONFIG_RAM_START must be set to the base address of RAM bank 0"

106
arch/arm/src/stm32/Kconfig
View File

@ -1450,7 +1450,7 @@ config STM32_STM32F33XX
select STM32_HAVE_COMP2
select STM32_HAVE_COMP4
select STM32_HAVE_COMP6
select STM32_HAVE_OPAMP
select STM32_HAVE_OPAMP2
select STM32_HAVE_CCM
select STM32_HAVE_TIM1
select STM32_HAVE_TIM15
@ -1907,18 +1907,34 @@ config STM32_HAVE_CAN2
bool
default n
config STM32_HAVE_COMP1
bool
default n
config STM32_HAVE_COMP2
bool
default n
config STM32_HAVE_COMP3
bool
default n
config STM32_HAVE_COMP4
bool
default n
config STM32_HAVE_COMP5
bool
default n
config STM32_HAVE_COMP6
bool
default n
config STM32_HAVE_COMP7
bool
default n
config STM32_HAVE_DAC1
bool
default n
@ -1971,7 +1987,19 @@ config STM32_HAVE_I2SPLL
bool
default n
config STM32_HAVE_OPAMP
config STM32_HAVE_OPAMP1
bool
default n
config STM32_HAVE_OPAMP2
bool
default n
config STM32_HAVE_OPAMP3
bool
default n
config STM32_HAVE_OPAMP4
bool
default n
@ -2032,21 +2060,41 @@ config STM32_COMP
default n
depends on STM32_STM32L15XX
config STM32_COMP1
bool "COMP1"
default n
depends on STM32_HAVE_COMP1
config STM32_COMP2
bool "COMP2"
default n
depends on STM32_HAVE_COMP2
config STM32_COMP3
bool "COMP3"
default n
depends on STM32_HAVE_COMP3
config STM32_COMP4
bool "COMP4"
default n
depends on STM32_HAVE_COMP4
config STM32_COMP5
bool "COMP5"
default n
depends on STM32_HAVE_COMP5
config STM32_COMP6
bool "COMP6"
default n
depends on STM32_HAVE_COMP6
config STM32_COMP7
bool "COMP7"
default n
depends on STM32_HAVE_COMP6
config STM32_BKP
bool "BKP"
default n
@ -2185,7 +2233,26 @@ config STM32_DMA2D
config STM32_OPAMP
bool "OPAMP"
default n
depends on STM32_HAVE_OPAMP
config STM32_OPAMP1
bool "OPAMP1"
default n
depends on STM32_HAVE_OPAMP1
config STM32_OPAMP2
bool "OPAMP2"
default n
depends on STM32_HAVE_OPAMP2
config STM32_OPAMP3
bool "OPAMP3"
default n
depends on STM32_HAVE_OPAMP3
config STM32_OPAMP4
bool "OPAMP4"
default n
depends on STM32_HAVE_OPAMP4
config STM32_OTGFS
bool "OTG FS"
@ -2743,36 +2810,25 @@ menu "Timer Configuration"
if SCHED_TICKLESS
config STM32_ONESHOT
bool
default y
config STM32_FREERUN
bool
default y
config STM32_TICKLESS_ONESHOT
int "Tickless one-shot timer channel"
config STM32_TICKLESS_TIMER
int "Tickless hardware timer"
default 2
range 1 14
depends on STM32_ONESHOT
---help---
If the Tickless OS feature is enabled, the one clock must be
assigned to provided the one-shot timer needed by the OS.
If the Tickless OS feature is enabled, then one clock must be
assigned to provided the timer needed by the OS.
config STM32_TICKLESS_FREERUN
int "Tickless free-running timer channel"
default 5
range 1 14
depends on STM32_FREERUN
config STM32_TICKLESS_CHANNEL
int "Tickless timer channel"
default 1
range 1 4
---help---
If the Tickless OS feature is enabled, the one clock must be
assigned to provided the free-running timer needed by the OS.
assigned to provided the free-running timer needed by the OS
and one channel on that clock is needed to handle intervals.
endif # SCHED_TICKLESS
if !SCHED_TICKLESS
config STM32_ONESHOT
bool "TIM one-shot wrapper"
default n
@ -2787,8 +2843,6 @@ config STM32_FREERUN
Enable a wrapper around the low level timer/counter functions to
support a free-running timer.
endif # !SCHED_TICKLESS
config STM32_ONESHOT_MAXTIMERS
int "Maximum number of oneshot timers"
default 1

460
arch/arm/src/stm32/stm32_comp.c
View File

@ -45,21 +45,25 @@
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/analog/comp.h>
#include <nuttx/analog/ioctl.h>
#include "chip.h"
#include "stm32_gpio.h"
#include "stm32_comp.h"
#ifdef CONFIG_STM32_COMP
/* Some COMP peripheral must be enabled */
/* Up to 7 comparators in STM32F2 Series */
/* Up to 7 comparators in STM32F3 Series */
#if defined(CONFIG_STM32_COMP1) || defined(CONFIG_STM32_COMP2) || \
defined(CONFIG_STM32_COMP3) || defined(CONFIG_STM32_COMP4) || \
defined(CONFIG_STM32_COMP5) || defined(CONFIG_STM32_COMP6) || \
defined(CONFIG_STM32_COMP7)
#ifndef CONFIG_STM32_SYSCFG
# error "SYSCFG clock enable must be set"
#endif
/* @TODO: support for STM32F30XX and STM32F37XX comparators */
#if defined(CONFIG_STM32_STM32F30XX) || defined(CONFIG_STM32_STM32F33XX) || \
@ -81,6 +85,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* COMP2 default configuration **********************************************/
#ifdef CONFIG_STM32_COMP2
@ -145,6 +150,61 @@
* Private Types
****************************************************************************/
/* This structure describes the configuration of one COMP device */
struct stm32_comp_s
{
uint8_t blanking; /* Blanking source */
uint8_t pol; /* Output polarity */
uint8_t inm; /* Inverting input selection */
uint8_t out; /* Comparator output */
uint8_t lock; /* Comparator Lock */
uint32_t csr; /* Control and status register */
#ifndef CONFIG_STM32_STM32F33XX
uint8_t mode; /* Comparator mode */
uint8_t hyst; /* Comparator hysteresis */
/* @TODO: Window mode + INP selection */
#endif
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* COMP Register access */
static inline void comp_modify_csr(FAR struct stm32_comp_s *priv,
uint32_t clearbits, uint32_t setbits);
static inline uint32_t comp_getreg_csr(FAR struct stm32_comp_s *priv);
static inline void comp_putreg_csr(FAR struct stm32_comp_s *priv,
uint32_t value);
static bool stm32_complock_get(FAR struct stm32_comp_s *priv);
static int stm32_complock(FAR struct stm32_comp_s *priv, bool lock);
/* COMP Driver Methods */
static void comp_shutdown(FAR struct comp_dev_s *dev);
static int comp_setup(FAR struct comp_dev_s *dev);
static int comp_read(FAR struct comp_dev_s *dev);
static int comp_ioctl(FAR struct comp_dev_s *dev, int cmd, unsigned long arg);
/* Initialization */
static int stm32_compconfig(FAR struct stm32_comp_s *priv);
static int stm32_compenable(FAR struct stm32_comp_s *priv, bool enable);
/****************************************************************************
* Private Data
****************************************************************************/
static const struct comp_ops_s g_compops =
{
.ao_shutdown = comp_shutdown,
.ao_setup = comp_setup,
.ao_read = comp_read,
.ao_ioctl = comp_ioctl,
};
#ifdef CONFIG_STM32_COMP1
static struct stm32_comp_s g_comp1priv =
{
@ -159,6 +219,12 @@ static struct stm32_comp_s g_comp1priv =
.hyst = COMP1_HYST,
#endif
};
static struct comp_dev_s g_comp1dev =
{
.ad_ops = &g_compops,
.ad_priv = &g_comp1priv,
};
#endif
#ifdef CONFIG_STM32_COMP2
@ -175,6 +241,12 @@ static struct stm32_comp_s g_comp2priv =
.hyst = COMP2_HYST,
#endif
};
static struct comp_dev_s g_comp2dev =
{
.ad_ops = &g_compops,
.ad_priv = &g_comp2priv,
};
#endif
#ifdef CONFIG_STM32_COMP3
@ -187,10 +259,16 @@ static struct stm32_comp_s g_comp3priv =
.lock = COMP3_LOCK,
.csr = STM32_COMP3_CSR,
#ifndef CONFIG_STM32_STM32F33XX
.mode = COMP3_MODE,
.hyst = COMP3_HYST,
.mode = COMP3_MODE,
.hyst = COMP3_HYST,
#endif
};
static struct comp_dev_s g_comp3dev =
{
.ad_ops = &g_compops,
.ad_priv = &g_comp3priv,
};
#endif
#ifdef CONFIG_STM32_COMP4
@ -207,6 +285,12 @@ static struct stm32_comp_s g_comp4priv =
.hyst = COMP4_HYST,
#endif
};
static struct comp_dev_s g_comp4dev =
{
.ad_ops = &g_compops,
.ad_priv = &g_comp4priv,
};
#endif
#ifdef CONFIG_STM32_COMP5
@ -223,6 +307,12 @@ static struct stm32_comp_s g_comp5priv =
.hyst = COMP5_HYST,
#endif
};
static struct comp_dev_s g_comp5dev =
{
.ad_ops = &g_compops,
.ad_priv = &g_comp5priv,
};
#endif
#ifdef CONFIG_STM32_COMP6
@ -239,6 +329,12 @@ static struct stm32_comp_s g_comp6priv =
.hyst = COMP6_HYST,
#endif
};
static struct comp_dev_s g_comp6dev =
{
.ad_ops = &g_compops,
.ad_priv = &g_comp6priv,
};
#endif
#ifdef CONFIG_STM32_COMP7
@ -255,19 +351,14 @@ static struct stm32_comp_s g_comp7priv =
.hyst = COMP7_HYST,
#endif
};
static struct comp_dev_s g_comp7dev =
{
.ad_ops = &g_compops,
.ad_priv = &g_comp7priv,
};
#endif
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static inline void comp_modify_csr(FAR struct stm32_comp_s *priv,
uint32_t clearbits, uint32_t setbits);
static inline uint32_t comp_getreg_csr(FAR struct stm32_comp_s *priv);
static inline void comp_putreg_csr(FAR struct stm32_comp_s *priv,
uint32_t value);
static bool stm32_complock_get(FAR struct stm32_comp_s *priv);
/****************************************************************************
* Private Functions
****************************************************************************/
@ -360,13 +451,52 @@ static bool stm32_complock_get(FAR struct stm32_comp_s *priv)
regval = comp_getreg_csr(priv);
return ((regval & COMP_CSR_LOCK == 0) ? false : true);
return (((regval & COMP_CSR_LOCK) == 0) ? false : true);
}
/****************************************************************************
* Public Functions
* Name: stm32_complock
*
* Description:
* Lock comparator CSR register
*
* Input Parameters:
* priv - A reference to the COMP structure
* enable - lock flag
*
* Returned Value:
* 0 on success, a negated errno value on failure
*
****************************************************************************/
static int stm32_complock(FAR struct stm32_comp_s *priv, bool lock)
{
bool current;
current = stm32_complock_get(priv);
if (current)
{
if (lock == false)
{
aerr("ERROR: COMP LOCK can be cleared only by a system reset\n");
return -EPERM;
}
}
else
{
if (lock == true)
{
comp_modify_csr(priv, 0, COMP_CSR_LOCK);
priv->lock = COMP_LOCK_RO;
}
}
return OK;
}
/****************************************************************************
* Name: stm32_compconfig
*
@ -383,9 +513,9 @@ static bool stm32_complock_get(FAR struct stm32_comp_s *priv)
*
****************************************************************************/
int stm32_compconfig(FAR struct stm32_comp_s *priv)
static int stm32_compconfig(FAR struct stm32_comp_s *priv)
{
uint32_t regval;
uint32_t regval = 0;
int index;
/* Get comparator index */
@ -665,98 +795,6 @@ int stm32_compconfig(FAR struct stm32_comp_s *priv)
return OK;
}
/****************************************************************************
* Name: stm32_compinitialize
*
* Description:
* Initialize the COMP.
*
* Input Parameters:
* intf - The COMP interface number.
*
* Returned Value:
* Valid COMP device structure reference on succcess; a NULL on failure.
*
* Assumptions:
* 1. Clock to the COMP block has enabled,
* 2. Board-specific logic has already configured
*
****************************************************************************/
FAR struct stm32_comp_s* stm32_compinitialize(int intf)
{
FAR struct stm32_comp_s *priv;
int ret;
switch (intf)
{
#ifdef CONFIG_STM32_COMP1
case 1:
ainfo("COMP1 selected\n");
priv = &g_comp1priv;
break;
#endif
#ifdef CONFIG_STM32_COMP2
case 2:
ainfo("COMP2 selected\n");
priv = &g_comp2priv;
break;
#endif
#ifdef CONFIG_STM32_COMP3
case 3:
ainfo("COMP3 selected\n");
priv = &g_comp3priv;
break;
#endif
#ifdef CONFIG_STM32_COMP4
case 4:
ainfo("COMP4 selected\n");
priv = &g_comp4priv;
break;
#endif
#ifdef CONFIG_STM32_COMP5
case 5:
ainfo("COMP5 selected\n");
priv = &g_comp5priv;
break;
#endif
#ifdef CONFIG_STM32_COMP6
case 6:
ainfo("COMP6 selected\n");
priv = &g_comp6priv;
break;
#endif
#ifdef CONFIG_STM32_COMP7
case 7:
ainfo("COMP7 selected\n");
priv = &g_comp7priv;
break;
#endif
default:
aerr("ERROR: No COMP interface defined\n");
return NULL;
}
/* Configure selected comparator */
ret = stm32_compconfig(priv);
if (ret < 0)
{
aerr("ERROR: Failed to initialize COMP%d: %d\n", intf, ret);
errno = -ret;
return NULL;
}
return priv;
}
/****************************************************************************
* Name: stm32_compenable
*
@ -772,7 +810,7 @@ FAR struct stm32_comp_s* stm32_compinitialize(int intf)
*
****************************************************************************/
int stm32_compenable(FAR struct stm32_comp_s *priv, bool enable)
static int stm32_compenable(FAR struct stm32_comp_s *priv, bool enable)
{
bool lock;
@ -792,13 +830,13 @@ int stm32_compenable(FAR struct stm32_comp_s *priv, bool enable)
{
/* Enable the COMP */
comp_modify_csr(priv, COMP_CSR_COMPEN, 0);
comp_modify_csr(priv, 0, COMP_CSR_COMPEN);
}
else
{
/* Disable the COMP */
comp_modify_csr(priv, 0, COMP_CSR_COMPEN);
comp_modify_csr(priv, COMP_CSR_COMPEN, 0);
}
}
@ -806,46 +844,190 @@ int stm32_compenable(FAR struct stm32_comp_s *priv, bool enable)
}
/****************************************************************************
* Name: stm32_complock
* Name: adc_setup
*
* Description:
* Lock comparator CSR register
* Configure the COMP. This method is called the first time that the COMP
* device is opened. This will occur when the port is first opened.
* This setup includes configuring and attaching COMP interrupts.
* Interrupts are all disabled upon return.
*
* Input Parameters:
* priv - A reference to the COMP structure
* enable - lock flag
*
* Returned Value:
* 0 on success, a negated errno value on failure
*
****************************************************************************/
int stm32_complock(FAR struct stm32_comp_s *priv, bool lock)
static int comp_setup(FAR struct comp_dev_s *dev)
{
bool current;
#warning "Missing logic"
return OK;
}
current = stm32_complock_get(priv);
/****************************************************************************
* Name: comp_shutdown
*
* Description:
* Disable the COMP. This method is called when the COMP device is closed.
* This method reverses the operation the setup method.
* Works only if COMP device is not locked.
*
* Input Parameters:
*
* Returned Value:
* None
*
****************************************************************************/
if (current)
static void comp_shutdown(FAR struct comp_dev_s *dev)
{
#warning "Missing logic"
}
/****************************************************************************
* Name: comp_read
*
* Description:
* Get the COMP output state.
*
* Input Parameters:
*
* Returned Value:
* 0 if output is low (non-inverting input below inverting input),
* 1 if output is high (non inverting input above inverting input).
*
****************************************************************************/
static int comp_read(FAR struct comp_dev_s *dev)
{
FAR struct stm32_comp_s *priv;
uint32_t regval;
priv = dev->ad_priv;
regval = comp_getreg_csr(priv);
return (((regval & COMP_CSR_OUT) == 0) ? 0 : 1);
}
/****************************************************************************
* Name: comp_ioctl
*
* Description:
* All ioctl calls will be routed through this method.
*
* Input Parameters:
* dev - pointer to device structure used by the driver
* cmd - command
* arg - arguments passed with command
*
* Returned Value:
* Zero on success; a negated errno value on failure.
*
****************************************************************************/
static int comp_ioctl(FAR struct comp_dev_s *dev, int cmd, unsigned long arg)
{
#warning "Missing logic"
return -ENOTTY;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_compinitialize
*
* Description:
* Initialize the COMP.
*
* Input Parameters:
* intf - The COMP interface number.
*
* Returned Value:
* Valid COMP device structure reference on succcess; a NULL on failure.
*
* Assumptions:
* 1. Clock to the COMP block has enabled,
* 2. Board-specific logic has already configured
*
****************************************************************************/
FAR struct comp_dev_s* stm32_compinitialize(int intf)
{
FAR struct comp_dev_s *dev;
FAR struct stm32_comp_s *comp;
int ret;
switch (intf)
{
if (lock == false)
{
aerr("ERROR: COMP LOCK can be cleared only by a system reset\n");
#ifdef CONFIG_STM32_COMP1
case 1:
ainfo("COMP1 selected\n");
dev = &g_comp1dev;
break;
#endif
return -EPERM;
}
}
else
{
if (lock == true)
{
comp_modify_csr(priv, COMP_CSR_LOCK, 0);
#ifdef CONFIG_STM32_COMP2
case 2:
ainfo("COMP2 selected\n");
dev = &g_comp2dev;
break;
#endif
priv->lock = COMP_LOCK_RO;
}
#ifdef CONFIG_STM32_COMP3
case 3:
ainfo("COMP3 selected\n");
dev = &g_comp3dev;
break;
#endif
#ifdef CONFIG_STM32_COMP4
case 4:
ainfo("COMP4 selected\n");
dev = &g_comp4dev;
break;
#endif
#ifdef CONFIG_STM32_COMP5
case 5:
ainfo("COMP5 selected\n");
dev = &g_comp5dev;
break;
#endif
#ifdef CONFIG_STM32_COMP6
case 6:
ainfo("COMP6 selected\n");
dev = &g_comp6dev;
break;
#endif
#ifdef CONFIG_STM32_COMP7
case 7:
ainfo("COMP7 selected\n");
dev = &g_comp7dev;
break;
#endif
default:
aerr("ERROR: No COMP interface defined\n");
return NULL;
}
return OK;
/* Configure selected comparator */
comp = dev->ad_priv;
ret = stm32_compconfig(comp);
if (ret < 0)
{
aerr("ERROR: Failed to initialize COMP%d: %d\n", intf, ret);
errno = -ret;
return NULL;
}
return dev;
}
#endif /* CONFIG_STM32_STM32F30XX || CONFIG_STM32_STM32F33XX ||
@ -853,5 +1035,3 @@ int stm32_complock(FAR struct stm32_comp_s *priv, bool lock)
#endif /* CONFIG_STM32_COMP2 || CONFIG_STM32_COMP4 ||
* CONFIG_STM32_COMP6 */
#endif /* CONFIG_STM32_COMP */

71
arch/arm/src/stm32/stm32_comp.h
View File

@ -60,7 +60,7 @@
#define COMP_POL_DEFAULT COMP_POL_NONINVERT /* Output is not inverted */
#define COMP_INM_DEFAULT COMP_INMSEL_1P4VREF /* 1/4 of Vrefint as INM */
#define COMP_OUTSEL_DEFAULT COMP_OUTSEL_NOSEL /* Output not selected */
#define COMP_LOCK_DEFAULT COMP_LOCK_RO /* Do not lock CSR register */
#define COMP_LOCK_DEFAULT COMP_LOCK_RW /* Do not lock CSR register */
#ifndef CONFIG_STM32_STM32F33XX
#define COMP_MODE_DEFAULT
@ -172,23 +172,6 @@ enum stm32_comp_winmode_e
#endif
/* Comparator configuration ***********************************************************/
struct stm32_comp_s
{
uint8_t blanking; /* Blanking source */
uint8_t pol; /* Output polarity */
uint8_t inm; /* Inverting input selection */
uint8_t out; /* Comparator output */
uint8_t lock; /* Comparator Lock */
uint32_t csr; /* Control and status register */
#ifndef CONFIG_STM32_STM32F33XX
uint8_t mode; /* Comparator mode */
uint8_t hyst; /* Comparator hysteresis */
/* @TODO: Window mode + INP selection */
#endif
};
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
@ -202,22 +185,6 @@ extern "C"
#define EXTERN extern
#endif
/****************************************************************************
* Name: stm32_compconfig
*
* Description:
* Configure comparator and used I/Os
*
* Input Parameters:
* priv - A reference to the COMP structure
*
* Returned Value:
* 0 on success, a negated errno value on failure
*
****************************************************************************/
int stm32_compconfig(FAR struct stm32_comp_s *priv);
/****************************************************************************
* Name: stm32_compinitialize
*
@ -236,41 +203,7 @@ int stm32_compconfig(FAR struct stm32_comp_s *priv);
*
****************************************************************************/
FAR struct stm32_comp_s* stm32_compinitialize(int intf);
/****************************************************************************
* Name: stm32_compenable
*
* Description:
* Enable/disable comparator
*
* Input Parameters:
* priv - A reference to the COMP structure
* enable - enable/disable flag
*
* Returned Value:
* 0 on success, a negated errno value on failure
*
****************************************************************************/
int stm32_compenable(FAR struct stm32_comp_s *priv, bool enable);
/****************************************************************************
* Name: stm32_complock
*
* Description:
* Lock comparator CSR register
*
* Input Parameters:
* priv - A reference to the COMP structure
* enable - lock flag
*
* Returned Value:
* 0 on success, a negated errno value on failure
*
****************************************************************************/
int stm32_complock(FAR struct stm32_comp_s *priv, bool lock);
FAR struct comp_dev_s* stm32_compinitialize(int intf);
#undef EXTERN
#ifdef __cplusplus

35
arch/arm/src/stm32/stm32_rng.c
View File

@ -46,6 +46,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/fs/fs.h>
#include <nuttx/drivers/drivers.h>
@ -97,13 +98,20 @@ static const struct file_operations g_rngops =
#ifndef CONFIG_DISABLE_POLL
, 0 /* poll */
#endif
#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
, 0 /* unlink */
#endif
};
/****************************************************************************
* Private functions
****************************************************************************/
static int stm32_rng_initialize()
/****************************************************************************
* Name: stm32_rng_initialize
****************************************************************************/
static int stm32_rng_initialize(void)
{
uint32_t regval;
@ -133,7 +141,11 @@ static int stm32_rng_initialize()
return OK;
}
static void stm32_enable()
/****************************************************************************
* Name: stm32_enable
****************************************************************************/
static void stm32_enable(void)
{
uint32_t regval;
@ -144,7 +156,11 @@ static void stm32_enable()
putreg32(regval, STM32_RNG_CR);
}
static void stm32_disable()
/****************************************************************************
* Name: stm32_disable
****************************************************************************/
static void stm32_disable(void)
{
uint32_t regval;
regval = getreg32(STM32_RNG_CR);
@ -152,6 +168,10 @@ static void stm32_disable()
putreg32(regval, STM32_RNG_CR);
}
/****************************************************************************
* Name: stm32_interrupt
****************************************************************************/
static int stm32_interrupt(int irq, void *context, FAR void *arg)
{
uint32_t rngsr;
@ -234,11 +254,14 @@ static ssize_t stm32_read(struct file *filep, char *buffer, size_t buflen)
{
/* We've got the semaphore. */
/* Initialize semaphore with 0 for blocking until the buffer is filled from
* interrupts.
/* Initialize the operation semaphore with 0 for blocking until the
* buffer is filled from interrupts. The readsem semaphore is used
* for signaling and, hence, should not have priority inheritance
* enabled.
*/
sem_init(&g_rngdev.rd_readsem, 0, 1);
sem_init(&g_rngdev.rd_readsem, 0, 0);
sem_setprotocol(&g_rngdev.rd_readsem, SEM_PRIO_NONE);
g_rngdev.rd_buflen = buflen;
g_rngdev.rd_buf = buffer;

730
arch/arm/src/stm32/stm32_tickless.c
View File

@ -2,7 +2,9 @@
* arch/arm/src/stm32/stm32_tickless.c
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Copyright (C) 2017 Ansync Labs. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* Konstantin Berezenko <kpberezenko@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -55,24 +57,19 @@
*
****************************************************************************/
/****************************************************************************
* SAM34 Timer Usage
* STM32 Timer Usage
*
* This current implementation uses two timers: A one-shot timer to provide
* the timed events and a free running timer to provide the current time.
* Since timers are a limited resource, that could be an issue on some
* systems.
*
* We could do the job with a single timer if we were to keep the single
* timer in a free-running at all times. The STM32 timer/counters have
* 16-bit/32-bit counters with the capability to generate a compare interrupt
* when the timer matches a compare value but also to continue counting
* without stopping (giving another, different interrupt when the timer
* rolls over from 0xffffffff to zero). So we could potentially just set
* the compare at the number of ticks you want PLUS the current value of
* timer. Then you could have both with a single timer: An interval timer
* and a free-running counter with the same timer!
*
* Patches are welcome!
* This implementation uses one timer: A free running timer to provide
* the current time and a capture/compare channel for timed-events.
* The STM32 has both 16-bit and 32-bit timers so to keep things consistent
* we limit the timer counters to a 16-bit range. BASIC timers that
* are found on some STM32 chips (timers 6 and 7) are incompatible with this
* implementation because they don't have capture/compare channels. There
* are two interrupts generated from our timer, the overflow interrupt which
* drives the timing handler and the capture/compare interrupt which drives
* the interval handler. There are some low level timer control functions
* implemented here because the API of stm32_tim.c does not provide adequate
* control over capture/compare interrupts.
*
****************************************************************************/
@ -84,12 +81,15 @@
#include <stdint.h>
#include <stdbool.h>
#include <errno.h>
#include <assert.h>
#include <nuttx/arch.h>
#include <debug.h>
#include "stm32_oneshot.h"
#include "stm32_freerun.h"
#include "up_arch.h"
#include "stm32_tim.h"
#ifdef CONFIG_SCHED_TICKLESS
@ -97,30 +97,24 @@
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_STM32_ONESHOT
# error CONFIG_STM32_ONESHOT must be selected for the Tickless OS option
#endif
#ifndef CONFIG_STM32_FREERUN
# error CONFIG_STM32_FREERUN must be selected for the Tickless OS option
#endif
#ifndef CONFIG_STM32_TICKLESS_FREERUN
# error CONFIG_STM32_TICKLESS_FREERUN must be selected for the Tickless OS option
#endif
#ifndef CONFIG_STM32_TICKLESS_ONESHOT
# error CONFIG_STM32_TICKLESS_ONESHOT must be selected for the Tickless OS option
#endif
/****************************************************************************
* Private Types
****************************************************************************/
struct stm32_tickless_s
{
struct stm32_oneshot_s oneshot;
struct stm32_freerun_s freerun;
uint8_t timer; /* The timer/counter in use */
uint8_t channel; /* The timer channel to use for intervals */
FAR struct stm32_tim_dev_s *tch; /* Handle returned by stm32_tim_init() */
uint32_t frequency;
#ifdef CONFIG_CLOCK_TIMEKEEPING
uint64_t counter_mask;
#else
uint32_t overflow; /* Timer counter overflow */
#endif
volatile bool pending; /* True: pending task */
uint32_t period; /* Interval period */
uint32_t base;
};
/****************************************************************************
@ -133,11 +127,159 @@ static struct stm32_tickless_s g_tickless;
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_oneshot_handler
/************************************************************************************
* Name: stm32_getreg16
*
* Description:
* Called when the one shot timer expires
* Get a 16-bit register value by offset
*
************************************************************************************/
static inline uint16_t stm32_getreg16(uint8_t offset)
{
return getreg16(g_tickless.base + offset);
}
/************************************************************************************
* Name: stm32_putreg16
*
* Description:
* Put a 16-bit register value by offset
*
************************************************************************************/
static inline void stm32_putreg16(uint8_t offset, uint16_t value)
{
putreg16(value, g_tickless.base + offset);
}
/************************************************************************************
* Name: stm32_modifyreg16
*
* Description:
* Modify a 16-bit register value by offset
*
************************************************************************************/
static inline void stm32_modifyreg16(uint8_t offset, uint16_t clearbits,
uint16_t setbits)
{
modifyreg16(g_tickless.base + offset, clearbits, setbits);
}
/************************************************************************************
* Name: stm32_tickless_enableint
************************************************************************************/
static inline void stm32_tickless_enableint(int channel)
{
stm32_modifyreg16(STM32_BTIM_DIER_OFFSET, 0, 1 << channel);
}
/************************************************************************************
* Name: stm32_tickless_disableint
************************************************************************************/
static inline void stm32_tickless_disableint(int channel)
{
stm32_modifyreg16(STM32_BTIM_DIER_OFFSET, 1 << channel, 0);
}
/************************************************************************************
* Name: stm32_tickless_ackint
************************************************************************************/
static inline void stm32_tickless_ackint(int channel)
{
stm32_putreg16(STM32_BTIM_SR_OFFSET, ~(1 << channel));
}
/************************************************************************************
* Name: stm32_tickless_getint
************************************************************************************/
static inline uint16_t stm32_tickless_getint(void)
{
return stm32_getreg16(STM32_BTIM_SR_OFFSET);
}
/************************************************************************************
* Name: stm32_tickless_setchannel
************************************************************************************/
static int stm32_tickless_setchannel(uint8_t channel)
{
uint16_t ccmr_orig = 0;
uint16_t ccmr_val = 0;
uint16_t ccmr_mask = 0xff;
uint16_t ccer_val = stm32_getreg16(STM32_GTIM_CCER_OFFSET);
uint8_t ccmr_offset = STM32_GTIM_CCMR1_OFFSET;
/* Further we use range as 0..3; if channel=0 it will also overflow here */
if (--channel > 4)
{
return -EINVAL;
}
/* Assume that channel is disabled and polarity is active high */
ccer_val &= ~(3 << (channel << 2));
/* This function is not supported on basic timers. To enable or
* disable it, simply set its clock to valid frequency or zero.
*/
#if STM32_NBTIM > 0
if (g_tickless.base == STM32_TIM6_BASE
#endif
#if STM32_NBTIM > 1
|| g_tickless.base == STM32_TIM7_BASE
#endif
#if STM32_NBTIM > 0
)
{
return -EINVAL;
}
#endif
/* Frozen mode because we don't want to change the GPIO, preload register
* disabled.
*/
ccmr_val = (ATIM_CCMR_MODE_FRZN << ATIM_CCMR1_OC1M_SHIFT);
/* Set polarity */
ccer_val |= ATIM_CCER_CC1P << (channel << 2);
/* Define its position (shift) and get register offset */
if ((channel & 1) != 0)
{
ccmr_val <<= 8;
ccmr_mask <<= 8;
}
if (channel > 1)
{
ccmr_offset = STM32_GTIM_CCMR2_OFFSET;
}
ccmr_orig = stm32_getreg16(ccmr_offset);
ccmr_orig &= ~ccmr_mask;
ccmr_orig |= ccmr_val;
stm32_putreg16(ccmr_offset, ccmr_orig);
stm32_putreg16(STM32_GTIM_CCER_OFFSET, ccer_val);
return OK;
}
/****************************************************************************
* Name: stm32_interval_handler
*
* Description:
* Called when the timer counter matches the compare register
*
* Input Parameters:
* None
@ -151,12 +293,78 @@ static struct stm32_tickless_s g_tickless;
*
****************************************************************************/
static void stm32_oneshot_handler(void *arg)
static void stm32_interval_handler(void)
{
tmrinfo("Expired...\n");
/* Disable the compare interrupt now. */
stm32_tickless_disableint(g_tickless.channel);
stm32_tickless_ackint(g_tickless.channel);
g_tickless.pending = false;
sched_timer_expiration();
}
/****************************************************************************
* Name: stm32_timing_handler
*
* Description:
* Timer interrupt callback. When the freerun timer counter overflows,
* this interrupt will occur. We will just increment an overflow count.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#ifndef CONFIG_CLOCK_TIMEKEEPING
static void stm32_timing_handler(void)
{
g_tickless.overflow++;
STM32_TIM_ACKINT(g_tickless.tch, 0);
}
#endif /* CONFIG_CLOCK_TIMEKEEPING */
/****************************************************************************
* Name: stm32_tickless_handler
*
* Description:
* Generic interrupt handler for this timer. It checks the source of the
* interrupt and fires the appropriate handler.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
static int stm32_tickless_handler(int irq, void *context, void *arg)
{
int interrupt_flags = stm32_tickless_getint();
#ifndef CONFIG_CLOCK_TIMEKEEPING
if (interrupt_flags & ATIM_SR_UIF)
{
stm32_timing_handler();
}
#endif /* CONFIG_CLOCK_TIMEKEEPING */
if (interrupt_flags & (1 << g_tickless.channel))
{
stm32_interval_handler();
}
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
@ -188,55 +396,172 @@ static void stm32_oneshot_handler(void *arg)
void arm_timer_initialize(void)
{
#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
uint64_t max_delay;
#endif
int ret;
/* Initialize the one-shot timer */
ret = stm32_oneshot_initialize(&g_tickless.oneshot,
CONFIG_STM32_TICKLESS_ONESHOT,
CONFIG_USEC_PER_TICK);
if (ret < 0)
switch (CONFIG_STM32_TICKLESS_TIMER)
{
tmrerr("ERROR: stm32_oneshot_initialize failed\n");
PANIC();
}
#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
/* Get the maximum delay of the one-shot timer in microseconds */
ret = stm32_oneshot_max_delay(&g_tickless.oneshot, &max_delay);
if (ret < 0)
{
tmrerr("ERROR: stm32_oneshot_max_delay failed\n");
PANIC();
}
/* Convert this to configured clock ticks for use by the OS timer logic */
max_delay /= CONFIG_USEC_PER_TICK;
if (max_delay > UINT32_MAX)
{
g_oneshot_maxticks = UINT32_MAX;
}
else
{
g_oneshot_maxticks = max_delay;
}
#ifdef CONFIG_STM32_TIM1
case 1:
g_tickless.base = STM32_TIM1_BASE;
break;
#endif
/* Initialize the free-running timer */
#ifdef CONFIG_STM32_TIM2
case 2:
g_tickless.base = STM32_TIM2_BASE;
break;
#endif
ret = stm32_freerun_initialize(&g_tickless.freerun,
CONFIG_STM32_TICKLESS_FREERUN,
CONFIG_USEC_PER_TICK);
if (ret < 0)
{
tmrerr("ERROR: stm32_freerun_initialize failed\n");
PANIC();
#ifdef CONFIG_STM32_TIM3
case 3:
g_tickless.base = STM32_TIM3_BASE;
break;
#endif
#ifdef CONFIG_STM32_TIM4
case 4:
g_tickless.base = STM32_TIM4_BASE;
break;
#endif
#ifdef CONFIG_STM32_TIM5
case 5:
g_tickless.base = STM32_TIM5_BASE;
break;
#endif
#ifdef CONFIG_STM32_TIM6
case 6:
/* Basic timers not supported by this implementation */
ASSERT(0);
break;
#endif
#ifdef CONFIG_STM32_TIM7
case 7:
/* Basic timers not supported by this implementation */
ASSERT(0);
break;
#endif
#ifdef CONFIG_STM32_TIM8
case 8:
g_tickless.base = STM32_TIM8_BASE;
break;
#endif
#ifdef CONFIG_STM32_TIM9
case 9:
g_tickless.base = STM32_TIM9_BASE;
break;
#endif
#ifdef CONFIG_STM32_TIM10
case 10:
g_tickless.base = STM32_TIM10_BASE;
break;
#endif
#ifdef CONFIG_STM32_TIM11
case 11:
g_tickless.base = STM32_TIM11_BASE;
break;
#endif
#ifdef CONFIG_STM32_TIM12
case 12:
g_tickless.base = STM32_TIM12_BASE;
break;
#endif
#ifdef CONFIG_STM32_TIM13
case 13:
g_tickless.base = STM32_TIM13_BASE;
break;
#endif
#ifdef CONFIG_STM32_TIM14
case 14:
g_tickless.base = STM32_TIM14_BASE;
break;
#endif
#ifdef CONFIG_STM32_TIM15
case 15:
g_tickless.base = STM32_TIM15_BASE;
break;
#endif
#ifdef CONFIG_STM32_TIM16
case 16:
g_tickless.base = STM32_TIM16_BASE;
break;
#endif
#ifdef CONFIG_STM32_TIM17
case 17:
g_tickless.base = STM32_TIM17_BASE;
break;
#endif
default:
ASSERT(0);
}
/* Get the TC frequency that corresponds to the requested resolution */
g_tickless.frequency = USEC_PER_SEC / (uint32_t)CONFIG_USEC_PER_TICK;
g_tickless.timer = CONFIG_STM32_TICKLESS_TIMER;
g_tickless.channel = CONFIG_STM32_TICKLESS_CHANNEL;
g_tickless.pending = false;
g_tickless.period = 0;
tmrinfo("timer=%d channel=%d frequency=%d Hz\n",
g_tickless.timer, g_tickless.channel, g_tickless.frequency);
g_tickless.tch = stm32_tim_init(g_tickless.timer);
if (!g_tickless.tch)
{
tmrerr("ERROR: Failed to allocate TIM%d\n", g_tickless.timer);
ASSERT(0);
}
STM32_TIM_SETCLOCK(g_tickless.tch, g_tickless.frequency);
#ifdef CONFIG_CLOCK_TIMEKEEPING
/* Should this be changed to 0xffff because we use 16 bit timers? */
g_tickless.counter_mask = 0xffffffffull;
#else
g_tickless.overflow = 0;
/* Set up to receive the callback when the counter overflow occurs */
STM32_TIM_SETISR(g_tickless.tch, stm32_tickless_handler, NULL, 0);
#endif
/* Initialize interval to zero */
STM32_TIM_SETCOMPARE(g_tickless.tch, g_tickless.channel, 0);
/* Setup compare channel for the interval timing */
stm32_tickless_setchannel(g_tickless.channel);
/* Set timer period */
STM32_TIM_SETPERIOD(g_tickless.tch, UINT16_MAX);
/* Initialize the counter */
STM32_TIM_SETMODE(g_tickless.tch, STM32_TIM_MODE_UP);
#ifdef CONFIG_SCHED_TICKLESS_LIMIT_MAX_SLEEP
g_oneshot_maxticks = UINT16_MAX;
#endif
/* Start the timer */
STM32_TIM_ACKINT(g_tickless.tch, 0);
STM32_TIM_ENABLEINT(g_tickless.tch, 0);
}
/****************************************************************************
@ -276,14 +601,84 @@ void arm_timer_initialize(void)
int up_timer_gettime(FAR struct timespec *ts)
{
return stm32_freerun_counter(&g_tickless.freerun, ts);
uint64_t usec;
uint32_t counter;
uint32_t verify;
uint32_t overflow;
uint32_t sec;
int pending;
irqstate_t flags;
DEBUGASSERT(g_tickless.tch && ts);
/* Temporarily disable the overflow counter. NOTE that we have to be
* careful here because stm32_tc_getpending() will reset the pending
* interrupt status. If we do not handle the overflow here then, it will
* be lost.
*/
flags = enter_critical_section();
overflow = g_tickless.overflow;
counter = STM32_TIM_GETCOUNTER(g_tickless.tch);
pending = STM32_TIM_CHECKINT(g_tickless.tch, 0);
verify = STM32_TIM_GETCOUNTER(g_tickless.tch);
/* If an interrupt was pending before we re-enabled interrupts,
* then the overflow needs to be incremented.
*/
if (pending)
{
STM32_TIM_ACKINT(g_tickless.tch, 0);
/* Increment the overflow count and use the value of the
* guaranteed to be AFTER the overflow occurred.
*/
overflow++;
counter = verify;
/* Update tickless overflow counter. */
g_tickless.overflow = overflow;
}
leave_critical_section(flags);
tmrinfo("counter=%lu (%lu) overflow=%lu, pending=%i\n",
(unsigned long)counter, (unsigned long)verify,
(unsigned long)overflow, pending);
tmrinfo("frequency=%u\n", g_tickless.frequency);
/* Convert the whole thing to units of microseconds.
*
* frequency = ticks / second
* seconds = ticks * frequency
* usecs = (ticks * USEC_PER_SEC) / frequency;
*/
usec = ((((uint64_t)overflow << 16) + (uint64_t)counter) * USEC_PER_SEC) /
g_tickless.frequency;
/* And return the value of the timer */
sec = (uint32_t)(usec / USEC_PER_SEC);
ts->tv_sec = sec;
ts->tv_nsec = (usec - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
tmrinfo("usec=%llu ts=(%u, %lu)\n",
usec, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
return OK;
}
#else
int up_timer_getcounter(FAR uint64_t *cycles)
{
return stm32_freerun_counter(&g_tickless.freerun, cycles);
*cycles = (uint64_t)STM32_TIM_GETCOUNTER(g_tickless.tch);
return OK;
}
#endif /* CONFIG_CLOCK_TIMEKEEPING */
@ -306,7 +701,7 @@ int up_timer_getcounter(FAR uint64_t *cycles)
void up_timer_getmask(FAR uint64_t *mask)
{
DEBUGASSERT(mask != NULL);
*mask = g_tickless.freerun.counter_mask;
*mask = g_tickless.counter_mask;
}
#endif /* CONFIG_CLOCK_TIMEKEEPING */
@ -348,7 +743,101 @@ void up_timer_getmask(FAR uint64_t *mask)
int up_timer_cancel(FAR struct timespec *ts)
{
return stm32_oneshot_cancel(&g_tickless.oneshot, ts);
irqstate_t flags;
uint64_t usec;
uint64_t sec;
uint64_t nsec;
uint32_t count;
uint32_t period;
/* Was the timer running? */
flags = enter_critical_section();
if (!g_tickless.pending)
{
/* No.. Just return zero timer remaining and successful cancellation.
* This function may execute at a high rate with no timer running
* (as when pre-emption is enabled and disabled).
*/
if (ts)
{
ts->tv_sec = 0;
ts->tv_nsec = 0;
}
leave_critical_section(flags);
return OK;
}
/* Yes.. Get the timer counter and period registers and disable the compare interrupt.
*
*/
tmrinfo("Cancelling...\n");
/* Disable the interrupt. */
stm32_tickless_disableint(g_tickless.channel);
count = STM32_TIM_GETCOUNTER(g_tickless.tch);
period = g_tickless.period;
g_tickless.pending = false;
leave_critical_section(flags);
/* Did the caller provide us with a location to return the time
* remaining?
*/
if (ts != NULL)
{
/* Yes.. then calculate and return the time remaining on the
* oneshot timer.
*/
tmrinfo("period=%lu count=%lu\n",
(unsigned long)period, (unsigned long)count);
if (count > period)
{
/* Handle rollover */
period += UINT16_MAX;
}
else if (count == period)
{
/* No time remaining */
ts->tv_sec = 0;
ts->tv_nsec = 0;
return OK;
}
/* The total time remaining is the difference. Convert that
* to units of microseconds.
*
* frequency = ticks / second
* seconds = ticks * frequency
* usecs = (ticks * USEC_PER_SEC) / frequency;
*/
usec = (((uint64_t)(period - count)) * USEC_PER_SEC) /
g_tickless.frequency;
/* Return the time remaining in the correct form */
sec = usec / USEC_PER_SEC;
nsec = ((usec) - (sec * USEC_PER_SEC)) * NSEC_PER_USEC;
ts->tv_sec = (time_t)sec;
ts->tv_nsec = (unsigned long)nsec;
tmrinfo("remaining (%lu, %lu)\n",
(unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
}
return OK;
}
/****************************************************************************
@ -378,6 +867,65 @@ int up_timer_cancel(FAR struct timespec *ts)
int up_timer_start(FAR const struct timespec *ts)
{
return stm32_oneshot_start(&g_tickless.oneshot, stm32_oneshot_handler, NULL, ts);
uint64_t usec;
uint64_t period;
uint32_t count;
irqstate_t flags;
tmrinfo("handler=%p arg=%p, ts=(%lu, %lu)\n",
handler, arg, (unsigned long)ts->tv_sec, (unsigned long)ts->tv_nsec);
DEBUGASSERT(ts);
DEBUGASSERT(g_tickless.tch);
/* Was an interval already running? */
flags = enter_critical_section();
if (g_tickless.pending)
{
/* Yes.. then cancel it */
tmrinfo("Already running... cancelling\n");
(void)up_timer_cancel(NULL);
}
/* Express the delay in microseconds */
usec = (uint64_t)ts->tv_sec * USEC_PER_SEC +
(uint64_t)(ts->tv_nsec / NSEC_PER_USEC);
/* Get the timer counter frequency and determine the number of counts need
* to achieve the requested delay.
*
* frequency = ticks / second
* ticks = seconds * frequency
* = (usecs * frequency) / USEC_PER_SEC;
*/
period = (usec * (uint64_t)g_tickless.frequency) / USEC_PER_SEC;
count = STM32_TIM_GETCOUNTER(g_tickless.tch);
tmrinfo("usec=%llu period=%08llx\n", usec, period);
DEBUGASSERT(period <= UINT16_MAX);
/* Set interval compare value. Rollover is fine,
* channel will trigger on the next period. (uint16_t) cast
* handles the overflow.
*/
g_tickless.period = (uint16_t)(period + count);
STM32_TIM_SETCOMPARE(g_tickless.tch, g_tickless.channel,
g_tickless.period);
/* Enable interrupts. We should get the callback when the interrupt
* occurs.
*/
stm32_tickless_ackint(g_tickless.channel);
stm32_tickless_enableint(g_tickless.channel);
g_tickless.pending = true;
leave_critical_section(flags);
return OK;
}
#endif /* CONFIG_SCHED_TICKLESS */

4
arch/arm/src/stm32f7/Make.defs
View File

@ -194,3 +194,7 @@ endif
ifeq ($(CONFIG_STM32F7_BBSRAM),y)
CHIP_CSRCS += stm32_bbsram.c
endif
ifeq ($(CONFIG_STM32F7_RNG),y)
CHIP_CSRCS += stm32_rng.c
endif

77
arch/arm/src/stm32f7/chip/stm32_rng.h Normal file
View File

@ -0,0 +1,77 @@
/************************************************************************************
* arch/arm/src/stm32f7/chip/stm32_rng.h
*
* Copyright (C) 2012 Max Holtzberg. All rights reserved.
* Author: Max Holtzberg <mh@uvc.de>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_STC_STM32F7_CHIP_STM32_RNG_H
#define __ARCH_ARM_STC_STM32F7_CHIP_STM32_RNG_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Register Offsets *****************************************************************/
#define STM32_RNG_CR_OFFSET 0x0000 /* RNG Control Register */
#define STM32_RNG_SR_OFFSET 0x0004 /* RNG Status Register */
#define STM32_RNG_DR_OFFSET 0x0008 /* RNG Data Register */
/* Register Addresses ***************************************************************/
#define STM32_RNG_CR (STM32_RNG_BASE+STM32_RNG_CR_OFFSET)
#define STM32_RNG_SR (STM32_RNG_BASE+STM32_RNG_SR_OFFSET)
#define STM32_RNG_DR (STM32_RNG_BASE+STM32_RNG_DR_OFFSET)
/* Register Bitfield Definitions ****************************************************/
/* RNG Control Register */
#define RNG_CR_RNGEN (1 << 2) /* Bit 2: RNG enable */
#define RNG_CR_IE (1 << 3) /* Bit 3: Interrupt enable */
/* RNG Status Register */
#define RNG_SR_DRDY (1 << 0) /* Bit 0: Data ready */
#define RNG_SR_CECS (1 << 1) /* Bit 1: Clock error current status */
#define RNG_SR_SECS (1 << 2) /* Bit 2: Seed error current status */
#define RNG_SR_CEIS (1 << 5) /* Bit 5: Clock error interrupt status */
#define RNG_SR_SEIS (1 << 6) /* Bit 6: Seed error interrupt status */
#endif /* __ARCH_ARM_STC_STM32F7_CHIP_STM32_RNG_H */

362
arch/arm/src/stm32f7/stm32_rng.c Normal file
View File

@ -0,0 +1,362 @@
/****************************************************************************
* arch/arm/src/stm32f7/stm32_rng.c
*
* Copyright (C) 2012 Max Holtzberg. All rights reserved.
* Author: Max Holtzberg <mh@uvc.de>
* mods for STL32L4 port by dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <stdint.h>
#include <stdbool.h>
#include <stdio.h>
#include <string.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/semaphore.h>
#include <nuttx/fs/fs.h>
#include <nuttx/drivers/drivers.h>
#include "up_arch.h"
#include "chip/stm32_rng.h"
#include "up_internal.h"
#if defined(CONFIG_STM32F7_RNG)
#if defined(CONFIG_DEV_RANDOM) || defined(CONFIG_DEV_URANDOM_ARCH)
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static int stm32_rng_initialize(void);
static int stm32_rnginterrupt(int irq, void *context, FAR void *arg);
static void stm32_rngenable(void);
static void stm32_rngdisable(void);
static ssize_t stm32_rngread(struct file *filep, char *buffer, size_t);
/****************************************************************************
* Private Types
****************************************************************************/
struct rng_dev_s
{
sem_t rd_devsem; /* Threads can only exclusively access the RNG */
sem_t rd_readsem; /* To block until the buffer is filled */
char *rd_buf;
size_t rd_buflen;
uint32_t rd_lastval;
bool rd_first;
};
/****************************************************************************
* Private Data
****************************************************************************/
static struct rng_dev_s g_rngdev;
static const struct file_operations g_rngops =
{
0, /* open */
0, /* close */
stm32_rngread, /* read */
0, /* write */
0, /* seek */
0 /* ioctl */
#ifndef CONFIG_DISABLE_POLL
, 0 /* poll */
#endif
#ifndef CONFIG_DISABLE_PSEUDOFS_OPERATIONS
, 0 /* unlink */
#endif
};
/****************************************************************************
* Private functions
****************************************************************************/
/****************************************************************************
* Name: stm32_rng_initialize
****************************************************************************/
static int stm32_rng_initialize(void)
{
_info("Initializing RNG\n");
memset(&g_rngdev, 0, sizeof(struct rng_dev_s));
sem_init(&g_rngdev.rd_devsem, 0, 1);
if (irq_attach(STM32_IRQ_RNG, stm32_rnginterrupt, NULL))
{
/* We could not attach the ISR to the interrupt */
_info("Could not attach IRQ.\n");
return -EAGAIN;
}
return OK;
}
/****************************************************************************
* Name: stm32_rngenable
****************************************************************************/
static void stm32_rngenable(void)
{
uint32_t regval;
g_rngdev.rd_first = true;
/* Enable generation and interrupts */
regval = getreg32(STM32_RNG_CR);
regval |= RNG_CR_RNGEN;
regval |= RNG_CR_IE;
putreg32(regval, STM32_RNG_CR);
up_enable_irq(STM32_IRQ_RNG);
}
/****************************************************************************
* Name: stm32_rngdisable
****************************************************************************/
static void stm32_rngdisable(void)
{
uint32_t regval;
up_disable_irq(STM32_IRQ_RNG);
regval = getreg32(STM32_RNG_CR);
regval &= ~RNG_CR_IE;
regval &= ~RNG_CR_RNGEN;
putreg32(regval, STM32_RNG_CR);
}
/****************************************************************************
* Name: stm32_rnginterrupt
****************************************************************************/
static int stm32_rnginterrupt(int irq, void *context, FAR void *arg)
{
uint32_t rngsr;
uint32_t data;
rngsr = getreg32(STM32_RNG_SR);
if (rngsr & RNG_SR_CEIS) /* Check for clock error int stat */
{
/* Clear it, we will try again. */
putreg32(rngsr & ~RNG_SR_CEIS, STM32_RNG_SR);
return OK;
}
if (rngsr & RNG_SR_SEIS) /* Check for seed error in int stat */
{
uint32_t crval;
/* Clear seed error, then disable/enable the rng and try again. */
putreg32(rngsr & ~RNG_SR_SEIS, STM32_RNG_SR);
crval = getreg32(STM32_RNG_CR);
crval &= ~RNG_CR_RNGEN;
putreg32(crval, STM32_RNG_CR);
crval |= RNG_CR_RNGEN;
putreg32(crval, STM32_RNG_CR);
return OK;
}
if (!(rngsr & RNG_SR_DRDY)) /* Data ready must be set */
{
/* This random value is not valid, we will try again. */
return OK;
}
data = getreg32(STM32_RNG_DR);
/* As required by the FIPS PUB (Federal Information Processing Standard
* Publication) 140-2, the first random number generated after setting the
* RNGEN bit should not be used, but saved for comparison with the next
* generated random number. Each subsequent generated random number has to be
* compared with the previously generated number. The test fails if any two
* compared numbers are equal (continuous random number generator test).
*/
if (g_rngdev.rd_first)
{
g_rngdev.rd_first = false;
g_rngdev.rd_lastval = data;
return OK;
}
if (g_rngdev.rd_lastval == data)
{
/* Two subsequent same numbers, we will try again. */
return OK;
}
/* If we get here, the random number is valid. */
g_rngdev.rd_lastval = data;
if (g_rngdev.rd_buflen >= 4)
{
g_rngdev.rd_buflen -= 4;
*(uint32_t *)&g_rngdev.rd_buf[g_rngdev.rd_buflen] = data;
}
else
{
while (g_rngdev.rd_buflen > 0)
{
g_rngdev.rd_buf[--g_rngdev.rd_buflen] = (char)data;
data >>= 8;
}
}
if (g_rngdev.rd_buflen == 0)
{
/* Buffer filled, stop further interrupts. */
stm32_rngdisable();
sem_post(&g_rngdev.rd_readsem);
}
return OK;
}
/****************************************************************************
* Name: stm32_rngread
****************************************************************************/
static ssize_t stm32_rngread(struct file *filep, char *buffer, size_t buflen)
{
if (sem_wait(&g_rngdev.rd_devsem) != OK)
{
return -errno;
}
else
{
/* We've got the device semaphore, proceed with reading */
/* Initialize the operation semaphore with 0 for blocking until the
* buffer is filled from interrupts. The readsem semaphore is used
* for signaling and, hence, should not have priority inheritance
* enabled.
*/
sem_init(&g_rngdev.rd_readsem, 0, 0);
sem_setprotocol(&g_rngdev.rd_readsem, SEM_PRIO_NONE);
g_rngdev.rd_buflen = buflen;
g_rngdev.rd_buf = buffer;
/* Enable RNG with interrupts */
stm32_rngenable();
/* Wait until the buffer is filled */
sem_wait(&g_rngdev.rd_readsem);
/* Done with the operation semaphore */
sem_destroy(&g_rngdev.rd_readsem);
/* Free RNG via the device semaphore for next use */
sem_post(&g_rngdev.rd_devsem);
return buflen;
}
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: devrandom_register
*
* Description:
* Initialize the RNG hardware and register the /dev/random driver.
* Must be called BEFORE devurandom_register.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_DEV_RANDOM
void devrandom_register(void)
{
stm32_rng_initialize();
(void)register_driver("/dev/random", &g_rngops, 0444, NULL);
}
#endif
/****************************************************************************
* Name: devurandom_register
*
* Description:
* Register /dev/urandom
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_DEV_URANDOM_ARCH
void devurandom_register(void)
{
#ifndef CONFIG_DEV_RANDOM
stm32_rng_initialize();
#endif
(void)register_driver("/dev/urandom", &g_rngops, 0444, NULL);
}
#endif
#endif /* CONFIG_DEV_RANDOM || CONFIG_DEV_URANDOM_ARCH */
#endif /* CONFIG_STM32F7_RNG */

4
arch/arm/src/stm32l4/stm32l4_rng.c
View File

@ -145,7 +145,7 @@ static void stm32l4_rngenable(void)
up_enable_irq(STM32L4_IRQ_RNG);
}
static void stm32l4_rngdisable()
static void stm32l4_rngdisable(void)
{
uint32_t regval;
@ -261,7 +261,7 @@ static ssize_t stm32l4_rngread(struct file *filep, char *buffer, size_t buflen)
/* We've got the device semaphore, proceed with reading */
/* Initialize the operation semaphore with 0 for blocking until the
* buffer is filled from interrupts. The waitsem semaphore is used
* buffer is filled from interrupts. The readsem semaphore is used
* for signaling and, hence, should not have priority inheritance
* enabled.
*/

21
configs/Kconfig
View File

@ -2015,6 +2015,27 @@ config BOARD_RESET_ON_CRASH
If selected the board_crashdump should reset the machine after
saveing the state of the machine
config BOARD_ENTROPY_POOL
bool "Enable Board level storing of entropy pool structure"
default n
depends on CRYPTO_RANDOM_POOL
---help---
Entropy pool structure can be provided by board source.
Use for this is, for example, to allocate entropy pool
from special area of RAM which content is kept over
system reset.
config BOARD_INITRNGSEED
bool "Enable Board level initial seeding of entropy pool RNG"
default n
depends on CRYPTO_RANDOM_POOL
---help---
If enabled, entropy pool random number generator will call
board_init_rndseed() upon initialization. This function
can then provide early entropy seed to the pool through
entropy injection APIs provided at 'nuttx/random.h'.
#endif
config LIB_BOARDCTL
bool "Enable boardctl() interface"
default n

3
configs/arduino-due/nsh/defconfig
View File

@ -392,7 +392,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/avr32dev1/nsh/defconfig
View File

@ -242,7 +242,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/avr32dev1/ostest/defconfig
View File

@ -242,7 +242,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/bambino-200e/netnsh/defconfig
View File

@ -400,7 +400,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/bambino-200e/nsh/defconfig
View File

@ -385,7 +385,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/bambino-200e/usbnsh/defconfig
View File

@ -385,7 +385,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/c5471evm/httpd/defconfig
View File

@ -288,7 +288,8 @@ CONFIG_MAX_TASKS=64
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/c5471evm/nsh/defconfig
View File

@ -288,7 +288,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/cc3200-launchpad/nsh/defconfig
View File

@ -351,7 +351,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

6
configs/clicker2-stm32/Kconfig
View File

@ -7,16 +7,14 @@ if ARCH_BOARD_CLICKER2_STM32
config CLICKER2_STM32_MB1_SPI
bool "mikroBUS1 SPI"
default n if !STM32_SPI3
default y if STM32_SPI3
default n
select STM32_SPI3
---help---
Enable SPI support on mikroBUS1 (STM32 SPI3)
config CLICKER2_STM32_MB2_SPI
bool "mikroBUS2 SPI"
default n if !STM32_SPI2
default y if STM32_SPI2
default n
select STM32_SPI2
---help---
Enable SPI support on mikroBUS1 (STM32 SPI2)

52
configs/clicker2-stm32/README.txt
View File

@ -249,3 +249,55 @@ Configurations
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
usbnsh:
-------
This is another NSH example. If differs from other 'nsh' configurations
in that this configurations uses a USB serial device for console I/O.
Such a configuration is useful on the Clicker2 STM32 which has no
builtin RS-232 drivers.
NOTES:
1. This configuration does have USART3 output enabled and set up as
the system logging device:
CONFIG_SYSLOG_CHAR=y : Use a character device for system logging
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : USART3 will be /dev/ttyS0
However, there is nothing to generate SYLOG output in the default
configuration so nothing should appear on USART3 unless you enable
some debug output or enable the USB monitor.
2. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB
device will save encoded trace output in in-memory buffer; if the
USB monitor is enabled, that trace buffer will be periodically
emptied and dumped to the system logging device (USART3 in this
configuration):
CONFIG_USBDEV_TRACE=y : Enable USB trace feature
CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory
CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH
CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor
CONFIG_USBMONITOR=y : Enable the USB monitor daemon
CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
CONFIG_USBMONITOR_PRIORITY=50 : USB monitor daemon priority
CONFIG_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds
CONFIG_USBMONITOR_TRACEINIT=y : Enable TRACE output
CONFIG_USBMONITOR_TRACECLASS=y
CONFIG_USBMONITOR_TRACETRANSFERS=y
CONFIG_USBMONITOR_TRACECONTROLLER=y
CONFIG_USBMONITOR_TRACEINTERRUPTS=y
Using the Prolifics PL2303 Emulation
------------------------------------
You could also use the non-standard PL2303 serial device instead of
the standard CDC/ACM serial device by changing:
CONFIG_CDCACM=n : Disable the CDC/ACM serial device class
CONFIG_CDCACM_CONSOLE=n : The CDC/ACM serial device is NOT the console
CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled
CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console

42
configs/clicker2-stm32/nsh/defconfig
View File

@ -148,14 +148,10 @@ CONFIG_ARM_HAVE_MPU_UNIFIED=y
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDL is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYL is not set
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y
# CONFIG_ARMV7M_OABI_TOOLCHAIN is not set
CONFIG_ARMV7M_HAVE_STACKCHECK=y
# CONFIG_ARMV7M_STACKCHECK is not set
# CONFIG_ARMV7M_ITMSYSLOG is not set
# CONFIG_SERIAL_TERMIOS is not set
# CONFIG_USBHOST_BULK_DISABLE is not set
# CONFIG_USBHOST_INT_DISABLE is not set
# CONFIG_USBHOST_ISOC_DISABLE is not set
#
# STM32 Configuration Options
@ -414,7 +410,7 @@ CONFIG_STM32_HAVE_SPI3=y
# CONFIG_STM32_I2C1 is not set
# CONFIG_STM32_I2C2 is not set
# CONFIG_STM32_I2C3 is not set
CONFIG_STM32_OTGFS=y
# CONFIG_STM32_OTGFS is not set
# CONFIG_STM32_OTGHS is not set
CONFIG_STM32_PWR=y
# CONFIG_STM32_RNG is not set
@ -451,6 +447,7 @@ CONFIG_STM32_USART3=y
# Alternate Pin Mapping
#
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_FLASH_WORKAROUND_DATA_CACHE_CORRUPTION_ON_RWW is not set
# CONFIG_STM32_JTAG_DISABLE is not set
# CONFIG_STM32_JTAG_FULL_ENABLE is not set
# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
@ -504,11 +501,6 @@ CONFIG_STM32_USART3_SERIALDRIVER=y
#
# USB FS Host Configuration
#
CONFIG_STM32_OTGFS_RXFIFO_SIZE=128
CONFIG_STM32_OTGFS_NPTXFIFO_SIZE=96
CONFIG_STM32_OTGFS_PTXFIFO_SIZE=128
CONFIG_STM32_OTGFS_DESCSIZE=128
# CONFIG_STM32_OTGFS_SOFINTR is not set
#
# USB HS Host Configuration
@ -603,6 +595,8 @@ CONFIG_ARCH_IRQBUTTONS=y
#
# Board-Specific Options
#
# CONFIG_CLICKER2_STM32_MB1_SPI is not set
# CONFIG_CLICKER2_STM32_MB2_SPI is not set
# CONFIG_BOARD_CRASHDUMP is not set
CONFIG_LIB_BOARDCTL=y
# CONFIG_BOARDCTL_RESET is not set
@ -631,9 +625,9 @@ CONFIG_USEC_PER_TICK=10000
# CONFIG_CLOCK_MONOTONIC is not set
CONFIG_ARCH_HAVE_TIMEKEEPING=y
# CONFIG_JULIAN_TIME is not set
CONFIG_START_YEAR=2013
CONFIG_START_MONTH=1
CONFIG_START_DAY=1
CONFIG_START_YEAR=2017
CONFIG_START_MONTH=3
CONFIG_START_DAY=25
CONFIG_MAX_WDOGPARMS=2
CONFIG_PREALLOC_WDOGS=8
CONFIG_WDOG_INTRESERVE=1
@ -657,7 +651,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set
@ -843,18 +838,7 @@ CONFIG_USART3_2STOP=0
# CONFIG_USART3_DMA is not set
# CONFIG_PSEUDOTERM is not set
# CONFIG_USBDEV is not set
CONFIG_USBHOST=y
CONFIG_USBHOST_NPREALLOC=4
CONFIG_USBHOST_HAVE_ASYNCH=y
# CONFIG_USBHOST_ASYNCH is not set
# CONFIG_USBHOST_HUB is not set
# CONFIG_USBHOST_COMPOSITE is not set
CONFIG_USBHOST_MSC=y
# CONFIG_USBHOST_CDCACM is not set
# CONFIG_USBHOST_HIDKBD is not set
# CONFIG_USBHOST_HIDMOUSE is not set
# CONFIG_USBHOST_XBOXCONTROLLER is not set
# CONFIG_USBHOST_TRACE is not set
# CONFIG_USBHOST is not set
# CONFIG_HAVE_USBTRACE is not set
# CONFIG_DRIVERS_WIRELESS is not set
# CONFIG_DRIVERS_CONTACTLESS is not set
@ -901,10 +885,7 @@ CONFIG_FS_WRITABLE=y
# CONFIG_FS_NAMED_SEMAPHORES is not set
CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
# CONFIG_FS_RAMMAP is not set
CONFIG_FS_FAT=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FAT_MAXFNAME=32
# CONFIG_FS_FAT is not set
# CONFIG_FS_FATTIME is not set
# CONFIG_FAT_FORCE_INDIRECT is not set
# CONFIG_FAT_DMAMEMORY is not set
@ -1152,6 +1133,7 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
# CONFIG_EXAMPLES_USBSERIAL is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
# CONFIG_EXAMPLES_WEBSERVER is not set
# CONFIG_EXAMPLES_XBC_TEST is not set
#
# File System Utilities

13
configs/clicker2-stm32/src/clicker2-stm32.h
View File

@ -233,6 +233,17 @@
* Public Functions
************************************************************************************/
/****************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the Mikroe Clicker2 STM32
* board.
*
****************************************************************************/
void weak_function stm32_spidev_initialize(void);
/************************************************************************************
* Name: stm32_bringup
*
@ -254,7 +265,7 @@ int stm32_bringup(void);
*
* Description:
* Called from stm32_boardinitialize very early in inialization to setup USB-related
* GPIO pins for the Olimex STM32 P407 board.
* GPIO pins for the Mikroe Clicker2 STM32 board.
*
************************************************************************************/

11
configs/clicker2-stm32/src/stm32_boot.c
View File

@ -63,6 +63,17 @@
void stm32_boardinitialize(void)
{
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spidev_initialize() has been brought into the link.
*/
if (stm32_spidev_initialize)
{
stm32_spidev_initialize();
}
#endif
#ifdef CONFIG_STM32_OTGFS
/* Initialize USB if the 1) OTG FS controller is in the configuration and 2)
* disabled, and 3) the weak function stm32_usb_configure() has been brought

13
configs/clicker2-stm32/src/stm32_spi.c
View File

@ -135,7 +135,18 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
/* To be provided */
switch(devid)
{
#ifdef CONFIG_IEEE802154_MRF24J40
case SPIDEV_IEEE802154:
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB1_CS, !selected);
break;
#endif
default:
break;
}
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)

122
configs/clicker2-stm32/usbnsh/Make.defs Normal file
View File

@ -0,0 +1,122 @@
############################################################################
# configs/clicker2-stm32/usbnsh/Make.defs
#
# Copyright (C) 2017 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include ${TOPDIR}/.config
include ${TOPDIR}/tools/Config.mk
include ${TOPDIR}/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = flash.ld
ifeq ($(WINTOOL),y)
# Windows-native toolchains
DIRLINK = $(TOPDIR)/tools/copydir.sh
DIRUNLINK = $(TOPDIR)/tools/unlink.sh
MKDEP = $(TOPDIR)/tools/mkwindeps.sh
ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
MKDEP = $(TOPDIR)/tools/mkdeps$(HOSTEXEEXT)
ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/scripts/$(LDSCRIPT)
endif
CC = $(CROSSDEV)gcc
CXX = $(CROSSDEV)g++
CPP = $(CROSSDEV)gcc -E
LD = $(CROSSDEV)ld
AR = $(CROSSDEV)ar rcs
NM = $(CROSSDEV)nm
OBJCOPY = $(CROSSDEV)objcopy
OBJDUMP = $(CROSSDEV)objdump
ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHDEFINES =
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS = $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS = $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS = $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRADEFINES)
AFLAGS = $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
# Loadable module definitions
CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
LDMODULEFLAGS = -r -e module_initialize
ifeq ($(WINTOOL),y)
LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libc/modlib/gnu-elf.ld}"
else
LDMODULEFLAGS += -T $(TOPDIR)/libc/modlib/gnu-elf.ld
endif
ASMEXT = .S
OBJEXT = .o
LIBEXT = .a
EXEEXT =
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
HOSTCC = gcc
HOSTINCLUDES = -I.
HOSTCFLAGS = -Wall -Wstrict-prototypes -Wshadow -Wundef -g -pipe
HOSTLDFLAGS =

1354
configs/clicker2-stm32/usbnsh/defconfig Normal file
View File

File diff suppressed because it is too large Load Diff

80
configs/clicker2-stm32/usbnsh/setenv.sh Normal file
View File

@ -0,0 +1,80 @@
#!/bin/bash
# configs/clicker2-stm32/usbnsh/setenv.sh
#
# Copyright (C) 2017 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
if [ "$_" = "$0" ] ; then
echo "You must source this script, not run it!" 1>&2
exit 1
fi
WD=`pwd`
if [ ! -x "setenv.sh" ]; then
echo "This script must be executed from the top-level NuttX build directory"
exit 1
fi
if [ -z "${PATH_ORIG}" ]; then
export PATH_ORIG="${PATH}"
fi
# This is the Cygwin path to the location where I installed the CodeSourcery
# toolchain under windows. You will also have to edit this if you install
# the CodeSourcery toolchain in any other location
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery G++ Lite/bin"
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/CodeSourcery/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
# export TOOLCHAIN_BIN="/cygdrive/c/Users/MyName/MentorGraphics/Sourcery_CodeBench_Lite_for_ARM_EABI/bin"
# This is the location where I installed the ARM "GNU Tools for ARM Embedded Processors"
# You can this free toolchain here https://launchpad.net/gcc-arm-embedded
export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/GNU Tools ARM Embedded/4.9 2015q2/bin"
# This is the path to the location where I installed the devkitARM toolchain
# You can get this free toolchain from http://devkitpro.org/ or http://sourceforge.net/projects/devkitpro/
#export TOOLCHAIN_BIN="/cygdrive/c/Program Files (x86)/devkitARM/bin"
# These are the Cygwin paths to the locations where I installed the Atollic
# toolchain under windows. You will also have to edit this if you install
# the Atollic toolchain in any other location. /usr/bin is added before
# the Atollic bin path because there is are binaries named gcc.exe and g++.exe
# at those locations as well.
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for ARM Pro 2.3.0/ARMTools/bin"
#export TOOLCHAIN_BIN="/usr/bin:/cygdrive/c/Program Files (x86)/Atollic/TrueSTUDIO for STMicroelectronics STM32 Lite 2.3.0/ARMTools/bin"
# This is the Cygwin path to the location where I build the buildroot
# toolchain.
# export TOOLCHAIN_BIN="${WD}/../buildroot/build_arm_nofpu/staging_dir/bin"
# Add the path to the toolchain to the PATH varialble
export PATH="${TOOLCHAIN_BIN}:/sbin:/usr/sbin:${PATH_ORIG}"
echo "PATH : ${PATH}"

3
configs/cloudctrl/nsh/defconfig
View File

@ -661,7 +661,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/dk-tm4c129x/ipv6/defconfig
View File

@ -418,7 +418,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/dk-tm4c129x/nsh/defconfig
View File

@ -418,7 +418,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/ea3131/nsh/defconfig
View File

@ -311,7 +311,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/ea3131/pgnsh/defconfig
View File

@ -331,7 +331,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/ea3131/usbserial/defconfig
View File

@ -320,7 +320,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/ea3152/ostest/defconfig
View File

@ -307,7 +307,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/eagle100/httpd/defconfig
View File

@ -392,7 +392,8 @@ CONFIG_MAX_TASKS=8
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=0
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/eagle100/nsh/defconfig
View File

@ -397,7 +397,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/eagle100/nxflat/defconfig
View File

@ -377,7 +377,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/efm32-g8xx-stk/nsh/defconfig
View File

@ -342,7 +342,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/efm32gg-stk3700/nsh/defconfig
View File

@ -342,7 +342,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/ekk-lm3s9b96/nsh/defconfig
View File

@ -384,7 +384,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/esp32-core/nsh/defconfig
View File

@ -224,7 +224,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/esp32-core/ostest/defconfig
View File

@ -224,7 +224,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/esp32-core/smp/defconfig
View File

@ -226,7 +226,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/ez80f910200zco/httpd/defconfig
View File

@ -273,7 +273,8 @@ CONFIG_MAX_TASKS=8
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=0
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/ez80f910200zco/nsh/defconfig
View File

@ -273,7 +273,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/ez80f910200zco/poll/defconfig
View File

@ -273,7 +273,8 @@ CONFIG_MAX_TASKS=8
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=0
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/fire-stm32v2/nsh/defconfig
View File

@ -670,7 +670,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/freedom-k64f/netnsh/defconfig
View File

@ -413,7 +413,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/freedom-k64f/nsh/defconfig
View File

@ -408,7 +408,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/freedom-k66f/netnsh/defconfig
View File

@ -414,7 +414,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/freedom-k66f/nsh/defconfig
View File

@ -420,7 +420,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/freedom-kl25z/nsh/defconfig
View File

@ -319,7 +319,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=0
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/freedom-kl26z/nsh/defconfig
View File

@ -319,7 +319,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=0
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/hymini-stm32v/nsh/defconfig
View File

@ -627,7 +627,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/hymini-stm32v/nsh2/defconfig
View File

@ -646,7 +646,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/hymini-stm32v/usbmsc/defconfig
View File

@ -633,7 +633,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/hymini-stm32v/usbnsh/defconfig
View File

@ -620,7 +620,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/hymini-stm32v/usbserial/defconfig
View File

@ -624,7 +624,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/kwikstik-k40/ostest/defconfig
View File

@ -380,7 +380,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/launchxl-tms57004/nsh/defconfig
View File

@ -309,7 +309,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lincoln60/netnsh/defconfig
View File

@ -375,7 +375,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lincoln60/nsh/defconfig
View File

@ -353,7 +353,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lm3s6432-s2e/nsh/defconfig
View File

@ -379,7 +379,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lm3s6965-ek/discover/defconfig
View File

@ -389,7 +389,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lm3s6965-ek/nsh/defconfig
View File

@ -389,7 +389,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lm3s6965-ek/nx/defconfig
View File

@ -374,7 +374,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

2
configs/lm3s6965-ek/tcpecho/defconfig
View File

@ -378,7 +378,7 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lm3s8962-ek/nsh/defconfig
View File

@ -401,7 +401,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lm3s8962-ek/nx/defconfig
View File

@ -386,7 +386,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lm4f120-launchpad/nsh/defconfig
View File

@ -383,7 +383,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lpc4330-xplorer/nsh/defconfig
View File

@ -386,7 +386,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lpc4337-ws/nsh/defconfig
View File

@ -391,7 +391,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lpc4357-evb/nsh/defconfig
View File

@ -377,7 +377,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lpc4370-link2/nsh/defconfig
View File

@ -387,7 +387,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lpcxpresso-lpc1115/nsh/defconfig
View File

@ -291,7 +291,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=0
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lpcxpresso-lpc1768/nsh/defconfig
View File

@ -365,7 +365,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lpcxpresso-lpc1768/nx/defconfig
View File

@ -353,7 +353,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/lpcxpresso-lpc1768/usbmsc/defconfig
View File

@ -365,7 +365,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

2
configs/maple/nsh/defconfig
View File

@ -608,7 +608,7 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

2
configs/maple/nx/defconfig
View File

@ -639,7 +639,7 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

2
configs/maple/usbnsh/defconfig
View File

@ -614,7 +614,7 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/mbed/nsh/defconfig
View File

@ -354,7 +354,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/mcu123-lpc214x/composite/defconfig
View File

@ -302,7 +302,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/mcu123-lpc214x/nsh/defconfig
View File

@ -292,7 +292,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/mcu123-lpc214x/usbmsc/defconfig
View File

@ -302,7 +302,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/mcu123-lpc214x/usbserial/defconfig
View File

@ -301,7 +301,8 @@ CONFIG_MAX_TASKS=16
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/mikroe-stm32f4/fulldemo/defconfig
View File

@ -669,7 +669,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/mikroe-stm32f4/kostest/defconfig
View File

@ -671,7 +671,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

2
configs/mikroe-stm32f4/nsh/defconfig
View File

@ -647,7 +647,7 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/mikroe-stm32f4/nx/defconfig
View File

@ -620,7 +620,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/mikroe-stm32f4/nxlines/defconfig
View File

@ -620,7 +620,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/mikroe-stm32f4/nxtext/defconfig
View File

@ -620,7 +620,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/mikroe-stm32f4/usbnsh/defconfig
View File

@ -655,7 +655,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/mirtoo/nsh/defconfig
View File

@ -383,7 +383,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

3
configs/misoc/hello/defconfig
View File

@ -236,7 +236,8 @@ CONFIG_SCHED_WAITPID=y
#
# Pthread Options
#
# CONFIG_MUTEX_TYPES is not set
# CONFIG_PTHREAD_MUTEX_TYPES is not set
CONFIG_PTHREAD_MUTEX_ROBUST=y
CONFIG_NPTHREAD_KEYS=4
# CONFIG_PTHREAD_CLEANUP is not set
# CONFIG_CANCELLATION_POINTS is not set

Some files were not shown because too many files have changed in this diff Show More