Fix device configuration... now Mikroelektronika PIC32MX7 MMB board works.

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4794 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-06-01 19:07:17 +00:00
parent ebf8dd600e
commit ebb07b88c1
5 changed files with 15 additions and 3 deletions

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@ -2,7 +2,7 @@
* configs/pcblogic-pic32mx/include/board.h
* include/arch/board/board.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -53,6 +53,7 @@
#define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */
#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */
#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */
/* PLL configuration and resulting CPU clock.
* CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV

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@ -57,6 +57,7 @@
#define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */
#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */
#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */
/* PLL configuration and resulting CPU clock.
* CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV

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@ -58,6 +58,14 @@
#define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */
#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */
/* Clock modes */
#define BOARD_POSC_XTMODE 1 /* Resonator, crystal or resonator (XT) mode */
#undef BOARD_POSC_SWITCH /* Use FRC until POSC stabilizes, then switch */
#undef BOARD_POSC_FSCM /* Switch to FRC if POSC fails */
#define BOARD_SOSC_ENABLE 1 /* Enable Secondary Oscillator */
#define BOARD_SOSC_IESO 1 /* Internal External Switchover mode is enabled */
/* PLL configuration and resulting CPU clock.
* CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV
*/
@ -79,8 +87,8 @@
* PBCLOCK = CPU_CLOCK / PBDIV
*/
#define BOARD_PBDIV 2 /* Peripheral clock divisor (PBDIV) */
#define BOARD_PBCLOCK 40000000 /* Peripheral clock (PBCLK = 80MHz/2) */
#define BOARD_PBDIV 1 /* Peripheral clock divisor (PBDIV) */
#define BOARD_PBCLOCK 80000000 /* Peripheral clock (PBCLK = 80MHz/1) */
/* Watchdog pre-scaler (re-visit) */

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@ -53,6 +53,7 @@
#define BOARD_POSC_FREQ 20000000 /* Primary OSC XTAL frequency (20MHz) */
#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */
#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */
/* PLL configuration and resulting CPU clock.
* CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV

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@ -54,6 +54,7 @@
#define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */
#define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz)
* (Not present on my board) */
#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */
/* PLL configuration and resulting CPU clock.
* CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV