From ebb07b88c10d633aae95501b621d9929978d5077 Mon Sep 17 00:00:00 2001 From: patacongo Date: Fri, 1 Jun 2012 19:07:17 +0000 Subject: [PATCH] Fix device configuration... now Mikroelektronika PIC32MX7 MMB board works. git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4794 42af7a65-404d-4744-a932-0658087f49c3 --- configs/pcblogic-pic32mx/include/board.h | 3 ++- configs/pic32-starterkit/include/board.h | 1 + configs/pic32mx7mmb/include/board.h | 12 ++++++++++-- configs/sure-pic32mx/include/board.h | 1 + configs/ubw32/include/board.h | 1 + 5 files changed, 15 insertions(+), 3 deletions(-) diff --git a/configs/pcblogic-pic32mx/include/board.h b/configs/pcblogic-pic32mx/include/board.h index 839d3108c0..a47f989b76 100644 --- a/configs/pcblogic-pic32mx/include/board.h +++ b/configs/pcblogic-pic32mx/include/board.h @@ -2,7 +2,7 @@ * configs/pcblogic-pic32mx/include/board.h * include/arch/board/board.h * - * Copyright (C) 2011 Gregory Nutt. All rights reserved. + * Copyright (C) 2011-2012 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -53,6 +53,7 @@ #define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */ #define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */ +#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */ /* PLL configuration and resulting CPU clock. * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV diff --git a/configs/pic32-starterkit/include/board.h b/configs/pic32-starterkit/include/board.h index 043c166942..5b2880c77e 100644 --- a/configs/pic32-starterkit/include/board.h +++ b/configs/pic32-starterkit/include/board.h @@ -57,6 +57,7 @@ #define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */ #define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */ +#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */ /* PLL configuration and resulting CPU clock. * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV diff --git a/configs/pic32mx7mmb/include/board.h b/configs/pic32mx7mmb/include/board.h index 5c38867c87..a0a1615537 100644 --- a/configs/pic32mx7mmb/include/board.h +++ b/configs/pic32mx7mmb/include/board.h @@ -58,6 +58,14 @@ #define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */ #define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */ +/* Clock modes */ + +#define BOARD_POSC_XTMODE 1 /* Resonator, crystal or resonator (XT) mode */ +#undef BOARD_POSC_SWITCH /* Use FRC until POSC stabilizes, then switch */ +#undef BOARD_POSC_FSCM /* Switch to FRC if POSC fails */ +#define BOARD_SOSC_ENABLE 1 /* Enable Secondary Oscillator */ +#define BOARD_SOSC_IESO 1 /* Internal External Switchover mode is enabled */ + /* PLL configuration and resulting CPU clock. * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV */ @@ -79,8 +87,8 @@ * PBCLOCK = CPU_CLOCK / PBDIV */ -#define BOARD_PBDIV 2 /* Peripheral clock divisor (PBDIV) */ -#define BOARD_PBCLOCK 40000000 /* Peripheral clock (PBCLK = 80MHz/2) */ +#define BOARD_PBDIV 1 /* Peripheral clock divisor (PBDIV) */ +#define BOARD_PBCLOCK 80000000 /* Peripheral clock (PBCLK = 80MHz/1) */ /* Watchdog pre-scaler (re-visit) */ diff --git a/configs/sure-pic32mx/include/board.h b/configs/sure-pic32mx/include/board.h index 66ed642c64..7521c694ee 100644 --- a/configs/sure-pic32mx/include/board.h +++ b/configs/sure-pic32mx/include/board.h @@ -53,6 +53,7 @@ #define BOARD_POSC_FREQ 20000000 /* Primary OSC XTAL frequency (20MHz) */ #define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) */ +#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */ /* PLL configuration and resulting CPU clock. * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV diff --git a/configs/ubw32/include/board.h b/configs/ubw32/include/board.h index 6fb5dfcd28..da8ecc50ca 100644 --- a/configs/ubw32/include/board.h +++ b/configs/ubw32/include/board.h @@ -54,6 +54,7 @@ #define BOARD_POSC_FREQ 8000000 /* Primary OSC XTAL frequency (8MHz) */ #define BOARD_SOSC_FREQ 32768 /* Secondary OSC XTAL frequency (32.768KHz) * (Not present on my board) */ +#define BOARD_POSC_HSMODE 1 /* High-speed crystal (HS) mode */ /* PLL configuration and resulting CPU clock. * CPU_CLOCK = ((POSC_FREQ / IDIV) * MULT) / ODIV