sergiotarxz/nuttx
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

riscv/k230: revise canmv230:nsbi

Browse Source 
This revises ld-nuttsbi.script for easier use. It also adjusts
canmv230/nsbi to fit both k230d and k230 devices.

Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This commit is contained in:
Yanfeng Liu 2024-06-29 09:42:57 +08:00 committed by Xiang Xiao
parent ab51eae836
commit ed099f1cea
2 changed files with 52 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
boards/risc-v/k230/canmv230/configs/nsbi/defconfig
View File

@ -31,9 +31,9 @@ CONFIG_ARCH_HEAP_VBASE=0xC0200000
CONFIG_ARCH_INTERRUPTSTACK=3072 CONFIG_ARCH_INTERRUPTSTACK=3072
CONFIG_ARCH_KERNEL_STACKSIZE=3072 CONFIG_ARCH_KERNEL_STACKSIZE=3072
CONFIG_ARCH_PGPOOL_MAPPING=y CONFIG_ARCH_PGPOOL_MAPPING=y
CONFIG_ARCH_PGPOOL_PBASE=0x8600000 CONFIG_ARCH_PGPOOL_PBASE=0x6200000
CONFIG_ARCH_PGPOOL_SIZE=10485760 CONFIG_ARCH_PGPOOL_SIZE=14680064
CONFIG_ARCH_PGPOOL_VBASE=0x8600000 CONFIG_ARCH_PGPOOL_VBASE=0x6200000
CONFIG_ARCH_RISCV=y CONFIG_ARCH_RISCV=y
CONFIG_ARCH_TEXT_NPAGES=128 CONFIG_ARCH_TEXT_NPAGES=128
CONFIG_ARCH_TEXT_VBASE=0xC0000000 CONFIG_ARCH_TEXT_VBASE=0xC0000000
@ -76,7 +76,7 @@ CONFIG_NUTTSBI_MTIMECMP_BASE=0xf04004000
CONFIG_NUTTSBI_MTIME_BASE=0xf0400bff8 CONFIG_NUTTSBI_MTIME_BASE=0xf0400bff8
CONFIG_PATH_INITIAL="/system/bin" CONFIG_PATH_INITIAL="/system/bin"
CONFIG_RAM_SIZE=16777216 CONFIG_RAM_SIZE=16777216
CONFIG_RAM_START=0x8080000 CONFIG_RAM_START=0x6000000
CONFIG_RAW_BINARY=y CONFIG_RAW_BINARY=y
CONFIG_READLINE_CMD_HISTORY=y CONFIG_READLINE_CMD_HISTORY=y
CONFIG_RR_INTERVAL=200 CONFIG_RR_INTERVAL=200

53
boards/risc-v/k230/canmv230/scripts/ld-nuttsbi.script
View File

@ -18,16 +18,59 @@
* *
****************************************************************************/ ****************************************************************************/
#include <nuttx/config.h>
/* We use a linear layout of zones: kflash, ksram and pgpool. They are
* defined by CONFIG_RAM_xx and CONFIG_ARCH_PGPOOL_xx as below:
*
* |>--- CONFIG_RAM_SIZE ------------------------------------<|
* | |>- CONFIG_ARCH_PGPOOL_SIZE --<|
* +-------------+-------------+------------------------------+
* | kflash/text : ksram zone | pgpool zone |
* +-------------+-------------+------------------------------+
* ^CONFIG_RAM_START ^CONFIG_ARCH_PGPOOL_PBASE
*
* We require that:
*
* a) KRAM_TOTAL(= CONFIG_ARCH_PGPOOL_PBASE - CONFIG_RAM_START) > 0
* b) CONFIG_RAM_SIZE == CONFIG_ARCH_PGPOOL_SIZE + KRAM_TOTAL
*
* The split of kernel memory can be adjusted below via KSRAM_SIZE
* The script warns if PGPOOL doesn't end at end of configured RAM.
*/
#define PGRAM_ADDR (CONFIG_ARCH_PGPOOL_PBASE)
#define PGRAM_SIZE (CONFIG_ARCH_PGPOOL_SIZE)
#define PGRAM_END (PGRAM_ADDR + PGRAM_SIZE)
#define CFRAM_END (CONFIG_RAM_START + CONFIG_RAM_SIZE)
#if (PGRAM_ADDR < CONFIG_RAM_START) || (PGRAM_END > CFRAM_END)
#error "invalid RAM or PGPOOL config!"
#endif
#if (PGRAM_END < CFRAM_END)
#warning "wasted memory after PGPOOL!"
#endif
/* Adjust KSRAM_SIZE here for your needs */
#define KSRAM_SIZE (KRAM_TOTAL * 3 / 4)
#define KRAM_TOTAL (PGRAM_ADDR - KTEXT_ADDR)
#define KTEXT_SIZE (KRAM_TOTAL- KSRAM_SIZE)
#define KTEXT_ADDR (CONFIG_RAM_START)
#define KSRAM_ADDR (KTEXT_ADDR + KTEXT_SIZE)
MEMORY MEMORY
{ {
kflash (rx) : ORIGIN = 0x8000000, LENGTH = 384K /* w/ cache */ kflash (rx) : ORIGIN = KTEXT_ADDR, LENGTH = KTEXT_SIZE
ksram (rwx) : ORIGIN = 0x8080000, LENGTH = 128K /* w/ cache */ ksram (rwx) : ORIGIN = KSRAM_ADDR, LENGTH = KSRAM_SIZE
pgram (rwx) : ORIGIN = 0x8600000, LENGTH = 10M /* w/ cache */ pgram (rwx) : ORIGIN = PGRAM_ADDR, LENGTH = PGRAM_SIZE
} }
OUTPUT_ARCH("riscv") OUTPUT_ARCH("riscv")
/* Provide the kernel boundaries */ /* Boundaries referred in board memory map header */
__kflash_start = ORIGIN(kflash); __kflash_start = ORIGIN(kflash);
__kflash_size = LENGTH(kflash); __kflash_size = LENGTH(kflash);
@ -42,7 +85,7 @@ __pgheap_size = LENGTH(pgram);
SECTIONS SECTIONS
{ {
. = 0x8000000; . = KTEXT_ADDR;
.text : .text :
{ {