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arch/arm/src/stm32/stm32_serial.c: for flowcontrol use common idiom for enabling/disabling RX interrupts

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stm32f7, stm32h7, stm32l4 and stm32f0l0g0 do it this way and there is no
reason for classic stm32 to differ. Also manipulation of priv->ie was not
atomic with respect to interrupts.

Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
This commit is contained in:
Juha Niskanen 2020-11-17 13:34:55 +02:00 committed by David Sidrane
parent ee1c914277
commit ed7380d863
1 changed files with 8 additions and 9 deletions
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17
arch/arm/src/stm32/stm32_serial.c
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@ -2315,11 +2315,9 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev,
unsigned int nbuffered, bool upper)
{
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
#if !(defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS) && defined(CONFIG_STM32_FLOWCONTROL_BROKEN))
uint16_t ie;
#endif
#if defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS) && defined(CONFIG_STM32_FLOWCONTROL_BROKEN)
#if defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS) && \
defined(CONFIG_STM32_FLOWCONTROL_BROKEN)
if (priv->iflow && (priv->rts_gpio != 0))
{
/* Assert/de-assert nRTS set it high resume/stop sending */
@ -2363,9 +2361,7 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev,
* enable Rx interrupts.
*/
ie = priv->ie;
ie &= ~USART_CR1_RXNEIE;
up_restoreusartint(priv, ie);
uart_disablerxint(dev);
return true;
}
@ -2378,7 +2374,7 @@ static bool up_rxflowcontrol(struct uart_dev_s *dev,
* received.
*/
up_rxint(dev, true);
uart_enablerxint(dev);
}
}
#endif
@ -2477,8 +2473,11 @@ static void up_send(struct uart_dev_s *dev, int ch)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
#ifdef HAVE_RS485
if (priv->rs485_dir_gpio != 0)
stm32_gpiowrite(priv->rs485_dir_gpio, priv->rs485_dir_polarity);
{
stm32_gpiowrite(priv->rs485_dir_gpio, priv->rs485_dir_polarity);
}
#endif
up_serialout(priv, STM32_USART_TDR_OFFSET, (uint32_t)ch);
}