Add interrupt initialization logic

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1501 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2009-02-15 00:27:06 +00:00
parent 1b8bc0682a
commit ede5f9792e
3 changed files with 132 additions and 1 deletions

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@ -45,7 +45,7 @@ CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c \
CHIP_ASRCS = m16c_vectors.S
#CHIP_CSRCS = m16c_initialstate.c m16c_copystate.c m16c_lowputc.c m16c_irq.c \
# m16c_timerisr.c m16c_serial.c
CHIP_CSRCS = m16c_initialstate.c m16c_copystate.c
CHIP_CSRCS = m16c_initialstate.c m16c_copystate.c m16c_irq.c
ifneq ($(CONFIG_DISABLE_SIGNALS),y)
CHIP_CSRCS += m16c_schedulesigaction.c m16c_sigdeliver.c

127
arch/sh/src/m16c/m16c_irq.c Normal file
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@ -0,0 +1,127 @@
/****************************************************************************
* arch/sh/src/m16c/m16c_irq.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include "up_internal.h"
/****************************************************************************
* Private Definitions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/* This holds a references to the current interrupt level register storage
* structure. If is non-NULL only during interrupt processing.
*/
uint32 *current_regs; /* Actually a pointer to the beginning or a ubyte array */
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_irqinitialize
****************************************************************************/
void up_irqinitialize(void)
{
current_regs = NULL;
/* And finally, enable interrupts */
#ifndef CONFIG_SUPPRESS_INTERRUPTS
asm("fset i");
#endif
}
/****************************************************************************
* Name: up_disable_irq
*
* Description:
* On many architectures, there are three levels of interrupt enabling: (1)
* at the global level, (2) at the level of the interrupt controller,
* and (3) at the device level. In order to receive interrupts, they
* must be enabled at all three levels.
*
* This function implements disabling of the device specified by 'irq'
* at the interrupt controller level if supported by the architecture
* (irqsave() supports the global level, the device level is hardware
* specific).
*
****************************************************************************/
#ifndef CONFIG_ARCH_NOINTC
void up_disable_irq(int irq)
{
/* There are no ez80 interrupt controller settings to disable IRQs */
}
/****************************************************************************
* Name: up_enable_irq
*
* Description:
* This function implements enabling of the device specified by 'irq'
* at the interrupt controller level if supported by the architecture
* (irqsave() supports the global level, the device level is hardware
* specific).
*
****************************************************************************/
void up_enable_irq(int irq)
{
/* There are no ez80 interrupt controller settings to enable IRQs */
}
#endif /* CONFIG_ARCH_NOINTC */

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@ -45,6 +45,9 @@
# CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence,
# the board that supports the particular chip or SoC.
# CONFIG_ARCH_BOARD_name - for use in C code
# CONFIG_ARCH_NOINTC - define if the architecture does not
# support an interrupt controller or otherwise cannot support
# APIs like up_enable_irq() and up_disable_irq().
# CONFIG_ENDIAN_BIG - define if big endian (default is little endian)
# CONFIG_BOARD_LOOPSPERMSEC - for delay loops
# CONFIG_DRAM_SIZE - Describes the internal SRAM.
@ -62,6 +65,7 @@ CONFIG_ARCH_CHIP=m16c
CONFIG_ARCH_CHIP_M30262F8=y
CONFIG_ARCH_BOARD=skp16c26
CONFIG_ARCH_BOARD_SKP16C26=y
CONFIG_ARCH_NOINTC=y
CONFIG_ENDIAN_BIG=y
CONFIG_DRAM_SIZE=0x00800
CONFIG_DRAM_START=0x00400