arch/arm: Move ARCHCPUFLAGS to Toolchain.defs

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>

arch/Kconfig

@@ -325,6 +325,7 @@ config ARCH_HAVE_FPU
 config ARCH_HAVE_DPFPU
 	bool
 	default n
+	select ARCH_HAVE_FPU
 
 config ARCH_HAVE_LAZYFPU
 	bool

arch/arm/Kconfig

@@ -13,7 +13,7 @@ choice
 config ARCH_CHIP_A1X
 	bool "Allwinner A1X"
 	select ARCH_CORTEXA8
-	select ARCH_HAVE_FPU
+	select ARM_HAVE_NEON
 	select ARCH_HAVE_IRQPRIO
 	select ARCH_HAVE_LOWVECTORS
 	select ARCH_HAVE_FETCHADD
@@ -27,7 +27,7 @@ config ARCH_CHIP_A1X
 config ARCH_CHIP_AM335X
 	bool "TI AM335X"
 	select ARCH_CORTEXA8
-	select ARCH_HAVE_FPU
+	select ARM_HAVE_NEON
 	select ARCH_HAVE_IRQPRIO
 	select ARCH_HAVE_LOWVECTORS
 	select ARCH_HAVE_FETCHADD
@@ -82,7 +82,7 @@ config ARCH_CHIP_IMX6
 	select ARCH_CORTEXA9
 	select ARM_THUMB
 	select ARMV7A_HAVE_L2CC_PL310
-	select ARCH_HAVE_FPU
+	select ARM_HAVE_NEON
 	select ARCH_HAVE_TRUSTZONE
 	select ARCH_HAVE_LOWVECTORS
 	select ARCH_HAVE_FETCHADD
@@ -249,7 +249,6 @@ config ARCH_CHIP_S32K1XX
 config ARCH_CHIP_SAMA5
 	bool "Atmel SAMA5"
 	select ARCH_CORTEXA5
-	select ARCH_HAVE_FPU
 	select ARCH_HAVE_IRQPRIO
 	select ARCH_HAVE_LOWVECTORS
 	select ARCH_HAVE_FETCHADD
@@ -885,20 +884,38 @@ config ARM_HAVE_WFE_SEV
 	---help---
 		Use WFE and SEV instructions for spinlock to reduce power consumption
 
-config ARM_HAVE_FPU_D32
+config ARM_HAVE_DPFPU32
 	bool
-	select ARCH_HAVE_FPU
+	select ARCH_HAVE_DPFPU
 	default n
 	---help---
-		FPU implemented in the VFPv3-D32 format that supports
+		FPU implemented in the VFPv[3|4]-D32 format that supports
 		32 double-precision floating-point registers.
 
 config ARM_HAVE_NEON
 	bool
 	default n
+	select ARM_HAVE_DPFPU32
 	---help---
 		Decide whether support NEON instruction
 
+config ARM_FPU_ABI_SOFT
+	bool "Soft Float ABI"
+	default n
+	depends on ARCH_HAVE_FPU
+	---help---
+		Pass float value via integer register (-mfloat-abi=softfp) 
+
+config ARM_DPFPU32
+	bool "FPU with 32 double-precision register"
+	default y
+	depends on ARCH_DPFPU && ARM_HAVE_DPFPU32
+
+config ARM_NEON
+	bool "Advanced SIMD (NEON) Extension"
+	default y
+	depends on ARM_HAVE_NEON && ARM_DPFPU32
+
 config ARM_HAVE_MPU_UNIFIED
 	bool
 	default n

arch/arm/include/armv7-a/irq.h

@@ -136,7 +136,7 @@
 #  define REG_D15           (ARM_CONTEXT_REGS+30) /* D15 */
 #  define REG_S30           (ARM_CONTEXT_REGS+30) /* S30 */
 #  define REG_S31           (ARM_CONTEXT_REGS+31) /* S31 */
-#  ifdef CONFIG_ARM_HAVE_FPU_D32
+#  ifdef CONFIG_ARM_HAVE_DPFPU32
 #    define REG_D16         (ARM_CONTEXT_REGS+32) /* D16 */
 #    define REG_D17         (ARM_CONTEXT_REGS+34) /* D17 */
 #    define REG_D18         (ARM_CONTEXT_REGS+36) /* D18 */

arch/arm/include/armv7-r/irq.h

@@ -136,7 +136,7 @@
 #  define REG_D15           (ARM_CONTEXT_REGS+30) /* D15 */
 #  define REG_S30           (ARM_CONTEXT_REGS+30) /* S30 */
 #  define REG_S31           (ARM_CONTEXT_REGS+31) /* S31 */
-#  ifdef CONFIG_ARM_HAVE_FPU_D32
+#  ifdef CONFIG_ARM_HAVE_DPFPU32
 #    define REG_D16         (ARM_CONTEXT_REGS+32) /* D16 */
 #    define REG_D17         (ARM_CONTEXT_REGS+34) /* D17 */
 #    define REG_D18         (ARM_CONTEXT_REGS+36) /* D18 */

arch/arm/src/armv7-a/Toolchain.defs

@@ -56,21 +56,50 @@ endif
 #
 
 ifeq ($(CONFIG_ARM_THUMB),y)
-ARCHCPUFLAGS += -mthumb
+  ARCHCPUFLAGS += -mthumb
-endif
-
-ifeq ($(CONFIG_ARCH_FPU),y)
-ARCHCPUFLAGS += -mfloat-abi=hard
 endif
 
 ifeq ($(CONFIG_ARCH_CORTEXA5),y)
-ARCHCPUFLAGS += -mcpu=cortex-a5
+  ARCHCPUFLAGS += -mcpu=cortex-a5
 else ifeq ($(CONFIG_ARCH_CORTEXA7),y)
-ARCHCPUFLAGS += -mcpu=cortex-a7
+  ARCHCPUFLAGS += -mcpu=cortex-a7
 else ifeq ($(CONFIG_ARCH_CORTEXA8),y)
-ARCHCPUFLAGS += -mcpu=cortex-a8
+  ARCHCPUFLAGS += -mcpu=cortex-a8
 else ifeq ($(CONFIG_ARCH_CORTEXA9),y)
-ARCHCPUFLAGS += -mcpu=cortex-a9
+  ARCHCPUFLAGS += -mcpu=cortex-a9
+endif
+
+ifneq ($(CONFIG_ARM_DPFPU32),y)
+  ARCHFPUD16 = -d16
+endif
+
+# Cortex-A5  | -mfpu=vfpv4-fp16 | -mfpu=vfpv4-d16-fp16 | -mfpu=neon-fp16
+# Cortex-A7  | -mfpu=vfpv4      | -mfpu=vfpv4-d16      | -mfpu=neon-vfpv4
+# Cortex-A8  | -mfpu=vfpv3      |                      | -mfpu=neon (alias for neon-vfpv3)
+# Cortex-A9  | -mfpu=vfpv3-fp16 | -mfpu=vfpv3-d16-fp16 | -mfpu=neon-fp16
+# Cortex-A15 | -mfpu=vfpv4      |                      | -mfpu=neon-vfpv4
+
+ifeq ($(CONFIG_ARCH_FPU),y)
+  ifeq ($(CONFIG_ARM_FPU_ABI_SOFT),y)
+    ARCHCPUFLAGS += -mfloat-abi=softfp
+  else
+    ARCHCPUFLAGS += -mfloat-abi=hard
+  endif
+
+  ifeq ($(CONFIG_ARM_NEON),y)
+    ARCHNEON = neon-
+  endif
+  ifeq ($(CONFIG_ARCH_CORTEXA8),y)
+    ARCHFPU = vfpv3
+  else ifeq ($(CONFIG_ARCH_CORTEXA9),y)
+    ARCHFPU = vfpv3
+  else
+    ARCHFPU = vfpv4
+  endif
+  ARCHCPUFLAGS += -mfpu=$(ARCHNEON)$(ARCHFPU)$(ARCHFPUD16)
+
+else
+  ARCHFPUFLAGS += -mfloat-abi=soft
 endif
 
 ifeq ($(CONFIG_DEBUG_CUSTOMOPT),y)

arch/arm/src/armv7-a/arm_restorefpu.S

@@ -72,7 +72,7 @@ arm_restorefpu:
 	 * s0, s1, ... in increasing address order.
 	 */
 
-#ifdef CONFIG_ARM_HAVE_FPU_D32
+#ifdef CONFIG_ARM_DPFPU32
 	vldmia.64	r1!, {d0-d15}			/* Restore the full FP context */
 	vldmia.64	r1!, {d16-d31}
 #else

arch/arm/src/armv7-a/arm_savefpu.S

@@ -76,7 +76,7 @@ arm_savefpu:
 	 * s0, s1, ... in increasing address order.
 	 */
 
-#ifdef CONFIG_ARM_HAVE_FPU_D32
+#ifdef CONFIG_ARM_DPFPU32
 	vstmia.64	r1!, {d0-d15}			/* Save the full FP context */
 	vstmia.64	r1!, {d16-d31}
 #else

arch/arm/src/armv7-a/arm_saveusercontext.S

@@ -107,7 +107,7 @@ arm_saveusercontext:
 	 * s0, s1, ... in increasing address order.
 	 */
 
-#ifdef CONFIG_ARM_HAVE_FPU_D32
+#ifdef CONFIG_ARM_DPFPU32
 	vstmia.64	r1!, {d0-d15}		/* Save the full FP context */
 	vstmia.64	r1!, {d16-d31}
 #else

arch/arm/src/armv7-a/arm_tcbinfo.c

@@ -72,7 +72,7 @@ static const uint16_t g_reg_offs[] =
   TCB_REG_OFF(REG_D15),
 #endif
 
-#ifdef CONFIG_ARM_HAVE_FPU_D32
+#ifdef CONFIG_ARM_DPFPU32
   TCB_REG_OFF(REG_D16),
   TCB_REG_OFF(REG_D17),
   TCB_REG_OFF(REG_D18),

arch/arm/src/armv7-m/Toolchain.defs

@@ -88,22 +88,18 @@ ifeq ($(CONFIG_ARCH_CORTEXM4),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m4
   TOOLCHAIN_MARCH    := -march=armv7e-m
   ifeq ($(CONFIG_ARCH_FPU),y)
-    TOOLCHAIN_MFLOAT := -mfpu=fpv4-sp-d16 -mfloat-abi=hard
+    TOOLCHAIN_MFLOAT := -mfpu=fpv4-sp-d16
-  else
-    TOOLCHAIN_MFLOAT := -mfloat-abi=soft
   endif
 else ifeq ($(CONFIG_ARCH_CORTEXM7),y)
   TOOLCHAIN_ARM7EM   := y
   TOOLCHAIN_MTUNE    := -mtune=cortex-m7
   TOOLCHAIN_MARCH    := -march=armv7e-m
   ifeq ($(CONFIG_ARCH_FPU),y)
-  ifeq ($(CONFIG_ARCH_DPFPU),y)
+    ifeq ($(CONFIG_ARCH_DPFPU),y)
-    TOOLCHAIN_MFLOAT := -mfpu=fpv5-d16 -mfloat-abi=hard
+      TOOLCHAIN_MFLOAT := -mfpu=fpv5-d16
-  else
+    else
-    TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16 -mfloat-abi=hard
+      TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16
-  endif
+    endif
-  else
-    TOOLCHAIN_MFLOAT := -mfloat-abi=soft
   endif
 else # ifeq ($(CONFIG_ARCH_CORTEXM3),y)
   TOOLCHAIN_ARM7EM   := n
@@ -112,6 +108,16 @@ else # ifeq ($(CONFIG_ARCH_CORTEXM3),y)
   TOOLCHAIN_MFLOAT   := -mfloat-abi=soft
 endif
 
+ifeq ($(CONFIG_ARCH_FPU),y)
+  ifeq ($(CONFIG_ARM_FPU_ABI_SOFT),y)
+    TOOLCHAIN_MFLOAT += -mfloat-abi=softfp
+  else
+    TOOLCHAIN_MFLOAT += -mfloat-abi=hard
+  endif
+else
+  TOOLCHAIN_MFLOAT += -mfloat-abi=soft
+endif
+
 # NuttX buildroot under Linux or Cygwin
 
 ifeq ($(CONFIG_ARMV7M_TOOLCHAIN),BUILDROOT)

arch/arm/src/armv7-r/Toolchain.defs

@@ -67,6 +67,29 @@ else
   MAXOPTIMIZATION += -fomit-frame-pointer
 endif
 
+ifeq ($(CONFIG_ARCH_CORTEXR4),y)
+  ARCHCPUFLAGS += -mcpu=cortex-r4
+else ifeq ($(CONFIG_ARCH_CORTEXR5),y)
+  ARCHCPUFLAGS += -mcpu=cortex-r5
+else ifeq ($(CONFIG_ARCH_CORTEXR7),y)
+  ARCHCPUFLAGS += -mcpu=cortex-r7
+endif
+
+ifeq ($(CONFIG_ARCH_FPU),y)
+  ARCHCPUFLAGS += -mfpu=vfpv3-d16
+  ifeq ($(CONFIG_ARM_FPU_ABI_SOFT),y)
+    ARCHCPUFLAGS += -mfloat-abi=softfp
+  else
+    ARCHCPUFLAGS += -mfloat-abi=hard
+  endif
+else
+  ARCHCPUFLAGS += -mfloat-abi=soft
+endif
+
+ifeq ($(CONFIG_ENDIAN_BIG),y)
+  ARCHCPUFLAGS += -mbig-endian
+endif
+
 ifeq ($(CONFIG_ENDIAN_BIG),y)
   TARGET_ARCH := armeb
 else

arch/arm/src/armv7-r/arm_restorefpu.S

@@ -72,7 +72,7 @@ arm_restorefpu:
 	 * s0, s1, ... in increasing address order.
 	 */
 
-#ifdef CONFIG_ARM_HAVE_FPU_D32
+#ifdef CONFIG_ARM_DPFPU32
 	vldmia.64	r1!, {d0-d15}			/* Restore the full FP context */
 	vldmia.64	r1!, {d16-d31}
 #else

arch/arm/src/armv7-r/arm_savefpu.S

@@ -76,7 +76,7 @@ arm_savefpu:
 	 * s0, s1, ... in increasing address order.
 	 */
 
-#ifdef CONFIG_ARM_HAVE_FPU_D32
+#ifdef CONFIG_ARM_DPFPU32
 	vstmia.64	r1!, {d0-d15}			/* Save the full FP context */
 	vstmia.64	r1!, {d16-d31}
 #else

arch/arm/src/armv7-r/arm_saveusercontext.S

@@ -106,7 +106,7 @@ arm_saveusercontext:
 	 * s0, s1, ... in increasing address order.
 	 */
 
-#ifdef CONFIG_ARM_HAVE_FPU_D32
+#ifdef CONFIG_ARM_DPFPU32
 	vstmia.64	r1!, {d0-d15}		/* Save the full FP context */
 	vstmia.64	r1!, {d16-d31}
 #else

arch/arm/src/armv7-r/arm_tcbinfo.c

@@ -72,7 +72,7 @@ static const uint16_t g_reg_offs[] =
   TCB_REG_OFF(REG_D15),
 #endif
 
-#ifdef CONFIG_ARM_HAVE_FPU_D32
+#ifdef CONFIG_ARM_DPFPU32
   TCB_REG_OFF(REG_D16),
   TCB_REG_OFF(REG_D17),
   TCB_REG_OFF(REG_D18),

arch/arm/src/armv8-m/Toolchain.defs

@@ -90,28 +90,32 @@ else ifeq ($(CONFIG_ARCH_CORTEXM33),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m33
   TOOLCHAIN_MARCH    := -march=armv8-m.main+dsp
   ifeq ($(CONFIG_ARCH_FPU),y)
-    TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16 -mfloat-abi=hard
+    TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16
-  else
-    TOOLCHAIN_MFLOAT := -mfloat-abi=soft
   endif
 else ifeq ($(CONFIG_ARCH_CORTEXM35P),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m35p
   TOOLCHAIN_MARCH    := -march=armv8-m.main+dsp
   ifeq ($(CONFIG_ARCH_FPU),y)
-    TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16 -mfloat-abi=hard
+    TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16
-  else
-    TOOLCHAIN_MFLOAT := -mfloat-abi=soft
   endif
 else ifeq ($(CONFIG_ARCH_CORTEXM55),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m55
   TOOLCHAIN_MARCH    := -march=armv8.1-m.main+dsp
   ifeq ($(CONFIG_ARCH_FPU),y)
-    TOOLCHAIN_MFLOAT := -mfpu=fpv5-d16 -mfloat-abi=hard
+    TOOLCHAIN_MFLOAT := -mfpu=fpv5-d16
-  else
-    TOOLCHAIN_MFLOAT := -mfloat-abi=soft
   endif
 endif
 
+ifeq ($(CONFIG_ARCH_FPU),y)
+  ifeq ($(CONFIG_ARM_FPU_ABI_SOFT),y)
+    TOOLCHAIN_MFLOAT += -mfloat-abi=softfp
+  else
+    TOOLCHAIN_MFLOAT += -mfloat-abi=hard
+  endif
+else
+  TOOLCHAIN_MFLOAT += -mfloat-abi=soft
+endif
+
 # NuttX buildroot under Linux or Cygwin
 
 ifeq ($(CONFIG_ARMV8M_TOOLCHAIN),BUILDROOT)

arch/arm/src/sama5/Kconfig

@@ -193,6 +193,7 @@ config ARCH_CHIP_SAMA5D2
 	bool
 	default n
 	select ARMV7A_HAVE_L2CC_PL310
+	select ARM_HAVE_NEON
 	select SAMA5_HAVE_AESB
 	select ARCH_NAND_HWECC
 	select SAMA5_HAVE_EMACB
@@ -220,6 +221,7 @@ config ARCH_CHIP_SAMA5D2
 config ARCH_CHIP_SAMA5D3
 	bool
 	default n
+	select ARM_HAVE_DPFPU
 	select SAMA5_HAVE_DMA
 	select SAMA5_HAVE_PIOE
 	select SAMA5_HAVE_USART0
@@ -231,6 +233,7 @@ config ARCH_CHIP_SAMA5D4
 	bool
 	default n
 	select ARMV7A_HAVE_L2CC_PL310
+	select ARM_HAVE_NEON
 	select ARCH_NAND_HWECC
 	select SAMA5_HAVE_AESB
 	select SAMA5_HAVE_EMACB

boards/arm/a1x/pcduino-a10/scripts/Make.defs

@@ -34,7 +34,6 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
 endif
 
-ARCHCPUFLAGS = -mcpu=cortex-a8 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-common
 ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef

boards/arm/am335x/beaglebone-black/scripts/Make.defs

@@ -28,17 +28,6 @@ LDSCRIPT = sdram.ld
 
 ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
 
-ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
-ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
-
-ifeq ($(ARCHCCMAJOR),2)
-  OLDGCC = y
-else ifeq ($(ARCHCCMAJOR),3)
-  OLDGCC = y
-else
-  OLDGCC = n
-endif
-
 ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
   ARCHOPTIMIZATION = -g
 endif
@@ -47,12 +36,6 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
 endif
 
-ifeq ($(OLDGCC),n)
-  ARCHCPUFLAGS = -mcpu=cortex-a8 -mfpu=neon -mfloat-abi=softfp -ftree-vectorize
-else
-  ARCHCPUFLAGS = -mapcs-32 -march=arm7-a -msoft-float
-endif
-
 ARCHCFLAGS = -fno-common
 ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef

boards/arm/imx6/sabre-6quad/scripts/Make.defs

@@ -34,7 +34,6 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
 endif
 
-ARCHCPUFLAGS = -mcpu=cortex-a9 -mfpu=vfpv4-d16 -mthumb
 ARCHCFLAGS = -fno-common -ffunction-sections -fdata-sections
 ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef

boards/arm/lpc43xx/bambino-200e/README.txt

@@ -111,18 +111,6 @@ ports.
      CONFIG_ARCH_FPU=y
      CONFIG_ARMV7M_LAZYFPU=y
 
-CFLAGS
-------
-
-Only the recent toolchains have built-in support for the Cortex-M4 FPU.  You will see
-the following lines in each Make.defs file:
-
-  ifeq ($(CONFIG_ARCH_FPU),y)
-    ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-  else
-    ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
-  endif
-
 Bambino-200e Configuration Options
 ==================================
 

boards/arm/lpc43xx/lpc4330-xplorer/README.txt

@@ -363,18 +363,6 @@ ports.
      CONFIG_ARCH_FPU=y
      CONFIG_ARMV7M_LAZYFPU=y
 
-CFLAGS
-------
-
-Only the recent toolchains have built-in support for the Cortex-M4 FPU.  You will see
-the following lines in each Make.defs file:
-
-  ifeq ($(CONFIG_ARCH_FPU),y)
-    ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-  else
-    ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
-  endif
-
 LPC4330-Xplorer Configuration Options
 =====================================
 

boards/arm/lpc43xx/lpc4337-ws/README.txt

@@ -402,18 +402,6 @@ ports.
      CONFIG_ARCH_FPU=y
      CONFIG_ARMV7M_LAZYFPU=y
 
-CFLAGS
-------
-
-Only the recent toolchains have built-in support for the Cortex-M4 FPU.  You will see
-the following lines in each Make.defs file:
-
-  ifeq ($(CONFIG_ARCH_FPU),y)
-    ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-  else
-    ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
-  endif
-
 LPC4337-ws Configuration Options
 =====================================
 

boards/arm/lpc43xx/lpc4357-evb/README.txt

@@ -399,18 +399,6 @@ ports.
      CONFIG_ARCH_FPU=y
      CONFIG_ARMV7M_LAZYFPU=y
 
-CFLAGS
-------
-
-Only the recent toolchains have built-in support for the Cortex-M4 FPU.  You will see
-the following lines in each Make.defs file:
-
-  ifeq ($(CONFIG_ARCH_FPU),y)
-    ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-  else
-    ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
-  endif
-
 LPC4357-EVB Configuration Options
 =====================================
 

boards/arm/lpc43xx/lpc4370-link2/README.txt

@@ -402,18 +402,6 @@ ports.
      CONFIG_ARCH_FPU=y
      CONFIG_ARMV7M_LAZYFPU=y
 
-CFLAGS
-------
-
-Only the recent toolchains have built-in support for the Cortex-M4 FPU.  You will see
-the following lines in each Make.defs file:
-
-  ifeq ($(CONFIG_ARCH_FPU),y)
-    ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-  else
-    ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
-  endif
-
 LPC4370-Link2 Configuration Options
 =====================================
 

boards/arm/sama5/giant-board/scripts/Make.defs

@@ -44,7 +44,6 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
 endif
 
-ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-common
 ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef

boards/arm/sama5/sama5d2-xult/scripts/Make.defs

@@ -44,7 +44,6 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
 endif
 
-ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-common
 ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef

boards/arm/sama5/sama5d3-xplained/scripts/Make.defs

@@ -40,7 +40,6 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
 endif
 
-ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-common
 ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef

boards/arm/sama5/sama5d3x-ek/scripts/Make.defs

@@ -60,7 +60,6 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
 endif
 
-ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-common
 ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef

boards/arm/sama5/sama5d4-ek/configs/knsh/Make.defs

@@ -44,7 +44,6 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
 endif
 
-ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-common
 ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef

boards/arm/sama5/sama5d4-ek/scripts/Make.defs

@@ -44,7 +44,6 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
 endif
 
-ARCHCPUFLAGS = -mcpu=cortex-a5 -mfpu=vfpv4-d16
 ARCHCFLAGS = -fno-common
 ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef

boards/arm/stm32/mikroe-stm32f4/README.txt

@@ -168,18 +168,6 @@ all of these configurations is the MIO283QT-2.  But MIO283QT-9A is also
 supported and you can switch from the MIO283QT-2 to the MIO283QT-9A by simply
 modifying the NuttX configuration
 
-CFLAGS
-------
-
-Only recent GCC toolchains have built-in support for the Cortex-M4 FPU.  You will see
-the following lines in each Make.defs file:
-
-  ifeq ($(CONFIG_ARCH_FPU),y)
-    ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-  else
-    ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
-  endif
-
 Mikroe-STM32F4-specific Configuration Options
 ===============================================
 

boards/arm/stm32/stm3240g-eval/README.txt

@@ -178,18 +178,6 @@ There are two version of the FPU support built into the STM32 port.
      CONFIG_ARCH_FPU=y
      CONFIG_ARMV7M_LAZYFPU=y
 
-CFLAGS
-------
-
-Only recent GCC toolchains have built-in support for the Cortex-M4 FPU.  You will see
-the following lines in each Make.defs file:
-
-  ifeq ($(CONFIG_ARCH_FPU),y)
-    ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-  else
-    ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
-  endif
-
 FSMC SRAM
 =========
 

boards/arm/stm32/stm32f3discovery/README.txt

@@ -112,18 +112,6 @@ There are two version of the FPU support built into the STM32 port.
      CONFIG_ARCH_FPU=y
      CONFIG_ARMV7M_LAZYFPU=y
 
-CFLAGS
-------
-
-Only recent GCC toolchains have built-in support for the Cortex-M4 FPU.  You will see
-the following lines in each Make.defs file:
-
-  ifeq ($(CONFIG_ARCH_FPU),y)
-    ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-  else
-    ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
-  endif
-
 Debugging
 =========
 

boards/arm/stm32/stm32f429i-disco/README.txt

@@ -283,18 +283,6 @@ There are two version of the FPU support built into the STM32 port.
      CONFIG_ARCH_FPU=y
      CONFIG_ARMV7M_LAZYFPU=y
 
-CFLAGS
-------
-
-Only recent GCC toolchains have built-in support for the Cortex-M4 FPU.  You will see
-the following lines in each Make.defs file:
-
-  ifeq ($(CONFIG_ARCH_FPU),y)
-    ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-  else
-    ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
-  endif
-
 FMC SDRAM
 =========
 

boards/arm/stm32/stm32f4discovery/README.txt

@@ -336,18 +336,6 @@ There are two version of the FPU support built into the STM32 port.
      CONFIG_ARCH_FPU=y
      CONFIG_ARMV7M_LAZYFPU=y
 
-CFLAGS
-------
-
-Only recent GCC toolchains have built-in support for the Cortex-M4 FPU.  You will see
-the following lines in each Make.defs file:
-
-  ifeq ($(CONFIG_ARCH_FPU),y)
-    ARCHCPUFLAGS = -mcpu=cortex-m4 -mthumb -march=armv7e-m -mfpu=fpv4-sp-d16 -mfloat-abi=hard
-  else
-    ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
-  endif
-
 STM32F4DIS-BB
 =============
 

boards/arm/tms570/tms570ls31x-usb-kit/scripts/Make.defs

@@ -34,7 +34,6 @@ ifneq ($(CONFIG_DEBUG_NOOPT),y)
   ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing
 endif
 
-ARCHCPUFLAGS = -mcpu=cortex-r4f -march=armv7-r -mbig-endian -mfpu=vfpv3-d16 -mfloat-abi=hard
 ARCHCFLAGS = -fno-common
 ARCHCXXFLAGS = -fno-common -fno-exceptions -fcheck-new -fno-rtti
 ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef