diff --git a/configs/stm32f746-ws/include/board.h b/configs/stm32f746-ws/include/board.h
index b58542d120..d8c80f0677 100644
--- a/configs/stm32f746-ws/include/board.h
+++ b/configs/stm32f746-ws/include/board.h
@@ -167,7 +167,6 @@
 #define STM32_RCC_DCKCFGR2_CK48MSRC   RCC_DCKCFGR2_CK48MSEL_PLLSAI
 #define STM32_RCC_DCKCFGR2_SDMMCSRC   RCC_DCKCFGR2_SDMMCSEL_48MHZ
 #define STM32_RCC_DCKCFGR2_SDMMC2SRC  RCC_DCKCFGR2_SDMMC2SEL_48MHZ
-#define STM32_RCC_DCKCFGR2_DSISRC     RCC_DCKCFGR2_DSISEL_48MHZ
 
 /* Several prescalers allow the configuration of the two AHB buses, the
  * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum
diff --git a/configs/stm32f746g-disco/include/board.h b/configs/stm32f746g-disco/include/board.h
index e54698e768..0964e6b90f 100644
--- a/configs/stm32f746g-disco/include/board.h
+++ b/configs/stm32f746g-disco/include/board.h
@@ -199,7 +199,6 @@
 #define STM32_RCC_DCKCFGR2_CK48MSRC   RCC_DCKCFGR2_CK48MSEL_PLLSAI
 #define STM32_RCC_DCKCFGR2_SDMMCSRC   RCC_DCKCFGR2_SDMMCSEL_48MHZ
 #define STM32_RCC_DCKCFGR2_SDMMC2SRC  RCC_DCKCFGR2_SDMMC2SEL_48MHZ
-#define STM32_RCC_DCKCFGR2_DSISRC     RCC_DCKCFGR2_DSISEL_48MHZ
 
 /* Several prescalers allow the configuration of the two AHB buses, the
  * high-speed APB (APB2) and the low-speed APB (APB1) domains. The maximum