diff --git a/configs/kwikstik-k40/README.txt b/configs/kwikstik-k40/README.txt
index 7e89aa5288..387432e5c3 100644
--- a/configs/kwikstik-k40/README.txt
+++ b/configs/kwikstik-k40/README.txt
@@ -419,6 +419,8 @@ KwikStik-K40-specific Configuration Options
     CONFIG_KINETIS_UART4PRIO
     CONFIG_KINETIS_UART5PRIO
 
+    CONFIG_KINETIS_SDHC_PRIO
+
   PIN Interrupt Support
 
     CONFIG_GPIO_IRQ          -- Enable pin interrtup support.  Also needs
diff --git a/configs/kwikstik-k40/include/board.h b/configs/kwikstik-k40/include/board.h
index e709ea5aff..58b2cd2184 100755
--- a/configs/kwikstik-k40/include/board.h
+++ b/configs/kwikstik-k40/include/board.h
@@ -84,6 +84,36 @@
 #define BOARD_FLEXBUS_FREQ  (BOARD_MCG_FREQ / BOARD_OUTDIV3)
 #define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
 
+/* SDHC clocking ********************************************************************/
+
+/* SDCLK configurations corresponding to various modes of operation.   Formula is:
+ *
+ *   SDCLK  frequency = (base clock) / (prescaler * divisor)
+ *
+ * The SDHC module is always configure configured so that the core clock is the base
+ * clock.
+ */
+
+/* Identification mode:  400KHz = 96MHz / ( 16 * 15) */
+
+#define BOARD_SDHC_IDMODE_PRESCALER   SDHC_SYSCTL_SDCLKFS_DIV16
+#define BOARD_SDHC_IDMODE_DIVISOR     SDHC_SYSCTL_DVS_DIV(15)
+
+/* MMC normal mode: 16MHz  = 96MHz / (2 * 3) */
+
+#define BOARD_SDHC_MMCMODE_PRESCALER  SDHC_SYSCTL_SDCLKFS_DIV2
+#define BOARD_SDHC_MMCMODE_DIVISOR    SDHC_SYSCTL_DVS_DIV(3)
+
+/* SD normal mode (1-bit): 16MHz  = 96MHz / (2 * 3) */
+
+#define BOARD_SDHC_SD1MODE_PRESCALER  SDHC_SYSCTL_SDCLKFS_DIV2
+#define BOARD_SDHC_SD1MODE_DIVISOR    SDHC_SYSCTL_DVS_DIV(3)
+
+/* SD normal mode (4-bit): 24MHz  = 96MHz / (2 * 2) */
+
+#define BOARD_SDHC_SD4MODE_PRESCALER  SDHC_SYSCTL_SDCLKFS_DIV2
+#define BOARD_SDHC_SD4MODE_DIVISOR    SDHC_SYSCTL_DVS_DIV(2)
+
 /* LED definitions ******************************************************************/
 /* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */
 
diff --git a/configs/twr-k60n512/README.txt b/configs/twr-k60n512/README.txt
index a6fc5ec2d2..794820845e 100644
--- a/configs/twr-k60n512/README.txt
+++ b/configs/twr-k60n512/README.txt
@@ -561,6 +561,8 @@ TWR-K60N512-specific Configuration Options
     CONFIG_KINETIS_EMACRX_PRIO
     CONFIG_KINETIS_EMACMISC_PRIO
 
+    CONFIG_KINETIS_SDHC_PRIO
+
   PIN Interrupt Support
 
     CONFIG_GPIO_IRQ          -- Enable pin interrtup support.  Also needs
diff --git a/configs/twr-k60n512/include/board.h b/configs/twr-k60n512/include/board.h
index 9de17ef7a0..bea58470c6 100755
--- a/configs/twr-k60n512/include/board.h
+++ b/configs/twr-k60n512/include/board.h
@@ -85,6 +85,36 @@
 #define BOARD_FLEXBUS_FREQ  (BOARD_MCG_FREQ / BOARD_OUTDIV3)
 #define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
 
+/* SDHC clocking ********************************************************************/
+
+/* SDCLK configurations corresponding to various modes of operation.   Formula is:
+ *
+ *   SDCLK  frequency = (base clock) / (prescaler * divisor)
+ *
+ * The SDHC module is always configure configured so that the core clock is the base
+ * clock.
+ */
+
+/* Identification mode:  400KHz = 96MHz / ( 16 * 15) */
+
+#define BOARD_SDHC_IDMODE_PRESCALER   SDHC_SYSCTL_SDCLKFS_DIV16
+#define BOARD_SDHC_IDMODE_DIVISOR     SDHC_SYSCTL_DVS_DIV(15)
+
+/* MMC normal mode: 16MHz  = 96MHz / (2 * 3) */
+
+#define BOARD_SDHC_MMCMODE_PRESCALER  SDHC_SYSCTL_SDCLKFS_DIV2
+#define BOARD_SDHC_MMCMODE_DIVISOR    SDHC_SYSCTL_DVS_DIV(3)
+
+/* SD normal mode (1-bit): 16MHz  = 96MHz / (2 * 3) */
+
+#define BOARD_SDHC_SD1MODE_PRESCALER  SDHC_SYSCTL_SDCLKFS_DIV2
+#define BOARD_SDHC_SD1MODE_DIVISOR    SDHC_SYSCTL_DVS_DIV(3)
+
+/* SD normal mode (4-bit): 24MHz  = 96MHz / (2 * 2) */
+
+#define BOARD_SDHC_SD4MODE_PRESCALER  SDHC_SYSCTL_SDCLKFS_DIV2
+#define BOARD_SDHC_SD4MODE_DIVISOR    SDHC_SYSCTL_DVS_DIV(2)
+
 /* LED definitions ******************************************************************/
 /* The TWR-K60N512 has four LEDs:
  *