Very initial SDHC driver for Kinetis parts

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3901 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-08-21 16:00:32 +00:00
parent ed915f24cd
commit eea906efe3
4 changed files with 64 additions and 0 deletions

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@ -419,6 +419,8 @@ KwikStik-K40-specific Configuration Options
CONFIG_KINETIS_UART4PRIO
CONFIG_KINETIS_UART5PRIO
CONFIG_KINETIS_SDHC_PRIO
PIN Interrupt Support
CONFIG_GPIO_IRQ -- Enable pin interrtup support. Also needs

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@ -84,6 +84,36 @@
#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3)
#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
/* SDHC clocking ********************************************************************/
/* SDCLK configurations corresponding to various modes of operation. Formula is:
*
* SDCLK frequency = (base clock) / (prescaler * divisor)
*
* The SDHC module is always configure configured so that the core clock is the base
* clock.
*/
/* Identification mode: 400KHz = 96MHz / ( 16 * 15) */
#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16
#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15)
/* MMC normal mode: 16MHz = 96MHz / (2 * 3) */
#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
/* SD normal mode (1-bit): 16MHz = 96MHz / (2 * 3) */
#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
/* SD normal mode (4-bit): 24MHz = 96MHz / (2 * 2) */
#define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
#define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(2)
/* LED definitions ******************************************************************/
/* The KwikStik-K40 board has no MCU driven, GPIO-based LEDs */

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@ -561,6 +561,8 @@ TWR-K60N512-specific Configuration Options
CONFIG_KINETIS_EMACRX_PRIO
CONFIG_KINETIS_EMACMISC_PRIO
CONFIG_KINETIS_SDHC_PRIO
PIN Interrupt Support
CONFIG_GPIO_IRQ -- Enable pin interrtup support. Also needs

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@ -85,6 +85,36 @@
#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3)
#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
/* SDHC clocking ********************************************************************/
/* SDCLK configurations corresponding to various modes of operation. Formula is:
*
* SDCLK frequency = (base clock) / (prescaler * divisor)
*
* The SDHC module is always configure configured so that the core clock is the base
* clock.
*/
/* Identification mode: 400KHz = 96MHz / ( 16 * 15) */
#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV16
#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(15)
/* MMC normal mode: 16MHz = 96MHz / (2 * 3) */
#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
/* SD normal mode (1-bit): 16MHz = 96MHz / (2 * 3) */
#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
/* SD normal mode (4-bit): 24MHz = 96MHz / (2 * 2) */
#define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
#define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(2)
/* LED definitions ******************************************************************/
/* The TWR-K60N512 has four LEDs:
*