xtensa_testset.c: Simplify the test-set function and remove some old
comments. Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
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@ -56,8 +56,9 @@ static inline uint32_t xtensa_compareset(volatile uint32_t *addr,
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__asm__ __volatile__
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(
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"WSR %2, SCOMPARE1\n" /* Initialize SCOMPARE1 */
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"S32C1I %0, %1, 0\n" /* Store id into the lock, if the lock is the
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* same as comparel. Otherwise, no write-access */
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"S32C1I %0, %1, 0\n" /* Store the compare value into the lock,
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* if the lock is the same as compare1.
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* Otherwise, no write-access */
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: "=r"(set) : "r"(addr), "r"(compare), "0"(set)
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);
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@ -90,36 +91,10 @@ static inline uint32_t xtensa_compareset(volatile uint32_t *addr,
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spinlock_t up_testset(volatile spinlock_t *lock)
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{
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spinlock_t prev;
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/* Perform the 32-bit compare and set operation */
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prev = xtensa_compareset((volatile uint32_t *)lock,
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return xtensa_compareset((volatile uint32_t *)lock,
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SP_UNLOCKED, SP_LOCKED);
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/* xtensa_compareset() should return either SP_UNLOCKED if the spinlock
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* was locked or SP_LOCKED or possibly ~SP_UNLOCKED if the spinlock was
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* not locked:
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*
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* "In the RE-2013.0 release and after, there is a slight change in the
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* semantics of the S32C1I instruction. Nothing is changed about the
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* operation on memory. In rare cases the resulting value in register
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* at can be different in this and later releases. The rule still holds
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* that memory has been written if and only if the register result
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* equals SCOMPARE1.
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*
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* "The difference is that in some cases where memory has not been
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* written, the instruction returns ~SCOMPARE1 instead of the current
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* value of memory. Although this change can, in principle, affect
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* the operation of code, scanning all internal Cadence code produced
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* no examples where this change would change the operation of the
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* code."
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*
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* In any case, the return value of SP_UNLOCKED can be trusted and will
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* always mean that the spinlock was set.
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*/
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return (prev == SP_UNLOCKED) ? SP_UNLOCKED : SP_LOCKED;
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}
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#endif /* CONFIG_SPINLOCK */
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