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Cosmetic update to spacing and comments

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This commit is contained in:
Gregory Nutt 2014-10-26 11:25:47 -06:00
parent c392115fbd
commit eeccd16a54
1 changed files with 14 additions and 12 deletions
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26
arch/arm/src/efm32/efm32_spi.c
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@ -1248,13 +1248,14 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
unsent = nwords; unsent = nwords;
while (unrecvd > 0) while (unrecvd > 0)
{ {
/* Send data while there is space in the TX buffer. This should /* REVISIT: This might cause RX data overruns??? */
* provide some benefit when the depth of the TC buffer is > 1 /* Send data while there is space in the TX buffer. This should
*/ * provide some benefit when the depth of the TC buffer is > 1
*/
while ((spi_getreg(config, EFM32_USART_STATUS_OFFSET) & USART_STATUS_TXBL) != 0 && while ((spi_getreg(config, EFM32_USART_STATUS_OFFSET) & USART_STATUS_TXBL) != 0 &&
unsent > 0) unsent > 0)
{ {
/* Get the next word to write. Is there a source buffer? */ /* Get the next word to write. Is there a source buffer? */
if (src) if (src)
@ -1303,13 +1304,14 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
unsent = nwords; unsent = nwords;
while (unrecvd > 0) while (unrecvd > 0)
{ {
/* Send data while there is space in the TX buffer. This should /* REVISIT: This might cause RX data overruns??? */
* provide some benefit when the depth of the TC buffer is > 1 /* Send data while there is space in the TX buffer. This should
*/ * provide some benefit when the depth of the TC buffer is > 1
*/
while ((spi_getreg(config, EFM32_USART_STATUS_OFFSET) & USART_STATUS_TXBL) != 0 && while ((spi_getreg(config, EFM32_USART_STATUS_OFFSET) & USART_STATUS_TXBL) != 0 &&
unsent > 0) unsent > 0)
{ {
/* Get the next word to write. Is there a source buffer? */ /* Get the next word to write. Is there a source buffer? */
if (src) if (src)