1st cut at serial driver
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2445 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
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arch/arm/src/lpc313x/lpc313x_serial.c
Executable file
870
arch/arm/src/lpc313x/lpc313x_serial.c
Executable file
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/****************************************************************************
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* arch/arm/src/lpc313x/lpc313x_serial.c
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <unistd.h>
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#include <semaphore.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/serial.h>
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#include <arch/serial.h>
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#include "up_arch.h"
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#include "os_internal.h"
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#include "up_internal.h"
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#include "lpc313x_cgudriver.h"
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#include "lpc313x_uart.h"
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#ifdef CONFIG_USE_SERIALDRIVER
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct up_dev_s
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{
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uint8_t ier; /* Saved IER value */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static int up_setup(struct uart_dev_s *dev);
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static void up_shutdown(struct uart_dev_s *dev);
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static int up_attach(struct uart_dev_s *dev);
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static void up_detach(struct uart_dev_s *dev);
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static int up_interrupt(int irq, void *context);
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static int up_ioctl(struct file *filep, int cmd, unsigned long arg);
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static int up_receive(struct uart_dev_s *dev, uint32_t *status);
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static void up_rxint(struct uart_dev_s *dev, bool enable);
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static bool up_rxavailable(struct uart_dev_s *dev);
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static void up_send(struct uart_dev_s *dev, int ch);
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static void up_txint(struct uart_dev_s *dev, bool enable);
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static bool up_txready(struct uart_dev_s *dev);
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static bool up_txempty(struct uart_dev_s *dev);
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/****************************************************************************
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* Private Variables
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****************************************************************************/
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struct uart_ops_s g_uart_ops =
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{
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.setup = up_setup,
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.shutdown = up_shutdown,
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.attach = up_attach,
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.detach = up_detach,
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.ioctl = up_ioctl,
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.receive = up_receive,
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.rxint = up_rxint,
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.rxavailable = up_rxavailable,
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.send = up_send,
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.txint = up_txint,
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.txready = up_txready,
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.txempty = up_txempty,
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};
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/* I/O buffers */
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static char g_rxbuffer[CONFIG_UART_RXBUFSIZE];
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static char g_txbuffer[CONFIG_UART_TXBUFSIZE];
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/* This describes the state of the single LPC313X uart port. */
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static struct up_dev_s g_uartpriv;
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static uart_dev_t g_uartport =
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{
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.recv =
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{
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.size = CONFIG_UART_RXBUFSIZE,
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.buffer = g_rxbuffer,
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},
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.xmit =
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{
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.size = CONFIG_UART_TXBUFSIZE,
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.buffer = g_txbuffer,
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},
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.ops = &g_uart_ops,
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.priv = &g_uartpriv,
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_disableuartint
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****************************************************************************/
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static inline void up_disableuartint(struct up_dev_s *priv, uint8_t *ier)
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{
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if (ier)
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{
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*ier = priv->ier & UART_IER_ALLINTS;
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}
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priv->ier &= ~UART_IER_ALLINTS;
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putreg32((uint32_t)priv->ier, LPC313X_UART_IER);
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}
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/****************************************************************************
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* Name: up_restoreuartint
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****************************************************************************/
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static inline void up_restoreuartint(struct up_dev_s *priv, uint8_t ier)
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{
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priv->ier |= ier & UART_IER_ALLINTS;
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putreg32((uint32_t)priv->ier, LPC313X_UART_IER);
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}
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/****************************************************************************
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* Name: up_waittxready
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****************************************************************************/
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static inline void up_waittxready(struct up_dev_s *priv)
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{
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int tmp;
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/* Limit how long we will wait for the TX available condition */
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for (tmp = 1000 ; tmp > 0 ; tmp--)
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{
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/* Check if the tranmitter holding register (THR) is empty */
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if ((getreg32(LPC313X_UART_LSR) & UART_LSR_THRE) != 0)
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{
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/* The THR is empty, return */
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break;
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}
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}
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}
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/****************************************************************************
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* Name: up_enablebreaks
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****************************************************************************/
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static inline void up_enablebreaks(struct up_dev_s *priv, bool enable)
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{
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uint32_t_t lcr = getreg32(LPC313X_UART_LCR);
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if (enable)
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{
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lcr |= UART_LCR_BRKCTRL;
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}
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else
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{
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lcr &= ~UART_LCR_BRKCTRL;
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}
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putreg32(lcr, LPC313X_UART_LCR);
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}
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/****************************************************************************
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* Name: up_configbaud
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****************************************************************************/
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static inline void up_configbaud(void)
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{
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/* In a buckled-up, embedded system, there is no reason to constantly
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* calculate the following. The calculation can be skipped if the
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* MULVAL, DIVADDVAL, and DIVISOR values are provided in the configuration
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* file.
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*/
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#ifndef CONFIG_LPC313X_UART_MULVAL
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uint32_t qtrclk;
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uint32_t regval;
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/* Test values calculated for every multiplier/divisor combination */
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uint32_t tdiv;
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uint32_t terr;
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int tmulval;
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int tdivaddval;
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/* Optimal multiplier/divider values */
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uint32_t div = 0;
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uint32_t err = 100000;
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int mulval = 1;
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int divaddval = 0;
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/* Baud is generated using FDR and DLL-DLM registers
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*
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* baud = clock * (mulval/(mulval+divaddval) / (16 * div)
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*
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* Or
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*
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* div = (clock/16) * (mulval/(mulval+divaddval) / baud
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*
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* Where mulval = Fractional divider multiplier
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* divaddval = Fractional divider pre-scale div
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* div = DLL-DLM divisor
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*/
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/* Get UART block clock divided by 16 */
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qtrclk = lpc313x_clkfreq(CLKID_UARTUCLK, DOMAINID_UART) >> 4;
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/* Try every valid multiplier, tmulval (or until a perfect
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* match is found).
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*/
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for (tmulval = 1 ; tmulval <= 15 && err > 0; tmulval++)
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{
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/* Try every valid pre-scale div, tdivaddval (or until a perfect
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* match is found).
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*/
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for (tdivaddval = 0 ; tdivaddval <= 15 && err > 0; tdivaddval++)
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{
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/* Calculate the divisor with these fractional divider settings */
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uint32_t tmp = (tmulval * qtrclk) / ((tmulval + tdivaddval));
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tdiv = (tmp + (CONFIG_UART_BAUD>>1)) / CONFIG_UART_BAUD;
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/* Check if this candidate divisor is within a valid range */
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if (tdiv > 2 && tdiv < 0x10000)
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{
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/* Calculate the actual baud and the error */
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uint32_t actualbaud = tmp / tdiv;
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if (actualbaud <= CONFIG_UART_BAUD)
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{
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terr = CONFIG_UART_BAUD - actualbaud;
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}
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else
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{
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terr = actualbaud - CONFIG_UART_BAUD;
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}
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/* Is this the smallest error we have encountered? */
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if (terr < err)
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{
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/* Yes, save these settings as the new, candidate optimal settings */
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mulval = tmulval ;
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divaddval = tdivaddval;
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div = tdiv;
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err = terr;
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}
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}
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}
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}
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/* Set the Divisor Latch Access Bit (DLAB) to enable DLL/DLM access */
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regval = getreg32(LPV313X_UART_LCR);
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regval |= UART_LCR_DLAB
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putreg32(regval, LPV313X_UART_LCR);
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/* Configure the MS and LS DLAB registers */
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putreg32(div & UART_DLL_MASK, LPC313X_UART_DLL);
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putreg32((div >> 8) & UART_DLL_MASK, LPC313X_UART_DLM);\
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regval &~= UART_LCR_DLAB
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putreg32(regval, LPV313X_UART_LCR);
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/* Configure the Fractional Divider Register (FDR) */
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putreg32((mulval << UART_FDR_MULVAL_SHIFT) |
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(divaddval << UART_FDR_DIVADDVAL_SHIFT),
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LPC313X_UART_FRD);
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#else
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/* Set the Divisor Latch Access Bit (DLAB) to enable DLL/DLM access */
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regval = getreg32(LPV313X_UART_LCR);
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regval |= UART_LCR_DLAB
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putreg32(regval, LPV313X_UART_LCR);
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/* Configure the MS and LS DLAB registers */
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putreg32(CONFIG_LPC313X_UART_DIVISOR & UART_DLL_MASK, LPC313X_UART_DLL);
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putreg32((CONFIG_LPC313X_UART_DIVISOR >> 8) & UART_DLL_MASK, LPC313X_UART_DLM);\
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regval &~= UART_LCR_DLAB
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putreg32(regval, LPV313X_UART_LCR);
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/* Configure the Fractional Divider Register (FDR) */
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putreg32((CONFIG_LPC313X_UART_MULVAL << UART_FDR_MULVAL_SHIFT) |
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(CONFIG_LPC313X_UART_DIVADDVAL << UART_FDR_DIVADDVAL_SHIFT),
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LPC313X_UART_FRD);
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#endif
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}
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/****************************************************************************
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* Name: up_setup
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*
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* Description:
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* Configure the UART baud, bits, parity, fifos, etc. This method is called
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* the first time that the serial port is opened.
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*
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****************************************************************************/
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static int up_setup(struct uart_dev_s *dev)
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{
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#ifndef CONFIG_SUPPRESS_LPC313X_UART_CONFIG
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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uint32_t regval;
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/* Clear fifos */
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putreg32((UART_FCR_RXFIFORST|UART_FCR_TXFIFORST), LPC313X_UART_FCR);
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/* Set trigger */
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putreg32((UART_FCR_FIFOENABLE|UART_FCR_RXTRIGLEVEL_16), LPC313X_UART_FCR);
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/* Set up the IER */
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priv->ier = getreg32(LPC313X_UART_IER);
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/* Set up the LCR */
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regval = 0;
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#if CONFIG_UART_BITS == 5
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regval |= UART_LCR_WDLENSEL_5BITS;
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#elif CONFIG_UART_BITS == 6
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regval |= UART_LCR_WDLENSEL_6BITS;
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#elif CONFIG_UART_BITS == 7
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regval |= UART_LCR_WDLENSEL_7BITS;
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#else
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regval |= UART_LCR_WDLENSEL_8BITS;
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#endif
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#if CONFIG_UART_2STOP > 0
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regval |= UART_LCR_NSTOPBITS;
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#endif
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#if CONFIG_UART_PARITY == 1
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regval |= UART_LCR_PAREN;
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#elif CONFIG_UART_PARITY == 2)
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regval |= (UART_LCR_PAREVEN|UART_LCR_PAREN);
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#endif
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putreg32(regval, LPV313X_UART_LCR);
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/* Set the BAUD divisor */
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up_configbaud();
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/* Configure the FIFOs */
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putreg32((UART_FCR_RXTRIGLEVEL_16|UART_FCR_TXFIFORST|\
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UART_FCR_RXFIFORST|UART_FCR_FIFOENABLE),
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LPC313X_UART_FCR);
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/* The NuttX serial driver waits for the first THRE interrrupt before
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* sending serial data... However, it appears that the lpc313x hardware
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* does not generate that interrupt until a transition from not-empty
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* to empty. So, the current kludge here is to send one NULL at
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* startup to kick things off.
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*/
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putreg32('\0', LPC313X_UART_THR);
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#endif
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return OK;
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}
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/****************************************************************************
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* Name: up_shutdown
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*
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* Description:
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* Disable the UART. This method is called when the serial port is closed
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*
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****************************************************************************/
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static void up_shutdown(struct uart_dev_s *dev)
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{
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struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
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up_disableuartint(priv, NULL);
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}
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/****************************************************************************
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* Name: up_attach
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*
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* Description:
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* Configure the UART to operation in interrupt driven mode. This method
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* is called when the serial port is opened. Normally, this is just after
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* he the setup() method is called, however, the serial console may operate in
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* in a non-interrupt driven mode during the boot phase.
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*
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* RX and TX interrupts are not enabled when by the attach method (unless
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* the hardware supports multiple levels of interrupt enabling). The RX and TX
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* and TX interrupts are not enabled until the txint() and rxint() methods
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* are called.
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*
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****************************************************************************/
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static int up_attach(struct uart_dev_s *dev)
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{
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int ret;
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/* Attach and enable the IRQ */
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ret = irq_attach(LPC313X_IRQ_UART, up_interrupt);
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if (ret == OK)
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{
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/* Enable the interrupt (RX and TX interrupts are still disabled
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* in the UART
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*/
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up_enable_irq(LPC313X_IRQ_UART);
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}
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return ret;
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}
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/****************************************************************************
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* Name: up_detach
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*
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* Description:
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* Detach UART interrupts. This method is called when the serial port is
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* closed normally just before the shutdown method is called. The
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* exception is the serial console which is never shutdown.
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*
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****************************************************************************/
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static void up_detach(struct uart_dev_s *dev)
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{
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up_disable_irq(LPC313X_IRQ_UART);
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irq_detach(LPC313X_IRQ_UART);
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}
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/****************************************************************************
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* Name: up_interrupt
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*
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* Description:
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* This is the UART interrupt handler. It will be invoked when an
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* interrupt received on the UART irq. It should call uart_transmitchars
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* or uart_receivechar to perform the appropriate data transfers.
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*
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****************************************************************************/
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static int up_interrupt(int irq, void *context)
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{
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struct uart_dev_s *dev = &g_uartport;
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struct up_dev_s *priv = &g_uartpriv;
|
||||
uint8_t status;
|
||||
int passes;
|
||||
|
||||
/* Loop until there are no characters to be transferred or,
|
||||
* until we have been looping for a long time.
|
||||
*/
|
||||
|
||||
for (passes = 0; passes < 256; passes++)
|
||||
{
|
||||
/* Get the current UART status and check for loop
|
||||
* termination conditions
|
||||
*/
|
||||
|
||||
status = getreg32(LPC313X_UART_IIR);
|
||||
|
||||
/* The NO INTERRUPT should be zero if there are pending
|
||||
* interrupts
|
||||
*/
|
||||
|
||||
if ((status & UART_IIR_NOINT) != 0)
|
||||
{
|
||||
/* Break out of the loop when there is no longer a pending
|
||||
* interrupt
|
||||
*/
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
/* Handle the interrupt by its interrupt ID field */
|
||||
|
||||
switch (status & UART_IIR_INTID_MASK)
|
||||
{
|
||||
/* Handle incoming, receive bytes (with or without timeout) */
|
||||
|
||||
case UART_IIR_INTID_RDA: /* Received Data Available */
|
||||
case UART_IIR_INTID_TIMEOUT: /* Character time-out */
|
||||
{
|
||||
uart_recvchars(dev);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Handle outgoing, transmit bytes */
|
||||
|
||||
case UART_IIR_INTID_THRE: /* Transmitter Holding Register empty */
|
||||
{
|
||||
uart_xmitchars(dev);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Just clear modem status interrupts */
|
||||
|
||||
case UART_IIR_INTID_MS: /* Modem status */
|
||||
{
|
||||
/* Read the modem status register (MSR) to clear */
|
||||
|
||||
status = getreg32(LPC313X_UART_MSR);
|
||||
fvdbg("MSR: %02x\n", status);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Just clear any line status interrupts */
|
||||
|
||||
case UART_IIR_INTID_RLS: /* Receiver Line Status */
|
||||
{
|
||||
/* Read the line status register (LSR) to clear */
|
||||
|
||||
status = getreg32(LPC313X_UART_LSR);
|
||||
fvdbg("LSR: %02x\n", status);
|
||||
break;
|
||||
}
|
||||
|
||||
/* There should be no other values */
|
||||
|
||||
default:
|
||||
{
|
||||
dbg("Unexpected IIR: %02x\n", status);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_ioctl
|
||||
*
|
||||
* Description:
|
||||
* All ioctl calls will be routed through this method
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
|
||||
{
|
||||
struct inode *inode = filep->f_inode;
|
||||
struct uart_dev_s *dev = inode->i_private;
|
||||
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
||||
int ret = OK;
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case TIOCSERGSTRUCT:
|
||||
{
|
||||
struct up_dev_s *user = (struct up_dev_s*)arg;
|
||||
if (!user)
|
||||
{
|
||||
ret = -EINVAL;
|
||||
}
|
||||
else
|
||||
{
|
||||
memcpy(user, dev, sizeof(struct up_dev_s));
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
|
||||
{
|
||||
irqstate_t flags = irqsave();
|
||||
up_enablebreaks(priv, true);
|
||||
irqrestore(flags);
|
||||
}
|
||||
break;
|
||||
|
||||
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
|
||||
{
|
||||
irqstate_t flags;
|
||||
flags = irqsave();
|
||||
up_enablebreaks(priv, false);
|
||||
irqrestore(flags);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
errno = ENOTTY;
|
||||
ret = ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_receive
|
||||
*
|
||||
* Description:
|
||||
* Called (usually) from the interrupt level to receive one character from
|
||||
* the UART. Error bits associated with the receipt are provided in the
|
||||
* return 'status'.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int up_receive(struct uart_dev_s *dev, uint32_t *status)
|
||||
{
|
||||
uint32_t rbr;
|
||||
|
||||
*status = getreg32(LPC313X_UART_LSR);
|
||||
rbr = getreg32(LPC313X_UART_RBR);
|
||||
return rbr & 0xff;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_rxint
|
||||
*
|
||||
* Description:
|
||||
* Call to enable or disable RX interrupts
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void up_rxint(struct uart_dev_s *dev, bool enable)
|
||||
{
|
||||
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
||||
if (enable)
|
||||
{
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
priv->ier |= UART_IER_RDAINTEN;
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
priv->ier &= ~UART_IER_RDAINTEN;
|
||||
}
|
||||
putreg32(priv->ier, LPC313X_UART_IER);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_rxavailable
|
||||
*
|
||||
* Description:
|
||||
* Return true if the receive fifo is not empty
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static bool up_rxavailable(struct uart_dev_s *dev)
|
||||
{
|
||||
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
||||
return ((getreg32(LPC313X_UART_LSR) & UART_LSR_RDR) != 0);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_send
|
||||
*
|
||||
* Description:
|
||||
* This method will send one byte on the UART
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void up_send(struct uart_dev_s *dev, int ch)
|
||||
{
|
||||
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
||||
putreg32((uint32_t)ch, LPC313X_UART_THR);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_txint
|
||||
*
|
||||
* Description:
|
||||
* Call to enable or disable TX interrupts
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void up_txint(struct uart_dev_s *dev, bool enable)
|
||||
{
|
||||
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
||||
if (enable)
|
||||
{
|
||||
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
|
||||
priv->ier |= UART_IER_THREINTEN;
|
||||
#endif
|
||||
}
|
||||
else
|
||||
{
|
||||
priv->ier &= ~UART_IER_THREINTEN;
|
||||
}
|
||||
putreg32(priv->ier, LPC313X_UART_IER);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_txready
|
||||
*
|
||||
* Description:
|
||||
* Return true if the tranmsit fifo is not full
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static bool up_txready(struct uart_dev_s *dev)
|
||||
{
|
||||
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
||||
return ((getreg32(LPC313X_UART_LSR) & UART_LSR_THRE) != 0);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_txempty
|
||||
*
|
||||
* Description:
|
||||
* Return true if the transmit fifo is empty
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static bool up_txempty(struct uart_dev_s *dev)
|
||||
{
|
||||
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
|
||||
return ((getreg32(LPC313X_UART_LSR) & UART_LSR_TEMT) != 0);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Funtions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_earlyserialinit
|
||||
*
|
||||
* Description:
|
||||
* Performs the low level UART initialization early in debug so that the
|
||||
* serial console will be available during bootup (via up_putc). This must
|
||||
* be called before up_serialinit.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_earlyserialinit(void)
|
||||
{
|
||||
/* Enable UART system clock */
|
||||
|
||||
lpc313x_enableclock(CLKID_UARTAPBCLK);
|
||||
lpc313x_enableclock(CLKID_UARTUCLK);
|
||||
|
||||
/* Disable UART interrupts */
|
||||
|
||||
up_disableuartint(g_uartport.priv, NULL);
|
||||
|
||||
/* Configuration the serial console */
|
||||
|
||||
#if defined(CONFIG_UART_SERIAL_CONSOLE)
|
||||
g_uartport.isconsole = true;
|
||||
up_setup(&g_uartport);
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_serialinit
|
||||
*
|
||||
* Description:
|
||||
* Register serial console and serial ports. This assumes that
|
||||
* up_earlyserialinit was called previously.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void up_serialinit(void)
|
||||
{
|
||||
#if defined(CONFIG_UART_SERIAL_CONSOLE)
|
||||
(void)uart_register("/dev/console", &g_uartport);
|
||||
#endif
|
||||
(void)uart_register("/dev/ttyS0", &g_uartport);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_putc
|
||||
*
|
||||
* Description:
|
||||
* Provide priority, low-level access to support OS debug writes
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int up_putc(int ch)
|
||||
{
|
||||
struct up_dev_s *priv = g_uartpriv;
|
||||
uint8_t ier;
|
||||
|
||||
up_disableuartint(priv, &ier);
|
||||
up_waittxready(priv);
|
||||
putreg32((uint32_t)ch, LPC313X_UART_THR);
|
||||
|
||||
/* Check for LF */
|
||||
|
||||
if (ch == '\n')
|
||||
{
|
||||
/* Add CR */
|
||||
|
||||
up_waittxready(priv);
|
||||
putreg32('\r', LPC313X_UART_THR);
|
||||
}
|
||||
|
||||
up_waittxready(priv);
|
||||
up_restoreuartint(priv, ier);
|
||||
return ch;
|
||||
}
|
||||
|
||||
#else /* CONFIG_USE_SERIALDRIVER */
|
||||
|
||||
/****************************************************************************
|
||||
* Name: up_putc
|
||||
*
|
||||
* Description:
|
||||
* Provide priority, low-level access to support OS debug writes
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int up_putc(int ch)
|
||||
{
|
||||
/* Check for LF */
|
||||
|
||||
if (ch == '\n')
|
||||
{
|
||||
/* Add CR */
|
||||
|
||||
up_lowputc('\r');
|
||||
}
|
||||
|
||||
up_lowputc(ch);
|
||||
return ch;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_USE_SERIALDRIVER */
|
@ -134,6 +134,7 @@
|
||||
#define UART_IER_RLSINTEN (1 << 2) /* Bit 2: Receiver Line Status interrupt enable */
|
||||
#define UART_IER_THREINTEN (1 << 1) /* Bit 1: Transmitter Holding Register Empty interrupt enable */
|
||||
#define UART_IER_RDAINTEN (1 << 0) /* Bit 0: Receive Data Available interrupt enable */
|
||||
#define UART_IER_ALLINTS (0x1f)
|
||||
|
||||
/* Interrupt Identification Register IIR, address 0x15001008 */
|
||||
|
||||
@ -141,21 +142,21 @@
|
||||
#define UART_IIR_FIFOEN_MASK (3 << UART_IIR_FIFOEN_SHIFT)
|
||||
#define UART_IIR_INTID_SHIFT (1) /* Bits 1-3: Interrupt identification */
|
||||
#define UART_IIR_INTID_MASK (7 << UART_IIR_INTID_SHIFT)
|
||||
# define UART_IIR_INTID_MODEMSTATUS (0 << UART_IIR_INTID_SHIFT) /* Modem status */
|
||||
# define UART_IIR_INTID_THREMPTY (1 << UART_IIR_INTID_SHIFT) /* Transmitter Holding Register empty */
|
||||
# define UART_IIR_INTID_REVCDATA (2 << UART_IIR_INTID_SHIFT) /* Received Data Available */
|
||||
# define UART_IIR_INTID_LINESTATUS (3 << UART_IIR_INTID_SHIFT) /* Receiver Line Status */
|
||||
# define UART_IIR_INTID_MS (0 << UART_IIR_INTID_SHIFT) /* Modem status */
|
||||
# define UART_IIR_INTID_THRE (1 << UART_IIR_INTID_SHIFT) /* Transmitter Holding Register empty */
|
||||
# define UART_IIR_INTID_RDA (2 << UART_IIR_INTID_SHIFT) /* Received Data Available */
|
||||
# define UART_IIR_INTID_RLS (3 << UART_IIR_INTID_SHIFT) /* Receiver Line Status */
|
||||
# define UART_IIR_INTID_TIMEOUT (6 << UART_IIR_INTID_SHIFT) /* Character time-out */
|
||||
#define UART_IIR_INTSTATUS (1 << 0) /* Bit 0: 0 Interrupt status */
|
||||
#define UART_IIR_NOINT (1 << 0) /* Bit 0: Interrupt status, 1=no interrupt */
|
||||
|
||||
/* FIFO Control Register FCR, address 0x15001008 */
|
||||
|
||||
#define UART_FCR_RXTRIGLEVEL_SHIFT (6) /* Bits 6-7: 7:6 Receiver trigger level selection */
|
||||
#define UART_FCR_RXTRIGLEVEL_MASK (3 << UART_FCR_RXTRIGLEVEL_SHIFT)
|
||||
#define UART_FCR_RXTRIGLEVEL (0 << UART_FCR_RXTRIGLEVEL_SHIFT) /* Rx trigger at character 1 */
|
||||
#define UART_FCR_RXTRIGLEVEL (1 << UART_FCR_RXTRIGLEVEL_SHIFT) /* Rx trigger at character 16 */
|
||||
#define UART_FCR_RXTRIGLEVEL (2 << UART_FCR_RXTRIGLEVEL_SHIFT) /* Rx trigger at character 32 */
|
||||
#define UART_FCR_RXTRIGLEVEL (3 << UART_FCR_RXTRIGLEVEL_SHIFT) /* Rx trigger at character 56 */
|
||||
# define UART_FCR_RXTRIGLEVEL_1 (0 << UART_FCR_RXTRIGLEVEL_SHIFT) /* Rx trigger at character 1 */
|
||||
# define UART_FCR_RXTRIGLEVEL_16 (1 << UART_FCR_RXTRIGLEVEL_SHIFT) /* Rx trigger at character 16 */
|
||||
# define UART_FCR_RXTRIGLEVEL_32 (2 << UART_FCR_RXTRIGLEVEL_SHIFT) /* Rx trigger at character 32 */
|
||||
# define UART_FCR_RXTRIGLEVEL_56 (3 << UART_FCR_RXTRIGLEVEL_SHIFT) /* Rx trigger at character 56 */
|
||||
#define UART_FCR_DMAMODE (1 << 3) /* Bit 3: DMA mode select */
|
||||
#define UART_FCR_TXFIFORST (1 << 2) /* Bit 2: Transmitter FIFO reset */
|
||||
#define UART_FCR_RXFIFORST (1 << 1) /* Bit 1: Receiver FIFO reset */
|
||||
@ -171,10 +172,10 @@
|
||||
#define UART_LCR_NSTOPBITS (1 << 2) /* Bit 2: Number of stop bits selector */
|
||||
#define UART_LCR_WDLENSEL_SHIFT (0) /* Bits 0-1: Word length selector */
|
||||
#define UART_LCR_WDLENSEL_MASK (3 << UART_LCR_WDLENSEL_SHIFT)
|
||||
#define UART_LCR_WDLENSEL_5BITS (0 << UART_LCR_WDLENSEL_SHIFT) /* Char length=5 stopbits=1 or 1.5*/
|
||||
#define UART_LCR_WDLENSEL_6BITS (1 << UART_LCR_WDLENSEL_SHIFT) /* Char length=6 stopbits=1 or 2 */
|
||||
#define UART_LCR_WDLENSEL_7BITS (2 << UART_LCR_WDLENSEL_SHIFT) /* Char length=7 stopbits=1 or 2 */
|
||||
#define UART_LCR_WDLENSEL_8BITS (3 << UART_LCR_WDLENSEL_SHIFT) /* Char length=8 stopbits=1 or 2 */
|
||||
# define UART_LCR_WDLENSEL_5BITS (0 << UART_LCR_WDLENSEL_SHIFT) /* Char length=5 stopbits=1 or 1.5*/
|
||||
# define UART_LCR_WDLENSEL_6BITS (1 << UART_LCR_WDLENSEL_SHIFT) /* Char length=6 stopbits=1 or 2 */
|
||||
# define UART_LCR_WDLENSEL_7BITS (2 << UART_LCR_WDLENSEL_SHIFT) /* Char length=7 stopbits=1 or 2 */
|
||||
# define UART_LCR_WDLENSEL_8BITS (3 << UART_LCR_WDLENSEL_SHIFT) /* Char length=8 stopbits=1 or 2 */
|
||||
|
||||
/* Modem Control Register MCR, address 0x15001010 */
|
||||
|
||||
@ -192,7 +193,7 @@
|
||||
#define UART_LSR_FE (1 << 3) /* Bit 3: Framing error */
|
||||
#define UART_LSR_PE (1 << 2) /* Bit 2: Parity error */
|
||||
#define UART_LSR_OE (1 << 1) /* Bit 1: Overrun error */
|
||||
#define UART_LSR_DR (1 << 0) /* Bit 0: Data ready */
|
||||
#define UART_LSR_RDR (1 << 0) /* Bit 0: Read Data ready */
|
||||
|
||||
/* Modem Status Register MSR, address 0x15001018 */
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user