From 3c84aa3b5fedf2799e3bb1e44f0a823fe6033b04 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 17 Nov 2015 16:53:21 -0600 Subject: [PATCH 1/7] (Hopefully) cosmetic changes from review of recent merges for conformance to coding standard --- arch/arm/src/stm32/stm32_tim.h | 1 + arch/arm/src/stm32/stm32_tim_lowerhalf.c | 349 ++++++++++++----------- 2 files changed, 184 insertions(+), 166 deletions(-) diff --git a/arch/arm/src/stm32/stm32_tim.h b/arch/arm/src/stm32/stm32_tim.h index 768e709c66..2d3b01a683 100644 --- a/arch/arm/src/stm32/stm32_tim.h +++ b/arch/arm/src/stm32/stm32_tim.h @@ -201,6 +201,7 @@ int stm32_tim_deinit(FAR struct stm32_tim_dev_s * dev); * to indicate the nature of any failure. * ****************************************************************************/ + #ifdef CONFIG_TIMER int stm32_timer_initialize(FAR const char *devpath, int timer); #endif diff --git a/arch/arm/src/stm32/stm32_tim_lowerhalf.c b/arch/arm/src/stm32/stm32_tim_lowerhalf.c index 8c7c97d0ec..97910328ed 100644 --- a/arch/arm/src/stm32/stm32_tim_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_tim_lowerhalf.c @@ -52,9 +52,10 @@ #include "stm32_tim.h" #if defined(CONFIG_TIMER) && \ - ( defined(CONFIG_STM32_TIM1) || defined(CONFIG_STM32_TIM2) || defined(CONFIG_STM32_TIM3) || \ - defined(CONFIG_STM32_TIM4) || defined(CONFIG_STM32_TIM5) || defined(CONFIG_STM32_TIM6) || \ - defined(CONFIG_STM32_TIM7) || defined(CONFIG_STM32_TIM8) ) + (defined(CONFIG_STM32_TIM1) || defined(CONFIG_STM32_TIM2) || \ + defined(CONFIG_STM32_TIM3) || defined(CONFIG_STM32_TIM4) || \ + defined(CONFIG_STM32_TIM5) || defined(CONFIG_STM32_TIM6) || \ + defined(CONFIG_STM32_TIM7) || defined(CONFIG_STM32_TIM8) ) /**************************************************************************** * Pre-processor Definitions @@ -67,6 +68,7 @@ * driver state structure. This structure must be cast-compatible with the * timer_lowerhalf_s structure. */ + struct stm32_lowerhalf_s { const struct timer_ops_s *ops; /* Lower half operations */ @@ -81,11 +83,12 @@ struct stm32_lowerhalf_s ****************************************************************************/ /* Helper functions *********************************************************/ -static struct stm32_lowerhalf_s* stm32_get_lowerhalf(int timer); -static xcpt_t stm32_get_interrupt(int timer); +static struct stm32_lowerhalf_s* stm32_get_lowerhalf(int timer); +static xcpt_t stm32_get_interrupt(int timer); /* Interrupt handling *******************************************************/ + #ifdef CONFIG_STM32_TIM1 static int stm32_tim1_interrupt(int irq, FAR void *context); #endif @@ -132,17 +135,19 @@ static int stm32_tim14_interrupt(int irq, FAR void *context); static int stm32_timer_handler(struct stm32_lowerhalf_s* attr); /* "Lower half" driver methods **********************************************/ -static int stm32_start(struct timer_lowerhalf_s *lower); -static int stm32_stop(struct timer_lowerhalf_s *lower); -static int stm32_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout); -static tccb_t stm32_sethandler(struct timer_lowerhalf_s *lower, tccb_t handler); - +static int stm32_start(struct timer_lowerhalf_s *lower); +static int stm32_stop(struct timer_lowerhalf_s *lower); +static int stm32_settimeout(struct timer_lowerhalf_s *lower, + uint32_t timeout); +static tccb_t stm32_sethandler(struct timer_lowerhalf_s *lower, + tccb_t handler); /**************************************************************************** * Private Data ****************************************************************************/ /* "Lower half" driver methods */ + static const struct timer_ops_s g_timer_ops = { .start = stm32_start, @@ -213,87 +218,88 @@ static struct stm32_lowerhalf_s g_tim14_lowerHalf; * A pointer to the lower half structure on success, NULL on failure * ****************************************************************************/ + static struct stm32_lowerhalf_s* stm32_get_lowerhalf(int timer) { - struct stm32_lowerhalf_s* lower; + struct stm32_lowerhalf_s* lower; - switch(timer) - { + switch(timer) + { #ifdef CONFIG_STM32_TIM1 - case 1: - lower = &g_tim1_lowerHalf; - break; + case 1: + lower = &g_tim1_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM2 - case 2: - lower = &g_tim2_lowerHalf; - break; + case 2: + lower = &g_tim2_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM3 - case 3: - lower = &g_tim3_lowerHalf; - break; + case 3: + lower = &g_tim3_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM4 - case 4: - lower = &g_tim4_lowerHalf; - break; + case 4: + lower = &g_tim4_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM5 - case 5: - lower = &g_tim5_lowerHalf; - break; + case 5: + lower = &g_tim5_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM6 - case 6: - lower = &g_tim6_lowerHalf; - break; + case 6: + lower = &g_tim6_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM7 - case 7: - lower = &g_tim7_lowerHalf; - break; + case 7: + lower = &g_tim7_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM8 - case 8: - lower = &g_tim8_lowerHalf; - break; + case 8: + lower = &g_tim8_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM9 - case 9: - lower = &g_tim9_lowerHalf; - break; + case 9: + lower = &g_tim9_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM10 - case 10: - lower = &g_tim10_lowerHalf; - break; + case 10: + lower = &g_tim10_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM11 - case 11: - lower = &g_tim11_lowerHalf; - break; + case 11: + lower = &g_tim11_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM12 - case 12: - lower = &g_tim12_lowerHalf; - break; + case 12: + lower = &g_tim12_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM13 - case 13: - lower = &g_tim13_lowerHalf; - break; + case 13: + lower = &g_tim13_lowerHalf; + break; #endif #ifdef CONFIG_STM32_TIM14 - case 14: - lower = &g_tim14_lowerHalf; - break; + case 14: + lower = &g_tim14_lowerHalf; + break; #endif - default: - lower = 0; - } + default: + lower = 0; + } - return lower; + return lower; } /**************************************************************************** @@ -309,87 +315,88 @@ static struct stm32_lowerhalf_s* stm32_get_lowerhalf(int timer) * A pointer to the interrupt handler on success, NULL on failure * ****************************************************************************/ + static xcpt_t stm32_get_interrupt(int timer) { - xcpt_t intr; + xcpt_t intr; - switch(timer) - { + switch(timer) + { #ifdef CONFIG_STM32_TIM1 - case 1: - intr = stm32_tim1_interrupt; - break; + case 1: + intr = stm32_tim1_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM2 - case 2: - intr = stm32_tim2_interrupt; - break; + case 2: + intr = stm32_tim2_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM3 - case 3: - intr = stm32_tim3_interrupt; - break; + case 3: + intr = stm32_tim3_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM4 - case 4: - intr = stm32_tim4_interrupt; - break; + case 4: + intr = stm32_tim4_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM5 - case 5: - intr = stm32_tim5_interrupt; - break; + case 5: + intr = stm32_tim5_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM6 - case 6: - intr = stm32_tim6_interrupt; - break; + case 6: + intr = stm32_tim6_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM7 - case 7: - intr = stm32_tim7_interrupt; - break; + case 7: + intr = stm32_tim7_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM8 - case 8: - intr = stm32_tim8_interrupt; - break; + case 8: + intr = stm32_tim8_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM9 - case 9: - intr = stm32_tim9_interrupt; - break; + case 9: + intr = stm32_tim9_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM10 - case 10: - intr = stm32_tim10_interrupt; - break; + case 10: + intr = stm32_tim10_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM11 - case 11: - intr = stm32_tim11_interrupt; - break; + case 11: + intr = stm32_tim11_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM12 - case 12: - intr = stm32_tim12_interrupt; - break; + case 12: + intr = stm32_tim12_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM13 - case 13: - intr = stm32_tim13_interrupt; - break; + case 13: + intr = stm32_tim13_interrupt; + break; #endif #ifdef CONFIG_STM32_TIM14 - case 14: - intr = stm32_tim14_interrupt; - break; + case 14: + intr = stm32_tim14_interrupt; + break; #endif - default: - intr = 0; - } + default: + intr = 0; + } - return intr; + return intr; } /**************************************************************************** @@ -399,6 +406,7 @@ static xcpt_t stm32_get_interrupt(int timer) * Individual interrupt handlers for each timer * ****************************************************************************/ + #ifdef CONFIG_STM32_TIM1 static int stm32_tim1_interrupt(int irq, FAR void *context) { @@ -505,29 +513,30 @@ static int stm32_tim14_interrupt(int irq, FAR void *context) * * Input Parameters: * - * * Returned Values: * - * ****************************************************************************/ + static int stm32_timer_handler(struct stm32_lowerhalf_s* lower) { - STM32_TIM_ACKINT(lower->tim, 0); + STM32_TIM_ACKINT(lower->tim, 0); - uint32_t next_interval_us = 0; - int ret = (*lower->handlerUsr)(&next_interval_us); + uint32_t next_interval_us = 0; + int ret = (*lower->handlerUsr)(&next_interval_us); - if(ret == OK) - { - if(next_interval_us > 0) - STM32_TIM_SETPERIOD(lower->tim, next_interval_us); - } - else - { - stm32_stop(lower); - } + if(ret == OK) + { + if(next_interval_us > 0) + { + STM32_TIM_SETPERIOD(lower->tim, next_interval_us); + } + } + else + { + stm32_stop(lower); + } - return 0; + return 0; } /**************************************************************************** @@ -550,21 +559,22 @@ static int stm32_start(struct timer_lowerhalf_s *lower) struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower; if (!priv->started) - { - STM32_TIM_SETCLOCK(priv->tim, 1000000); // 1000000 Hz = 1 microsecond - STM32_TIM_SETMODE(priv->tim, STM32_TIM_MODE_UP); + { + STM32_TIM_SETCLOCK(priv->tim, 1000000); // 1000000 Hz = 1 microsecond + STM32_TIM_SETMODE(priv->tim, STM32_TIM_MODE_UP); - if(priv->handlerUsr) - { - STM32_TIM_SETISR(priv->tim, priv->handlerTim, 0); - STM32_TIM_ENABLEINT(priv->tim, 0); - } + if(priv->handlerUsr) + { + STM32_TIM_SETISR(priv->tim, priv->handlerTim, 0); + STM32_TIM_ENABLEINT(priv->tim, 0); + } - priv->started = true; - return OK; - } + priv->started = true; + return OK; + } /* Return EBUSY to indicate that the timer was already running */ + return -EBUSY; } @@ -588,15 +598,16 @@ static int stm32_stop(struct timer_lowerhalf_s *lower) struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower; if (priv->started) - { - STM32_TIM_SETMODE(priv->tim, STM32_TIM_MODE_DISABLED); - STM32_TIM_DISABLEINT(priv->tim, 0); - STM32_TIM_SETISR(priv->tim, 0, 0); - priv->started = false; - return OK; - } + { + STM32_TIM_SETMODE(priv->tim, STM32_TIM_MODE_DISABLED); + STM32_TIM_DISABLEINT(priv->tim, 0); + STM32_TIM_SETISR(priv->tim, 0, 0); + priv->started = false; + return OK; + } /* Return ENODEV to indicate that the timer was not running */ + return -ENODEV; } @@ -621,9 +632,9 @@ static int stm32_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout) struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower; if (priv->started) - { - return -EPERM; - } + { + return -EPERM; + } STM32_TIM_SETPERIOD(priv->tim, timeout); return OK; @@ -647,35 +658,37 @@ static int stm32_settimeout(struct timer_lowerhalf_s *lower, uint32_t timeout) * no previous function pointer. * ****************************************************************************/ -static tccb_t stm32_sethandler(struct timer_lowerhalf_s *lower, tccb_t newhandler) + +static tccb_t stm32_sethandler(struct timer_lowerhalf_s *lower, + tccb_t newhandler) { struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower; irqstate_t flags = irqsave(); /* Get the old handler return value */ + tccb_t oldhandler = priv->handlerUsr; /* Save the new handler */ + priv->handlerUsr = newhandler; if(newhandler) - { - STM32_TIM_SETISR(priv->tim, priv->handlerTim, 0); - STM32_TIM_ENABLEINT(priv->tim, 0); - } + { + STM32_TIM_SETISR(priv->tim, priv->handlerTim, 0); + STM32_TIM_ENABLEINT(priv->tim, 0); + } else - { - STM32_TIM_DISABLEINT(priv->tim, 0); - STM32_TIM_SETISR(priv->tim, 0, 0); - } + { + STM32_TIM_DISABLEINT(priv->tim, 0); + STM32_TIM_SETISR(priv->tim, 0, 0); + } irqrestore(flags); - return oldhandler; } - /**************************************************************************** * Public Functions ****************************************************************************/ @@ -704,28 +717,32 @@ int stm32_timer_initialize(FAR const char *devpath, int timer) memset(lower, 0, sizeof(struct stm32_lowerhalf_s)); /* Initialize the non-zero elements of lower half state structure */ + lower->ops = &g_timer_ops; lower->handlerTim = stm32_get_interrupt(timer); lower->tim = stm32_tim_init(timer); + if(!lower->tim) - { - return -EINVAL; - } + { + return -EINVAL; + } /* Register the timer driver as /dev/timerX. The returned value from * timer_register is a handle that could be used with timer_unregister(). * REVISIT: The returned handle is discard here. */ + void *drvr = timer_register(devpath, (struct timer_lowerhalf_s *)lower); if (!drvr) - { - /* The actual cause of the failure may have been a failure to allocate - * perhaps a failure to register the timer driver (such as if the - * 'depath' were not unique). We know here but we return EEXIST to - * indicate the failure (implying the non-unique devpath). - */ - return -EEXIST; - } + { + /* The actual cause of the failure may have been a failure to allocate + * perhaps a failure to register the timer driver (such as if the + * 'depath' were not unique). We know here but we return EEXIST to + * indicate the failure (implying the non-unique devpath). + */ + + return -EEXIST; + } return OK; } From a8ab72f97a172ed59b45d28048f296149119d461 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 17 Nov 2015 17:31:38 -0600 Subject: [PATCH 2/7] Fix some stylistic issues found by tools/nxstyle --- arch/arm/src/stm32/stm32_tim_lowerhalf.c | 28 ++++++++++++------------ 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/arm/src/stm32/stm32_tim_lowerhalf.c b/arch/arm/src/stm32/stm32_tim_lowerhalf.c index 97910328ed..645e1d7083 100644 --- a/arch/arm/src/stm32/stm32_tim_lowerhalf.c +++ b/arch/arm/src/stm32/stm32_tim_lowerhalf.c @@ -55,7 +55,7 @@ (defined(CONFIG_STM32_TIM1) || defined(CONFIG_STM32_TIM2) || \ defined(CONFIG_STM32_TIM3) || defined(CONFIG_STM32_TIM4) || \ defined(CONFIG_STM32_TIM5) || defined(CONFIG_STM32_TIM6) || \ - defined(CONFIG_STM32_TIM7) || defined(CONFIG_STM32_TIM8) ) + defined(CONFIG_STM32_TIM7) || defined(CONFIG_STM32_TIM8)) /**************************************************************************** * Pre-processor Definitions @@ -84,7 +84,7 @@ struct stm32_lowerhalf_s /* Helper functions *********************************************************/ -static struct stm32_lowerhalf_s* stm32_get_lowerhalf(int timer); +static struct stm32_lowerhalf_s *stm32_get_lowerhalf(int timer); static xcpt_t stm32_get_interrupt(int timer); /* Interrupt handling *******************************************************/ @@ -132,7 +132,7 @@ static int stm32_tim13_interrupt(int irq, FAR void *context); static int stm32_tim14_interrupt(int irq, FAR void *context); #endif -static int stm32_timer_handler(struct stm32_lowerhalf_s* attr); +static int stm32_timer_handler(struct stm32_lowerhalf_s *attr); /* "Lower half" driver methods **********************************************/ @@ -219,11 +219,11 @@ static struct stm32_lowerhalf_s g_tim14_lowerHalf; * ****************************************************************************/ -static struct stm32_lowerhalf_s* stm32_get_lowerhalf(int timer) +static struct stm32_lowerhalf_s *stm32_get_lowerhalf(int timer) { - struct stm32_lowerhalf_s* lower; + struct stm32_lowerhalf_s *lower; - switch(timer) + switch (timer) { #ifdef CONFIG_STM32_TIM1 case 1: @@ -320,7 +320,7 @@ static xcpt_t stm32_get_interrupt(int timer) { xcpt_t intr; - switch(timer) + switch (timer) { #ifdef CONFIG_STM32_TIM1 case 1: @@ -517,16 +517,16 @@ static int stm32_tim14_interrupt(int irq, FAR void *context) * ****************************************************************************/ -static int stm32_timer_handler(struct stm32_lowerhalf_s* lower) +static int stm32_timer_handler(struct stm32_lowerhalf_s *lower) { STM32_TIM_ACKINT(lower->tim, 0); uint32_t next_interval_us = 0; int ret = (*lower->handlerUsr)(&next_interval_us); - if(ret == OK) + if (ret == OK) { - if(next_interval_us > 0) + if (next_interval_us > 0) { STM32_TIM_SETPERIOD(lower->tim, next_interval_us); } @@ -560,10 +560,10 @@ static int stm32_start(struct timer_lowerhalf_s *lower) if (!priv->started) { - STM32_TIM_SETCLOCK(priv->tim, 1000000); // 1000000 Hz = 1 microsecond + STM32_TIM_SETCLOCK(priv->tim, 1000000); /* 1000000 Hz = 1 microsecond */ STM32_TIM_SETMODE(priv->tim, STM32_TIM_MODE_UP); - if(priv->handlerUsr) + if (priv->handlerUsr) { STM32_TIM_SETISR(priv->tim, priv->handlerTim, 0); STM32_TIM_ENABLEINT(priv->tim, 0); @@ -674,7 +674,7 @@ static tccb_t stm32_sethandler(struct timer_lowerhalf_s *lower, priv->handlerUsr = newhandler; - if(newhandler) + if (newhandler) { STM32_TIM_SETISR(priv->tim, priv->handlerTim, 0); STM32_TIM_ENABLEINT(priv->tim, 0); @@ -722,7 +722,7 @@ int stm32_timer_initialize(FAR const char *devpath, int timer) lower->handlerTim = stm32_get_interrupt(timer); lower->tim = stm32_tim_init(timer); - if(!lower->tim) + if (!lower->tim) { return -EINVAL; } From 4999c1408598b0193af2b5e7c7e5f3ea82e4d356 Mon Sep 17 00:00:00 2001 From: Marwan Ragab Date: Tue, 17 Nov 2015 21:34:41 -0500 Subject: [PATCH 3/7] Added implementation to get 96-bit stm32 unique id --- arch/arm/include/stm32/stm32_uid.h | 43 ++++++++++++++++++++++++++++ arch/arm/src/stm32/Make.defs | 2 +- arch/arm/src/stm32/stm32_uid.c | 46 ++++++++++++++++++++++++++++++ 3 files changed, 90 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/stm32/stm32_uid.h create mode 100644 arch/arm/src/stm32/stm32_uid.c diff --git a/arch/arm/include/stm32/stm32_uid.h b/arch/arm/include/stm32/stm32_uid.h new file mode 100644 index 0000000000..231f5b1a71 --- /dev/null +++ b/arch/arm/include/stm32/stm32_uid.h @@ -0,0 +1,43 @@ +/************************************************************************************ + * arch/arm/include/stm32/stm32_uid.h + * + * Copyright (C) 2015 Marawan Ragab. All rights reserved. + * Author: Marawan Ragab + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#ifndef __ARCH_ARM_INCLUDE_STM32_UID_H +#define __ARCH_ARM_INCLUDE_STM32_UID_H + +#include + +void stm32GetUniqueID(uint8_t uniqueID[12]); + +#endif /* __ARCH_ARM_INCLUDE_STM32_UID_H */ diff --git a/arch/arm/src/stm32/Make.defs b/arch/arm/src/stm32/Make.defs index 8563141bb9..e1b4d6d9fd 100644 --- a/arch/arm/src/stm32/Make.defs +++ b/arch/arm/src/stm32/Make.defs @@ -109,7 +109,7 @@ CHIP_ASRCS = CHIP_CSRCS = stm32_allocateheap.c stm32_start.c stm32_rcc.c stm32_lse.c CHIP_CSRCS += stm32_lsi.c stm32_gpio.c stm32_exti_gpio.c stm32_flash.c stm32_irq.c CHIP_CSRCS += stm32_dma.c stm32_lowputc.c stm32_serial.c stm32_spi.c -CHIP_CSRCS += stm32_sdio.c stm32_tim.c stm32_waste.c stm32_ccm.c +CHIP_CSRCS += stm32_sdio.c stm32_tim.c stm32_waste.c stm32_ccm.c stm32_uid.c ifeq ($(CONFIG_TIMER),y) CHIP_CSRCS += stm32_tim_lowerhalf.c diff --git a/arch/arm/src/stm32/stm32_uid.c b/arch/arm/src/stm32/stm32_uid.c new file mode 100644 index 0000000000..52d9bd2ad4 --- /dev/null +++ b/arch/arm/src/stm32/stm32_uid.c @@ -0,0 +1,46 @@ +/************************************************************************************ + * arch/arm/src/stm32/stm32_uid.c + * + * Copyright (C) 2015 Marawan Ragab. All rights reserved. + * Author: Marawan Ragab + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +#include +#include + +void stm32GetUniqueID(uint8_t uniqueID[12]) +{ + int i; + for(i=0; i<12; i++) + { + uniqueID[i] = *((uint8_t*)(STM32_SYSMEM_UID)+i); + } +} From a6d6c430d9886e1b8182178c654a730c56290045 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 17 Nov 2015 21:10:17 -0600 Subject: [PATCH 4/7] Changes to last merge from review for compliance to coding standards --- arch/arm/src/stm32/stm32_uid.c | 25 ++++++++++++++------- arch/arm/{include => src}/stm32/stm32_uid.h | 18 ++++++++++----- 2 files changed, 30 insertions(+), 13 deletions(-) rename arch/arm/{include => src}/stm32/stm32_uid.h (75%) diff --git a/arch/arm/src/stm32/stm32_uid.c b/arch/arm/src/stm32/stm32_uid.c index 52d9bd2ad4..d38447726f 100644 --- a/arch/arm/src/stm32/stm32_uid.c +++ b/arch/arm/src/stm32/stm32_uid.c @@ -33,14 +33,23 @@ * ************************************************************************************/ -#include -#include +/************************************************************************************ + * Included Files + ************************************************************************************/ -void stm32GetUniqueID(uint8_t uniqueID[12]) +#include +#include "stm32_uid.h" + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +void stm32_get_uniqueid(uint8_t uniqueid[12]) { - int i; - for(i=0; i<12; i++) - { - uniqueID[i] = *((uint8_t*)(STM32_SYSMEM_UID)+i); - } + int i; + + for (i = 0; i < 12; i++) + { + uniqueid[i] = *((uint8_t*)(STM32_SYSMEM_UID)+i); + } } diff --git a/arch/arm/include/stm32/stm32_uid.h b/arch/arm/src/stm32/stm32_uid.h similarity index 75% rename from arch/arm/include/stm32/stm32_uid.h rename to arch/arm/src/stm32/stm32_uid.h index 231f5b1a71..cfa0446110 100644 --- a/arch/arm/include/stm32/stm32_uid.h +++ b/arch/arm/src/stm32/stm32_uid.h @@ -1,5 +1,5 @@ /************************************************************************************ - * arch/arm/include/stm32/stm32_uid.h + * arch/arm/src/stm32/stm32_uid.h * * Copyright (C) 2015 Marawan Ragab. All rights reserved. * Author: Marawan Ragab @@ -33,11 +33,19 @@ * ************************************************************************************/ -#ifndef __ARCH_ARM_INCLUDE_STM32_UID_H -#define __ARCH_ARM_INCLUDE_STM32_UID_H +#ifndef __ARCH_ARM_SRC_STM32_UID_H +#define __ARCH_ARM_SRC_STM32_UID_H + +/************************************************************************************ + * Included Files + ************************************************************************************/ #include -void stm32GetUniqueID(uint8_t uniqueID[12]); +/************************************************************************************ + * Public Function Prototypes + ************************************************************************************/ -#endif /* __ARCH_ARM_INCLUDE_STM32_UID_H */ +void stm32_get_uniqueid(uint8_t uniqueid[12]); + +#endif /* __ARCH_ARM_SRC_STM32_UID_H */ From 992d7d1e85e76dac7aa3a74ba720c9c2a142a13a Mon Sep 17 00:00:00 2001 From: Ken Pettit Date: Wed, 18 Nov 2015 07:08:06 -0600 Subject: [PATCH 5/7] arch/sim/src/up_spiflash.c: Add support for W25 FLASH simulation. From Ken Petit --- arch/sim/src/up_initialize.c | 15 ++++++++++++++- arch/sim/src/up_spiflash.c | 20 ++++++++++++++++++++ 2 files changed, 34 insertions(+), 1 deletion(-) diff --git a/arch/sim/src/up_initialize.c b/arch/sim/src/up_initialize.c index 18e426e178..667a618d49 100644 --- a/arch/sim/src/up_initialize.c +++ b/arch/sim/src/up_initialize.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/sim/src/up_initialize.c * - * Copyright (C) 2007-2009, 2011-2014 Gregory Nutt. All rights reserved. + * Copyright (C) 2007-2009, 2011-2015 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -79,6 +79,7 @@ static void up_init_smartfs(void) FAR struct mtd_dev_s *mtd; FAR struct spi_dev_s *spi; +#ifdef CONFIG_MTD_M25P /* Initialize a simulated SPI FLASH block device m25p MTD driver */ spi = up_spiflashinitialize(); @@ -87,6 +88,18 @@ static void up_init_smartfs(void) /* Now initialize a SMART Flash block device and bind it to the MTD device */ smart_initialize(0, mtd, NULL); +#endif + +#ifdef CONFIG_MTD_W25 + /* Initialize a simulated SPI FLASH block device m25p MTD driver */ + + spi = up_spiflashinitialize(); + mtd = w25_initialize(spi); + + /* Now initialize a SMART Flash block device and bind it to the MTD device */ + + smart_initialize(0, mtd, NULL); +#endif } #endif diff --git a/arch/sim/src/up_spiflash.c b/arch/sim/src/up_spiflash.c index b1e8366018..4e378b5457 100644 --- a/arch/sim/src/up_spiflash.c +++ b/arch/sim/src/up_spiflash.c @@ -84,6 +84,11 @@ #ifdef CONFIG_SIM_SPIFLASH_1M # define CONFIG_SPIFLASH_SIZE (128 * 1024) # define CONFIG_SPIFLASH_CAPACITY 0x11 + +#ifndef CONFIG_SIM_SPIFLASH_SECTORSIZE +# define CONFIG_SIM_SPIFLASH_SECTORSIZE 2048 +#endif + #endif #ifdef CONFIG_SIM_SPIFLASH_8M @@ -157,6 +162,7 @@ #define SPIFLASH_STATE_READ2 14 #define SPIFLASH_STATE_READ3 15 #define SPIFLASH_STATE_READ4 16 +#define SPIFLASH_STATE_FREAD_WAIT 17 /* Instructions */ /* Command Value N Description Addr Dummy Data */ @@ -666,6 +672,7 @@ static void spiflash_writeword(FAR struct sim_spiflashdev_s *priv, uint16_t data break; case SPIFLASH_READ: + case SPIFLASH_FAST_READ: priv->state = SPIFLASH_STATE_READ1; break; @@ -780,6 +787,18 @@ static void spiflash_writeword(FAR struct sim_spiflashdev_s *priv, uint16_t data case SPIFLASH_STATE_READ3: priv->address |= data; + if (priv->last_cmd == SPIFLASH_FAST_READ) + { + priv->state = SPIFLASH_STATE_FREAD_WAIT; + } + else + { + priv->state = SPIFLASH_STATE_READ4; + } + break; + + case SPIFLASH_STATE_FREAD_WAIT: + priv->read_data = 0xff; priv->state = SPIFLASH_STATE_READ4; break; @@ -850,6 +869,7 @@ FAR struct spi_dev_s *up_spiflashinitialize() priv->state = SPIFLASH_STATE_IDLE; priv->read_data = 0xFF; priv->last_cmd = 0xFF; + memset(&priv->data[0], 0xFF, sizeof(priv->data)); irqrestore(flags); return (FAR struct spi_dev_s *)priv; From 25e54726a333d66520ad1129a6faae8abaa57365 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 18 Nov 2015 14:33:27 -0600 Subject: [PATCH 6/7] STM32: Fix a build error detected by tools/testbuil.sh: The STM32L does not define UID address --- arch/arm/src/stm32/stm32_uid.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/src/stm32/stm32_uid.c b/arch/arm/src/stm32/stm32_uid.c index d38447726f..5456b2027d 100644 --- a/arch/arm/src/stm32/stm32_uid.c +++ b/arch/arm/src/stm32/stm32_uid.c @@ -37,9 +37,14 @@ * Included Files ************************************************************************************/ +#include + #include + #include "stm32_uid.h" +#ifdef STM32_SYSMEM_UID /* Not defined for the STM32L */ + /************************************************************************************ * Public Functions ************************************************************************************/ @@ -53,3 +58,6 @@ void stm32_get_uniqueid(uint8_t uniqueid[12]) uniqueid[i] = *((uint8_t*)(STM32_SYSMEM_UID)+i); } } + +#endif /* STM32_SYSMEM_UID */ + From 25a2e173475f0c4c27817e1b4cb415b26fd2e8a7 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Fri, 20 Nov 2015 08:27:04 -0600 Subject: [PATCH 7/7] Rename up_rtcinitialize to up_rtc_initialize so that it looks like other RTC interfaces --- arch/arm/src/efm32/efm32_rtc_burtc.c | 4 ++-- arch/arm/src/lpc17xx/lpc176x_rtc.c | 4 ++-- arch/arm/src/sam34/sam_rtc.c | 4 ++-- arch/arm/src/sama5/sam_rtc.c | 4 ++-- arch/arm/src/stm32/stm32_rtcc.c | 4 ++-- arch/arm/src/stm32/stm32_rtcounter.c | 4 ++-- 6 files changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm/src/efm32/efm32_rtc_burtc.c b/arch/arm/src/efm32/efm32_rtc_burtc.c index d14383f60f..cb493c7e82 100644 --- a/arch/arm/src/efm32/efm32_rtc_burtc.c +++ b/arch/arm/src/efm32/efm32_rtc_burtc.c @@ -367,7 +367,7 @@ static uint64_t efm32_get_burtc_tick(void) ************************************************************************************/ /************************************************************************************ - * Name: up_rtcinitialize + * Name: up_rtc_initialize * * Description: * Initialize the hardware RTC per the selected configuration. This function is @@ -381,7 +381,7 @@ static uint64_t efm32_get_burtc_tick(void) * ************************************************************************************/ -int up_rtcinitialize(void) +int up_rtc_initialize(void) { efm32_rtc_burtc_init(); diff --git a/arch/arm/src/lpc17xx/lpc176x_rtc.c b/arch/arm/src/lpc17xx/lpc176x_rtc.c index be288db0e4..a0aa525ff7 100644 --- a/arch/arm/src/lpc17xx/lpc176x_rtc.c +++ b/arch/arm/src/lpc17xx/lpc176x_rtc.c @@ -263,7 +263,7 @@ static int rtc_interrupt(int irq, void *context) ************************************************************************************/ /************************************************************************************ - * Name: up_rtcinitialize + * Name: up_rtc_initialize * * Description: * Initialize the hardware RTC per the selected configuration. This function is @@ -277,7 +277,7 @@ static int rtc_interrupt(int irq, void *context) * ************************************************************************************/ -int up_rtcinitialize(void) +int up_rtc_initialize(void) { int ret; diff --git a/arch/arm/src/sam34/sam_rtc.c b/arch/arm/src/sam34/sam_rtc.c index aebad747bf..0694e276e9 100644 --- a/arch/arm/src/sam34/sam_rtc.c +++ b/arch/arm/src/sam34/sam_rtc.c @@ -351,7 +351,7 @@ static uint32_t rtc_sync(void) ************************************************************************************/ /************************************************************************************ - * Name: up_rtcinitialize + * Name: up_rtc_initialize * * Description: * Initialize the hardware RTC per the selected configuration. This function is @@ -365,7 +365,7 @@ static uint32_t rtc_sync(void) * ************************************************************************************/ -int up_rtcinitialize(void) +int up_rtc_initialize(void) { uint32_t ver; diff --git a/arch/arm/src/sama5/sam_rtc.c b/arch/arm/src/sama5/sam_rtc.c index 51eafdcb67..58ba64a782 100644 --- a/arch/arm/src/sama5/sam_rtc.c +++ b/arch/arm/src/sama5/sam_rtc.c @@ -308,7 +308,7 @@ static int rtc_interrupt(int irq, void *context) ************************************************************************************/ /************************************************************************************ - * Name: up_rtcinitialize + * Name: up_rtc_initialize * * Description: * Initialize the hardware RTC per the selected configuration. This function is @@ -322,7 +322,7 @@ static int rtc_interrupt(int irq, void *context) * ************************************************************************************/ -int up_rtcinitialize(void) +int up_rtc_initialize(void) { uint32_t ver; diff --git a/arch/arm/src/stm32/stm32_rtcc.c b/arch/arm/src/stm32/stm32_rtcc.c index acfbbf5735..37aca70c51 100644 --- a/arch/arm/src/stm32/stm32_rtcc.c +++ b/arch/arm/src/stm32/stm32_rtcc.c @@ -594,7 +594,7 @@ static int rtc_interrupt(int irq, void *context) ************************************************************************************/ /************************************************************************************ - * Name: up_rtcinitialize + * Name: up_rtc_initialize * * Description: * Initialize the hardware RTC per the selected configuration. This function is @@ -608,7 +608,7 @@ static int rtc_interrupt(int irq, void *context) * ************************************************************************************/ -int up_rtcinitialize(void) +int up_rtc_initialize(void) { uint32_t regval; uint32_t tr_bkp; diff --git a/arch/arm/src/stm32/stm32_rtcounter.c b/arch/arm/src/stm32/stm32_rtcounter.c index d5c6cbb5f9..6f5be350a0 100644 --- a/arch/arm/src/stm32/stm32_rtcounter.c +++ b/arch/arm/src/stm32/stm32_rtcounter.c @@ -350,7 +350,7 @@ static int stm32_rtc_interrupt(int irq, void *context) ************************************************************************************/ /************************************************************************************ - * Name: up_rtcinitialize + * Name: up_rtc_initialize * * Description: * Initialize the hardware RTC per the selected configuration. This function is @@ -364,7 +364,7 @@ static int stm32_rtc_interrupt(int irq, void *context) * ************************************************************************************/ -int up_rtcinitialize(void) +int up_rtc_initialize(void) { /* Enable write access to the backup domain (RTC registers, RTC backup data * registers and backup SRAM).