boards: ucans32K146L Add support for FlexIO I2C driver

Also some corrections on clockconfig
This commit is contained in:
Peter van der Perk 2024-07-14 22:39:19 +02:00 committed by Alan Carvalho de Assis
parent 622b6d234a
commit f03842e0ec
6 changed files with 48 additions and 10 deletions

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@ -144,6 +144,13 @@
#define PIN_LPI2C0_SDA PIN_LPI2C0_SDA_2 /* PTA2 */
#define PIN_LPI2C0_SCL PIN_LPI2C0_SCL_2 /* PTA3 */
/* I2C Alternative mode using FlexIO, conflicts with LPI2C0 */
#define FLEXIO_I2C0_SDA 4
#define FLEXIO_I2C0_SCL 5
#define PIN_FLEXIO_I2C0_SDA PIN_FXIO_D4_2 /* PTA2 */
#define PIN_FLEXIO_I2C0_SCL PIN_FXIO_D5_2 /* PTA3 */
/* CAN selections ***********************************************************/
/* TJA1153/TJA1443/TJA1463 CAN transceiver (CAN0) */

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@ -37,7 +37,7 @@ ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += s32k1xx_appinit.c
endif
ifeq ($(CONFIG_S32K1XX_LPI2C),y)
ifeq ($(CONFIG_I2C_DRIVER),y)
CSRCS += s32k1xx_i2c.c
endif

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@ -128,7 +128,7 @@ int s32k1xx_bringup(void)
}
#endif
#ifdef CONFIG_S32K1XX_LPI2C
#ifdef CONFIG_I2C_DRIVER
/* Initialize I2C driver */
ret = s32k1xx_i2cdev_initialize();

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@ -75,10 +75,10 @@ const struct clock_configuration_s g_initial_clkconfig =
.spll =
{
.mode = SCG_SPLL_MONITOR_DISABLE, /* SPLLCM */
.div1 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SPLLDIV1 */
.div2 = SCG_ASYNC_CLOCK_DIV_BY_1, /* SPLLDIV2 */
.div1 = SCG_ASYNC_CLOCK_DIV_BY_2, /* SPLLDIV1 160 / 2 = 80Mhz */
.div2 = SCG_ASYNC_CLOCK_DIV_BY_4, /* SPLLDIV2 160 / 4 = 40Mhz */
.prediv = 1, /* PREDIV */
.mult = 40, /* MULT */
.mult = 40, /* MULT 8 / 1 * 40 / 2 = 160Mhz */
.src = 0, /* SOURCE */
.initialize = true, /* Initialize */
.locked = false, /* LK */
@ -97,7 +97,7 @@ const struct clock_configuration_s g_initial_clkconfig =
{
.rccr = /* RCCR - Run Clock Control Register */
{
.src = SCG_SYSTEM_CLOCK_SRC_SYS_PLL, /* SCS */
.src = SCG_SYSTEM_CLOCK_SRC_SYS_PLL, /* SPLL 160MHz */
.divslow = 3, /* DIVSLOW, range 1..16 */
.divbus = 2, /* DIVBUS, range 1..16 */
.divcore = 2, /* DIVCORE, range 1..16 */

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@ -32,11 +32,17 @@
#include <nuttx/i2c/i2c_master.h>
#ifdef CONFIG_S32K1XX_LPI2C0
#include "s32k1xx_lpi2c.h"
#endif
#ifdef CONFIG_S32K1XX_FLEXIO_I2C
#include "s32k1xx_flexio_i2c.h"
#endif
#include "ucans32k146.h"
#ifdef CONFIG_S32K1XX_LPI2C
#ifdef CONFIG_I2C_DRIVER
/****************************************************************************
* Public Functions
@ -54,7 +60,7 @@ int weak_function s32k1xx_i2cdev_initialize(void)
{
int ret = OK;
#if defined(CONFIG_S32K1XX_LPI2C0) && defined(CONFIG_I2C_DRIVER)
#ifdef CONFIG_S32K1XX_LPI2C0
/* LPI2C0 *****************************************************************/
/* Initialize the I2C driver for LPI2C0 */
@ -73,9 +79,25 @@ int weak_function s32k1xx_i2cdev_initialize(void)
s32k1xx_i2cbus_uninitialize(lpi2c0);
return ret;
}
#endif /* CONFIG_S32K1XX_LPI2C0 && CONFIG_I2C_DRIVER */
#elif defined(CONFIG_S32K1XX_FLEXIO_I2C)
struct i2c_master_s *flexio_i2c0 = s32k1xx_flexio_i2cbus_initialize(0);
if (flexio_i2c0 == NULL)
{
i2cerr("ERROR: FAILED to initialize FlexIO I2C\n");
return -ENODEV;
}
ret = i2c_register(flexio_i2c0, 0);
if (ret < 0)
{
i2cerr("ERROR: FAILED to register LPI2C0 driver\n");
return ret;
}
#endif
return ret;
}
#endif /* CONFIG_S32K1XX_LPSPI */
#endif /* CONFIG_I2C_DRIVER */

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@ -120,6 +120,15 @@ const struct peripheral_clock_config_s g_peripheral_clockconfig0[] =
.clkgate = false,
#endif
},
{
.clkname = FLEXIO0_CLK,
#ifdef CONFIG_S32K1XX_FLEXIO_I2C
.clkgate = true,
#else
.clkgate = false,
#endif
.clksrc = CLK_SRC_SPLL_DIV2,
},
};
unsigned int const num_of_peripheral_clocks_0 =