diff --git a/TODO b/TODO index a38b5b3d0d..33db2ed411 100644 --- a/TODO +++ b/TODO @@ -231,9 +231,9 @@ o Build system Priority: Low Description: Dependencies do not work correctly under configs//src - (same as arch//src/board) with SDCC. + (same as arch//src/board). Seems to be worse using SDCC. Status: Open - Priority: Medium + Priority: Medium (maybe higher for z80 target) o Applications & Tests (examples/) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/arch/z80/include/z80/irq.h b/arch/z80/include/z80/irq.h index dbf61fe3e7..3bcaaed204 100644 --- a/arch/z80/include/z80/irq.h +++ b/arch/z80/include/z80/irq.h @@ -70,13 +70,13 @@ */ #define XCPT_I (0) /* Offset 0: Saved I w/interrupt state in carry */ -#define XCPT_AF (1) /* Offset 1: Saved AF register */ -#define XCPT_BC (2) /* Offset 2: Saved BC register */ -#define XCPT_DE (3) /* Offset 3: Saved DE register */ -#define XCPT_HL (4) /* Offset 4: Saved HL register */ -#define XCPT_IX (5) /* Offset 5: Saved IX register */ -#define XCPT_IY (6) /* Offset 6: Saved IY register */ -#define XCPT_SP (7) /* Offset 7: Offset to SP at time of interrupt */ +#define XCPT_BC (1) /* Offset 1: Saved BC register */ +#define XCPT_DE (2) /* Offset 2: Saved DE register */ +#define XCPT_IX (3) /* Offset 3: Saved IX register */ +#define XCPT_IY (4) /* Offset 4: Saved IY register */ +#define XCPT_SP (5) /* Offset 5: Offset to SP at time of interrupt */ +#define XCPT_HL (6) /* Offset 6: Saved HL register */ +#define XCPT_AF (7) /* Offset 7: Saved AF register */ #define XCPT_PC (8) /* Offset 8: Offset to PC at time of interrupt */ #define XCPTCONTEXT_REGS (9) diff --git a/arch/z80/src/common/up_restoreusercontext.asm b/arch/z80/src/common/up_restoreusercontext.asm index b37b6a7526..61a8855b4c 100644 --- a/arch/z80/src/common/up_restoreusercontext.asm +++ b/arch/z80/src/common/up_restoreusercontext.asm @@ -49,7 +49,6 @@ ; up_restoreusercontext ;************************************************************************** -; .area _CODE (ABS,OVR) _up_restoreusercontext: ; On entry, stack contains return address (not used), then address ; of the register save structure @@ -79,9 +78,7 @@ _up_restoreusercontext: pop ix ; Offset 3: IX pop iy ; Offset 4: IY exx ; Use alternate BC/DE/HL - ld hl, #-2 ; Offset of SP to account for ret addr on stack - pop de ; Offset 5: HL' = Stack pointer after return - add hl, de ; HL = Stack pointer value before return + pop hl ; Offset 5: HL' = Stack pointer after return exx ; Restore original BC/DE/HL pop hl ; Offset 6: HL pop af ; Offset 7: AF @@ -89,7 +86,9 @@ _up_restoreusercontext: ; Restore the stack pointer exx ; Use alternate BC/DE/HL + pop de ; DE' = return address ld sp, hl ; Set SP = saved stack pointer value before return + push de ; Save return address for ret instruction exx ; Restore original BC/DE/HL ; Restore interrupt state @@ -97,8 +96,8 @@ _up_restoreusercontext: ex af, af' ; Recover interrupt state jr nc, noinrestore ; No carry, IFF2=0, means disabled ex af, af' ; Restore AF (before enabling interrupts) - ei ; yes - ret + ei ; yes.. Enable interrupts + ret ; and return noinrestore: ex af, af' ; Restore AF - ret + ret ; Return with interrupts disabled