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Gregory Nutt 2015-12-02 18:54:17 -06:00
parent 216f762e56
commit f04287305d
5 changed files with 82 additions and 0 deletions
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14
configs/sama5d3-xplained/README.txt
View File

@ -2530,12 +2530,26 @@ Tickless OS
CONFIG_SAMA5_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free-
: running timer
The resolution of the clock is provided by the CONFIG_USEC_PER_TICK
setting in the configuration file.
NOTE: In most cases, the slow clock will be used as the timer/counter
input. You should enable the 32.768KHz crystal for the slow clock by
calling sam_sckc_enable(). Otherwise, you will be doing all system
timing using the RC clock! UPDATE: This will now be selected by default
when you configure for TICKLESS support.
The slow clock has a resolution of about 30.518 microseconds. Ideally, the
value of CONFIG_USEC_PER_TICK should be an exact multiple of the clock
resolution. Otherwise there will be cumulative timing inaccuracies. A
choice of:
CONFIG_USEC_PER_TICK=61, or
CONFIG_USEC_PER_TICK=122
will be close but will still have inaccuracies that will effect the time
due to long term error build-up.
SAMA5 Timer Usage
-----------------
This current implementation uses two timers: A one-shot timer to

14
configs/sama5d3x-ek/README.txt
View File

@ -2850,12 +2850,26 @@ Tickless OS
CONFIG_SAMA5_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free-
: running timer
The resolution of the clock is provided by the CONFIG_USEC_PER_TICK
setting in the configuration file.
NOTE: In most cases, the slow clock will be used as the timer/counter
input. You should enable the 32.768KHz crystal for the slow clock by
calling sam_sckc_enable(). Otherwise, you will be doing all system
timing using the RC clock! UPDATE: This will now be selected by default
when you configure for TICKLESS support.
The slow clock has a resolution of about 30.518 microseconds. Ideally, the
value of CONFIG_USEC_PER_TICK should be an exact multiple of the clock
resolution. Otherwise there will be cumulative timing inaccuracies. A
choice of:
CONFIG_USEC_PER_TICK=61, or
CONFIG_USEC_PER_TICK=122
will be close but will still have inaccuracies that will effect the time
due to long term error build-up.
SAMA5 Timer Usage
-----------------
This current implementation uses two timers: A one-shot timer to

14
configs/sama5d4-ek/README.txt
View File

@ -3358,12 +3358,26 @@ Tickless OS
CONFIG_SAMA5_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free-
: running timer
The resolution of the clock is provided by the CONFIG_USEC_PER_TICK
setting in the configuration file.
NOTE: In most cases, the slow clock will be used as the timer/counter
input. You should enable the 32.768KHz crystal for the slow clock by
calling sam_sckc_enable(). Otherwise, you will be doing all system
timing using the RC clock! UPDATE: This will now be selected by default
when you configure for TICKLESS support.
The slow clock has a resolution of about 30.518 microseconds. Ideally, the
value of CONFIG_USEC_PER_TICK should be an exact multiple of the clock
resolution. Otherwise there will be cumulative timing inaccuracies. A
choice of:
CONFIG_USEC_PER_TICK=61, or
CONFIG_USEC_PER_TICK=122
will be close but will still have inaccuracies that will effect the time
due to long term error build-up.
UPDATE: As of this writing (2014-8-11), the Tickless support is
functional. However, the timing for all delays appears to be half the
duration that it should be. I don't see anything wrong with the setup

20
configs/same70-xplained/README.txt
View File

@ -898,6 +898,9 @@ Tickless OS
CONFIG_SAMV7_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free-
: running timer
The resolution of the clock is provided by the CONFIG_USEC_PER_TICK
setting in the configuration file.
NOTE: In most cases, the slow clock will be used as the timer/counter
input. The SAME70-Xplained board has pads for a 32.768KHz crystal,
however, the boad ships with that position unpopulated. So, be default
@ -908,6 +911,23 @@ Tickless OS
definition BOARD_HAVE_SLOWXTAL in the configs/same70-xplained/board.h
file.
The slow clock has a resolution of about 30.518 microseconds. Ideally, the
value of CONFIG_USEC_PER_TICK should be an exact multiple of the clock
resolution. Otherwise there will be cumulative timing inaccuracies. A
choice of:
CONFIG_USEC_PER_TICK=61, or
CONFIG_USEC_PER_TICK=122
will be close but will still have inaccuracies that will effect the time
due to long term error build-up.
UPDATE: As of this writing (2015-12-02), the Tickless support is
functional. However, the timing for all delays appears to be half the
duration that it should be. I don't see anything wrong with the setup
and I am suspecting that there may be something I don't understand about
the counting frequency.
SAME70 Timer Usage
------------------
This current implementation uses two timers: A one-shot timer to

20
configs/samv71-xult/README.txt
View File

@ -1489,10 +1489,30 @@ Tickless OS
CONFIG_SAMV7_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free-
: running timer
The resolution of the clock is provided by the CONFIG_USEC_PER_TICK
setting in the configuration file.
NOTE: In most cases, the slow clock will be used as the timer/counter
input. The 32.768KHz crystal is selected by the definition
BOARD_HAVE_SLOWXTAL in the configs/samv71-xult/board.h file.
The slow clock has a resolution of about 30.518 microseconds. Ideally, the
value of CONFIG_USEC_PER_TICK should be an exact multiple of the clock
resolution. Otherwise there will be cumulative timing inaccuracies. A
choice of:
CONFIG_USEC_PER_TICK=61, or
CONFIG_USEC_PER_TICK=122
will be close but will still have inaccuracies that will effect the time
due to long term error build-up.
UPDATE: As of this writing (2015-12-02), the Tickless support is
functional. However, the timing for all delays appears to be half the
duration that it should be. I don't see anything wrong with the setup
and I am suspecting that there may be something I don't understand about
the counting frequency.
SAMV7 Timer Usage
-----------------
This current implementation uses two timers: A one-shot timer to