From f04287305d1011ca498ff64b8d4c0ec1ec6fb099 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Wed, 2 Dec 2015 18:54:17 -0600 Subject: [PATCH] Update README --- configs/sama5d3-xplained/README.txt | 14 ++++++++++++++ configs/sama5d3x-ek/README.txt | 14 ++++++++++++++ configs/sama5d4-ek/README.txt | 14 ++++++++++++++ configs/same70-xplained/README.txt | 20 ++++++++++++++++++++ configs/samv71-xult/README.txt | 20 ++++++++++++++++++++ 5 files changed, 82 insertions(+) diff --git a/configs/sama5d3-xplained/README.txt b/configs/sama5d3-xplained/README.txt index e5c2b8760f..aa5f04129e 100644 --- a/configs/sama5d3-xplained/README.txt +++ b/configs/sama5d3-xplained/README.txt @@ -2530,12 +2530,26 @@ Tickless OS CONFIG_SAMA5_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- : running timer + The resolution of the clock is provided by the CONFIG_USEC_PER_TICK + setting in the configuration file. + NOTE: In most cases, the slow clock will be used as the timer/counter input. You should enable the 32.768KHz crystal for the slow clock by calling sam_sckc_enable(). Otherwise, you will be doing all system timing using the RC clock! UPDATE: This will now be selected by default when you configure for TICKLESS support. + The slow clock has a resolution of about 30.518 microseconds. Ideally, the + value of CONFIG_USEC_PER_TICK should be an exact multiple of the clock + resolution. Otherwise there will be cumulative timing inaccuracies. A + choice of: + + CONFIG_USEC_PER_TICK=61, or + CONFIG_USEC_PER_TICK=122 + + will be close but will still have inaccuracies that will effect the time + due to long term error build-up. + SAMA5 Timer Usage ----------------- This current implementation uses two timers: A one-shot timer to diff --git a/configs/sama5d3x-ek/README.txt b/configs/sama5d3x-ek/README.txt index 29c450450a..0e9fca1e43 100644 --- a/configs/sama5d3x-ek/README.txt +++ b/configs/sama5d3x-ek/README.txt @@ -2850,12 +2850,26 @@ Tickless OS CONFIG_SAMA5_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- : running timer + The resolution of the clock is provided by the CONFIG_USEC_PER_TICK + setting in the configuration file. + NOTE: In most cases, the slow clock will be used as the timer/counter input. You should enable the 32.768KHz crystal for the slow clock by calling sam_sckc_enable(). Otherwise, you will be doing all system timing using the RC clock! UPDATE: This will now be selected by default when you configure for TICKLESS support. + The slow clock has a resolution of about 30.518 microseconds. Ideally, the + value of CONFIG_USEC_PER_TICK should be an exact multiple of the clock + resolution. Otherwise there will be cumulative timing inaccuracies. A + choice of: + + CONFIG_USEC_PER_TICK=61, or + CONFIG_USEC_PER_TICK=122 + + will be close but will still have inaccuracies that will effect the time + due to long term error build-up. + SAMA5 Timer Usage ----------------- This current implementation uses two timers: A one-shot timer to diff --git a/configs/sama5d4-ek/README.txt b/configs/sama5d4-ek/README.txt index 5eefcace73..fcf3ae98e7 100644 --- a/configs/sama5d4-ek/README.txt +++ b/configs/sama5d4-ek/README.txt @@ -3358,12 +3358,26 @@ Tickless OS CONFIG_SAMA5_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- : running timer + The resolution of the clock is provided by the CONFIG_USEC_PER_TICK + setting in the configuration file. + NOTE: In most cases, the slow clock will be used as the timer/counter input. You should enable the 32.768KHz crystal for the slow clock by calling sam_sckc_enable(). Otherwise, you will be doing all system timing using the RC clock! UPDATE: This will now be selected by default when you configure for TICKLESS support. + The slow clock has a resolution of about 30.518 microseconds. Ideally, the + value of CONFIG_USEC_PER_TICK should be an exact multiple of the clock + resolution. Otherwise there will be cumulative timing inaccuracies. A + choice of: + + CONFIG_USEC_PER_TICK=61, or + CONFIG_USEC_PER_TICK=122 + + will be close but will still have inaccuracies that will effect the time + due to long term error build-up. + UPDATE: As of this writing (2014-8-11), the Tickless support is functional. However, the timing for all delays appears to be half the duration that it should be. I don't see anything wrong with the setup diff --git a/configs/same70-xplained/README.txt b/configs/same70-xplained/README.txt index ef2299ecfe..00309ac7fa 100644 --- a/configs/same70-xplained/README.txt +++ b/configs/same70-xplained/README.txt @@ -898,6 +898,9 @@ Tickless OS CONFIG_SAMV7_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- : running timer + The resolution of the clock is provided by the CONFIG_USEC_PER_TICK + setting in the configuration file. + NOTE: In most cases, the slow clock will be used as the timer/counter input. The SAME70-Xplained board has pads for a 32.768KHz crystal, however, the boad ships with that position unpopulated. So, be default @@ -908,6 +911,23 @@ Tickless OS definition BOARD_HAVE_SLOWXTAL in the configs/same70-xplained/board.h file. + The slow clock has a resolution of about 30.518 microseconds. Ideally, the + value of CONFIG_USEC_PER_TICK should be an exact multiple of the clock + resolution. Otherwise there will be cumulative timing inaccuracies. A + choice of: + + CONFIG_USEC_PER_TICK=61, or + CONFIG_USEC_PER_TICK=122 + + will be close but will still have inaccuracies that will effect the time + due to long term error build-up. + + UPDATE: As of this writing (2015-12-02), the Tickless support is + functional. However, the timing for all delays appears to be half the + duration that it should be. I don't see anything wrong with the setup + and I am suspecting that there may be something I don't understand about + the counting frequency. + SAME70 Timer Usage ------------------ This current implementation uses two timers: A one-shot timer to diff --git a/configs/samv71-xult/README.txt b/configs/samv71-xult/README.txt index 15838ab153..498132ab1a 100644 --- a/configs/samv71-xult/README.txt +++ b/configs/samv71-xult/README.txt @@ -1489,10 +1489,30 @@ Tickless OS CONFIG_SAMV7_TICKLESS_FREERUN=1 : Selects TC0 channel 1 for the free- : running timer + The resolution of the clock is provided by the CONFIG_USEC_PER_TICK + setting in the configuration file. + NOTE: In most cases, the slow clock will be used as the timer/counter input. The 32.768KHz crystal is selected by the definition BOARD_HAVE_SLOWXTAL in the configs/samv71-xult/board.h file. + The slow clock has a resolution of about 30.518 microseconds. Ideally, the + value of CONFIG_USEC_PER_TICK should be an exact multiple of the clock + resolution. Otherwise there will be cumulative timing inaccuracies. A + choice of: + + CONFIG_USEC_PER_TICK=61, or + CONFIG_USEC_PER_TICK=122 + + will be close but will still have inaccuracies that will effect the time + due to long term error build-up. + + UPDATE: As of this writing (2015-12-02), the Tickless support is + functional. However, the timing for all delays appears to be half the + duration that it should be. I don't see anything wrong with the setup + and I am suspecting that there may be something I don't understand about + the counting frequency. + SAMV7 Timer Usage ----------------- This current implementation uses two timers: A one-shot timer to