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STM32 SDIO DMA setup was losing DMA priority

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5019 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2012-08-10 22:01:12 +00:00
parent 11a5c81fd6
commit f0b1643958
4 changed files with 60 additions and 6 deletions
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25
arch/arm/src/stm32/stm32_serial.c
View File

@ -132,6 +132,30 @@
*/
# define RXDMA_BUFFER_SIZE 32
/* DMA priority */
# ifndef CONFIG_USART_DMAPRIO
# if defined(CONFIG_STM32_STM32F10XX)
# define CONFIG_USART_DMAPRIO DMA_CCR_PRIMED
# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# define CONFIG_USART_DMAPRIO DMA_SCR_PRIMED
# else
# error "Unknown STM32 DMA"
# endif
# endif
# if defined(CONFIG_STM32_STM32F10XX)
# if (CONFIG_USART_DMAPRIO & ~DMA_CCR_PL_MASK) != 0
# error "Illegal value for CONFIG_USART_DMAPRIO"
# endif
# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# if (CONFIG_USART_DMAPRIO & ~DMA_SCR_PL_MASK) != 0
# error "Illegal value for CONFIG_USART_DMAPRIO"
# endif
# else
# error "Unknown STM32 DMA"
# endif
#endif
/* Power management definitions */
@ -975,6 +999,7 @@ static int up_dma_setup(struct uart_dev_s *dev)
DMA_SCR_MINC |
DMA_SCR_PSIZE_8BITS |
DMA_SCR_MSIZE_8BITS |
CONFIG_USART_DMAPRIO |
DMA_SCR_PBURST_SINGLE |
DMA_SCR_MBURST_SINGLE);

33
arch/arm/src/stm32/stm32_spi.c
View File

@ -88,18 +88,47 @@
* Definitions
************************************************************************************/
/* Configuration ********************************************************************/
/* SPI interrupts */
#ifdef CONFIG_STM32_SPI_INTERRUPTS
# error "Interrupt driven SPI not yet supported"
#endif
/* Can't have both interrupt driven SPI and SPI DMA */
#if defined(CONFIG_STM32_SPI_INTERRUPTS) && defined(CONFIG_STM32_SPI_DMA)
# error "Cannot enable both interrupt mode and DMA mode for SPI"
#endif
/* DMA channel configuration */
/* SPI DMA priority */
#define SPI_DMA_PRIO DMA_CCR_PRIMED /* Check this to alter priority */
#ifdef CONFIG_STM32_SPI_DMA
# if defined(CONFIG_SPI_DMAPRIO)
# define SPI_DMA_PRIO CONFIG_SPI_DMAPRIO
# elif defined(CONFIG_STM32_STM32F10XX)
# define SPI_DMA_PRIO DMA_CCR_PRIMED
# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# define SPI_DMA_PRIO DMA_SCR_PRIMED
# else
# error "Unknown STM32 DMA"
# endif
# if defined(CONFIG_STM32_STM32F10XX)
# if (SPI_DMA_PRIO & ~DMA_CCR_PL_MASK) != 0
# error "Illegal value for CONFIG_SPI_DMAPRIO"
# endif
# elif defined(CONFIG_STM32_STM32F20XX) || defined(CONFIG_STM32_STM32F40XX)
# if (SPI_DMA_PRIO & ~DMA_SCR_PL_MASK) != 0
# error "Illegal value for CONFIG_SPI_DMAPRIO"
# endif
# else
# error "Unknown STM32 DMA"
# endif
#endif
/* DMA channel configuration */
#define SPI_RXDMA16_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_16BITS|DMA_CCR_PSIZE_16BITS|DMA_CCR_MINC )
#define SPI_RXDMA8_CONFIG (SPI_DMA_PRIO|DMA_CCR_MSIZE_8BITS |DMA_CCR_PSIZE_8BITS |DMA_CCR_MINC )

4
arch/arm/src/stm32/stm32f20xxx_dma.c
View File

@ -721,11 +721,11 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
regval = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET);
regval &= ~(DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|
DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|DMA_SCR_PL_MASK|
DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
scr &= (DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
DMA_SCR_DBM|DMA_SCR_CIRC|
DMA_SCR_DBM|DMA_SCR_CIRC|DMA_SCR_PL_MASK|
DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
regval |= scr;
dmast->nonstop = (scr & (DMA_SCR_DBM|DMA_SCR_CIRC)) != 0;

4
arch/arm/src/stm32/stm32f40xxx_dma.c
View File

@ -721,11 +721,11 @@ void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
regval = dmast_getreg(dmast, STM32_DMA_SCR_OFFSET);
regval &= ~(DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|
DMA_SCR_CIRC|DMA_SCR_DBM|DMA_SCR_CT|DMA_SCR_PL_MASK|
DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
scr &= (DMA_SCR_PFCTRL|DMA_SCR_DIR_MASK|DMA_SCR_PINC|DMA_SCR_MINC|
DMA_SCR_PSIZE_MASK|DMA_SCR_MSIZE_MASK|DMA_SCR_PINCOS|
DMA_SCR_DBM|DMA_SCR_CIRC|
DMA_SCR_DBM|DMA_SCR_CIRC|DMA_SCR_PL_MASK|
DMA_SCR_PBURST_MASK|DMA_SCR_MBURST_MASK);
regval |= scr;
dmast->nonstop = (scr & (DMA_SCR_DBM|DMA_SCR_CIRC)) != 0;