arch/c5471/include and arch/dm320/include are not identical. This is in preparation to replace arch/c5471 and arch/dm320 with arch/arm
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@186 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
8f7dc2bb9f
commit
f0d12c1db3
@ -115,4 +115,6 @@
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* Verfied c5471 build under Cygwin on WinXP
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* Makesystem changes to better support different SoCs.
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* Made arch/c5471/include and arch/dm320/include identiry in
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preparation for merging into arch/arm
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* Started m68322
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16
Makefile
16
Makefile
@ -87,10 +87,10 @@ include/arch/board: Make.defs include/arch
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# Link the configs/<board-name>/src dir to arch/<arch-name>/src/board
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$(ARCH_SRC)/board: Make.defs
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@if [ -e $(ARCH_SRC)/board ]; then \
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if [ -h $(ARCH_SRC)/board ]; then \
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rm -f $(ARCH_SRC)/board ; \
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else \
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@if [ -h $(ARCH_SRC)/board ]; then \
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rm -f $(ARCH_SRC)/board ; \
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else \
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if [ -e $(ARCH_SRC)/board ]; then \
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echo "$(ARCH_SRC)/board exists but is not a symbolic link" ; \
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exit 1 ; \
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fi ; \
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@ -100,10 +100,10 @@ $(ARCH_SRC)/board: Make.defs
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# Link arch/<arch-name>/include/<chip-name> to arch/<arch-name>/include/chip
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$(ARCH_SRC)/chip: Make.defs
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ifneq ($(CONFIG_ARCH_CHIP),)
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@if [ -e $(ARCH_SRC)/chip ]; then \
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if [ -h $(ARCH_SRC)/chip ]; then \
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rm -f $(ARCH_SRC)/chip ; \
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else \
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@if [ -h $(ARCH_SRC)/chip ]; then \
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rm -f $(ARCH_SRC)/chip ; \
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else \
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if [ -e $(ARCH_SRC)/chip ]; then \
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echo "$(ARCH_SRC)/chip exists but is not a symbolic link" ; \
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exit 1 ; \
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fi ; \
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11
TODO
11
TODO
@ -13,6 +13,7 @@ o Task/Scheduler
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MSEC_PER_TICK in sched/clock_internal.h
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- Consider implementing wait, waitpid, waitid. At present, a parent has
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no information about child tasks.
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- Several APIs do not set errno. Need to review all APIs.
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o Memory Managment
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- Add an option to free all memory allocated by a task when the task exits.
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@ -24,6 +25,11 @@ o Signals
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o pthreads
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- pthread_cancel(): Should implemenent cancellation points and pthread_testcancel()
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o Network
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- Port FreeBSD TCP/IP stack
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o USB
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o Libraries
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o File system
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@ -37,11 +43,10 @@ o Documentation
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o Build system
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- Names under arch are incorrect. These should hold processor architectures.
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c5471 should be arm7
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dm320 should be arm9
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c5471 and dm320 should be arm
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pjrc-8051 should be 805x
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- SoC-specific logic should be in subdirectories under arch/<processor-name>.
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Eg. arm7/include/c5471 should hold c5471 specific header files
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Eg. arm/include/c5471 should hold c5471 specific header files
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- configs/pjrc-8051 should be configs/pjrc-87c52
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o Applications & Tests
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@ -1,5 +1,5 @@
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/************************************************************
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* arch.h
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* arch/arch.h
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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@ -37,8 +37,8 @@
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* only indirectly through nuttx/arch.h
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*/
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#ifndef __ARCH_C5471_ARCH_H
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#define __ARCH_C5471_ARCH_H
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#ifndef __ARCH_ARCH_H
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#define __ARCH_ARCH_H
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/************************************************************
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* Included Files
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@ -76,5 +76,5 @@ extern "C" {
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}
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#endif
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#endif /* __ARCH_C5471_ARCH_H */
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#endif /* __ARCH_ARCH_H */
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@ -1,5 +1,5 @@
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/************************************************************
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* irq.h
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* arch/irq.h
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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@ -37,13 +37,15 @@
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* only indirectly through nuttx/irq.h
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*/
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#ifndef __ARCH_C5471_IRQ_H
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#define __ARCH_C5471_IRQ_H
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#ifndef __ARCH_IRQ_H
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#define __ARCH_IRQ_H
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/************************************************************
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* Included Files
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************************************************************/
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#include <arch/chip/irq.h>
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/************************************************************
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* Definitions
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************************************************************/
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@ -60,68 +62,45 @@
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* xcp.regs array:
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*/
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#define REG_R0 (0)
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#define REG_R1 (1)
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#define REG_R2 (2)
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#define REG_R3 (3)
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#define REG_R4 (4)
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#define REG_R5 (5
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#define REG_R6 (6)
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#define REG_R7 (7)
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#define REG_R8 (8)
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#define REG_R9 (9)
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#define REG_R10 (10)
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#define REG_R11 (11)
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#define REG_R12 (12)
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#define REG_R13 (13)
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#define REG_R14 (14)
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#define REG_R15 (15)
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#define REG_CPSR (16)
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#define REG_R0 (0)
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#define REG_R1 (1)
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#define REG_R2 (2)
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#define REG_R3 (3)
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#define REG_R4 (4)
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#define REG_R5 (5)
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#define REG_R6 (6)
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#define REG_R7 (7)
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#define REG_R8 (8)
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#define REG_R9 (9)
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#define REG_R10 (10)
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#define REG_R11 (11)
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#define REG_R12 (12)
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#define REG_R13 (13)
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#define REG_R14 (14)
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#define REG_R15 (15)
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#define REG_CPSR (16)
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#define XCPTCONTEXT_REGS (17)
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#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
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#define XCPTCONTEXT_REGS (17)
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#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
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#define REG_A1 REG_R0
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#define REG_A2 REG_R1
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#define REG_A3 REG_R2
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#define REG_A4 REG_R3
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#define REG_V1 REG_R4
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#define REG_V2 REG_R5
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#define REG_V3 REG_R6
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#define REG_V4 REG_R7
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#define REG_V5 REG_R8
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#define REG_V6 REG_R9
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#define REG_V7 REG_R10
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#define REG_SB REG_R9
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#define REG_SL REG_R10
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#define REG_FP REG_R11
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#define REG_IP REG_R12
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#define REG_SP REG_R13
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#define REG_LR REG_R14
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#define REG_PC REG_R15
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/* C5471 Interrupts */
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#define C5471_IRQ_TIMER0 0
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#define C5471_IRQ_TIMER1 1
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#define C5471_IRQ_TIMER2 2
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#define C5471_IRQ_GPIO0 3
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#define C5471_IRQ_ETHER 4
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#define C5471_IRQ_KBGPIO_0_7 5
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#define C5471_IRQ_UART 6
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#define C5471_IRQ_UART_IRDA 7
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#define C5471_IRQ_KBGPIO_8_15 8
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#define C5471_IRQ_GPIO3 9
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#define C5471_IRQ_GPIO2 10
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#define C5471_IRQ_I2C 11
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#define C5471_IRQ_GPIO1 12
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#define C5471_IRQ_SPI 13
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#define C5471_IRQ_GPIO_4_19 14
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#define C5471_IRQ_API 15
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#define C5471_IRQ_WATCHDOG C5471_IRQ_TIMER0
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#define C5471_IRQ_SYSTIMER C5471_IRQ_TIMER2
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#define NR_IRQS (C5471_IRQ_API+1)
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#define REG_A1 REG_R0
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#define REG_A2 REG_R1
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#define REG_A3 REG_R2
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#define REG_A4 REG_R3
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#define REG_V1 REG_R4
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#define REG_V2 REG_R5
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#define REG_V3 REG_R6
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#define REG_V4 REG_R7
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#define REG_V5 REG_R8
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#define REG_V6 REG_R9
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#define REG_V7 REG_R10
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#define REG_SB REG_R9
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#define REG_SL REG_R10
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#define REG_FP REG_R11
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#define REG_IP REG_R12
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#define REG_SP REG_R13
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#define REG_LR REG_R14
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#define REG_PC REG_R15
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/************************************************************
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* Public Types
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@ -243,5 +222,5 @@ extern "C" {
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#endif
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#endif
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#endif /* __ARCH_C5471_IRQ_H */
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#endif /* __ARCH_IRQ_H */
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@ -1,5 +1,5 @@
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/************************************************************
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* serial.h
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* arch/serial.h
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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@ -44,7 +44,7 @@
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* Definitions
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************************************************************/
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/* IOCTL commands supported by the C5471 serial driver */
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/* IOCTL commands supported by the ARM serial driver */
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#define TIOCSBRK 0x5401 /* BSD compatibility */
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#define TIOCCBRK 0x5402 /* " " " " */
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@ -1,5 +1,5 @@
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/************************************************************
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* types.h
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* arch/types.h
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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@ -37,8 +37,8 @@
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* only indirectly through sys/types.h
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*/
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#ifndef __ARCH_C5471_TYPES_H
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#define __ARCH_C5471_TYPES_H
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#ifndef __ARCH_TYPES_H
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#define __ARCH_TYPES_H
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/************************************************************
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* Included Files
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@ -79,4 +79,4 @@ typedef unsigned int irqstate_t;
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* Global Function Prototypes
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************************************************************/
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#endif /* __ARCH_C5471_TYPES_H */
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#endif /* __ARCH_TYPES_H */
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@ -1,5 +1,5 @@
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/************************************************************
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* arch.h
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* arch/arch.h
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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@ -37,8 +37,8 @@
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* only indirectly through nuttx/arch.h
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*/
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#ifndef __ARCH_DM320_ARCH_H
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#define __ARCH_DM320_ARCH_H
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#ifndef __ARCH_ARCH_H
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#define __ARCH_ARCH_H
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/************************************************************
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* Included Files
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@ -76,5 +76,5 @@ extern "C" {
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}
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#endif
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#endif /* __ARCH_DM320_ARCH_H */
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#endif /* __ARCH_ARCH_H */
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@ -1,5 +1,5 @@
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/************************************************************
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* irq.h
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* arch/irq.h
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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@ -37,13 +37,15 @@
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* only indirectly through nuttx/irq.h
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*/
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#ifndef __ARCH_DM320_IRQ_H
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#define __ARCH_DM320_IRQ_H
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#ifndef __ARCH_IRQ_H
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#define __ARCH_IRQ_H
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/************************************************************
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* Included Files
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************************************************************/
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#include <arch/chip/irq.h>
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/************************************************************
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* Definitions
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************************************************************/
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@ -100,58 +102,6 @@
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#define REG_LR REG_R14
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#define REG_PC REG_R15
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/* DM320 Interrupts */
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#define DM320_IRQ_TMR0 0 /* IRQ0: Timer 0 Interrupt */
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#define DM320_IRQ_TMR1 1 /* IRQ1: Timer 1 Interrupt */
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#define DM320_IRQ_TMR2 2 /* IRQ2: Timer 2 Interrupt (CCD timer 0) */
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#define DM320_IRQ_TMR3 3 /* IRQ3: Timer 3 Interrupt (CCD timer 1) */
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#define DM320_IRQ_CCDVD0 4 /* IRQ4: CCD VD Interrupt #0 */
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#define DM320_IRQ_CCDVD1 5 /* IRQ5: CCD VD Interrupt #1 */
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#define DM320_IRQ_CCDWEN 6 /* IRQ6: CCD WEN Interrupt */
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#define DM320_IRQ_VENC 7 /* IRQ7: Video Encoder Interrupt */
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#define DM320_IRQ_SP0 8 /* IRQ8: Serial Port 0 Interrupt (with DMA) */
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#define DM320_IRQ_SP1 9 /* IRQ9: Serial Port 1 Interrupt */
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#define DM320_IRQ_EXTHOST 10 /* IRQ10: External host interrupt */
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#define DM320_IRQ_IMGBUF 11 /* IRQ11: Image Buffer */
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#define DM320_IRQ_UART0 12 /* IRQ12: UART0 Interrupt */
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#define DM320_IRQ_UART1 13 /* IRQ13: UART1 Interrupt */
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#define DM320_IRQ_USB0 14 /* IRQ14: USB 0 Interrupt (DMA) */
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#define DM320_IRQ_USB1 15 /* IRQ15: USB 1 Interrupt (Core) */
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#define DM320_IRQ_VLYNQ 16 /* IRQ16: VLYNQ Interrupt */
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#define DM320_IRQ_MTC0 17 /* IRQ17: Memory Traffic Controller 0 (DMA) */
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#define DM320_IRQ_MTC1 18 /* IRQ18: Memory Traffic Controller 1 (CFC_RDY) */
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#define DM320_IRQ_MMCSD0 19 /* IRQ19: MMC/SD or MS 0 Interrupt */
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#define DM320_IRQ_MMCSD1 20 /* IRQ20: MMC/SD or MS 1 Interrupt */
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#define DM320_IRQ_EXT0 21 /* IRQ21: External Interrupt #0 (GIO0) */
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#define DM320_IRQ_EXT1 22 /* IRQ22: External Interrupt #1 (GIO1) */
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#define DM320_IRQ_EXT2 23 /* IRQ23: External Interrupt #2 (GIO2) */
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#define DM320_IRQ_EXT3 24 /* IRQ24: External Interrupt #3 (GIO3) */
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#define DM320_IRQ_EXT4 25 /* IRQ25: External Interrupt #4 (GIO4) */
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#define DM320_IRQ_EXT5 26 /* IRQ26: External Interrupt #5 (GIO5) */
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#define DM320_IRQ_EXT6 27 /* IRQ27: External Interrupt #6 (GIO6) */
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#define DM320_IRQ_EXT7 28 /* IRQ28: External Interrupt #7 (GIO7) */
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#define DM320_IRQ_EXT8 29 /* IRQ29: External Interrupt #8 (GIO8) */
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#define DM320_IRQ_EXT9 30 /* IRQ30: External Interrupt #9 (GIO9) */
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#define DM320_IRQ_EXT10 31 /* IRQ31: External Interrupt #10 (GIO10) */
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#define DM320_IRQ_EXT11 32 /* IRQ32: External Interrupt #11 (GIO11) */
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#define DM320_IRQ_EXT12 33 /* IRQ33: External Interrupt #12 (GIO12) */
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#define DM320_IRQ_EXT13 34 /* IRQ34: External Interrupt #13 (GIO13) */
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#define DM320_IRQ_EXT14 35 /* IRQ35: External Interrupt #14 (GIO14) */
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#define DM320_IRQ_EXT15 36 /* IRQ36: External Interrupt #15 (GIO15) */
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#define DM320_IRQ_PREV0 37 /* IRQ37: Preview Engine 0 (Preview Over) */
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#define DM320_IRQ_PREV1 38 /* IRQ38: Preview Engine 1 (Preview Historgram Over) */
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#define DM320_IRQ_WDT 39 /* IRQ39: Watchdog Timer Interrupt */
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#define DM320_IRQ_I2C 40 /* IRQ40: I2C Interrupt */
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#define DM320_IRQ_CLKC 41 /* IRQ41: Clock controller Interrupt (wake up) */
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#define DM320_IRQ_E2ICE 42 /* IRQ42: Embedded ICE Interrupt */
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#define DM320_IRQ_ARMCOMRX 43 /* IRQ43: ARMCOMM Receive Interrupt */
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#define DM320_IRQ_ARMCOMTX 44 /* IRQ44: ARMCOMM Transmit Interrupt */
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#define DM320_IRQ_RSV 45 /* IRQ45: Reserved Interrupt */
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#define DM320_IRQ_SYSTIMER DM320_IRQ_TMR0
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#define NR_IRQS (DM320_IRQ_RSV+1)
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||||
/************************************************************
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||||
* Public Types
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||||
************************************************************/
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||||
@ -272,5 +222,5 @@ extern "C" {
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#endif
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||||
#endif
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||||
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#endif /* __ARCH_DM320_IRQ_H */
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||||
#endif /* __ARCH_IRQ_H */
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||||
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||||
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||||
@ -1,5 +1,5 @@
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||||
/************************************************************
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||||
* serial.h
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||||
* arch/serial.h
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||||
*
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||||
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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||||
@ -44,7 +44,7 @@
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||||
* Definitions
|
||||
************************************************************/
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||||
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||||
/* IOCTL commands supported by the DM320 serial driver */
|
||||
/* IOCTL commands supported by the ARM serial driver */
|
||||
|
||||
#define TIOCSBRK 0x5401 /* BSD compatibility */
|
||||
#define TIOCCBRK 0x5402 /* " " " " */
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/************************************************************
|
||||
* types.h
|
||||
* arch/types.h
|
||||
*
|
||||
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
|
||||
@ -37,8 +37,8 @@
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||||
* only indirectly through sys/types.h
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||||
*/
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||||
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||||
#ifndef __ARCH_DM320_TYPES_H
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||||
#define __ARCH_DM320_TYPES_H
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||||
#ifndef __ARCH_TYPES_H
|
||||
#define __ARCH_TYPES_H
|
||||
|
||||
/************************************************************
|
||||
* Included Files
|
||||
@ -79,4 +79,4 @@ typedef unsigned int irqstate_t;
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||||
* Global Function Prototypes
|
||||
************************************************************/
|
||||
|
||||
#endif /* __ARCH_DM320_TYPES_H */
|
||||
#endif /* __ARCH_TYPES_H */
|
||||
|
||||
@ -40,6 +40,8 @@
|
||||
# CONFIG_ARCH_name - for use in C code. This identifies the
|
||||
# particular chip or SoC that the architecture is implemented
|
||||
# in.
|
||||
# CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
|
||||
# CONFIG_ARCH_CHIP_name - For use in C code
|
||||
# CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence,
|
||||
# the board that supports the particular chip or SoC.
|
||||
# CONFIG_ARCH_BOARD_name - for use in C code
|
||||
@ -51,6 +53,8 @@
|
||||
#
|
||||
CONFIG_ARCH=c5471
|
||||
CONFIG_ARCH_C5471=y
|
||||
CONFIG_ARCH_CHIP=c5471
|
||||
CONFIG_ARCH_CHIP_C5471=y
|
||||
CONFIG_ARCH_BOARD=c5471evm
|
||||
CONFIG_ARCH_BOARD_C5471EVM=y
|
||||
CONFIG_ROM_VECTORS=n
|
||||
|
||||
@ -40,6 +40,8 @@
|
||||
# CONFIG_ARCH_name - for use in C code. This identifies the
|
||||
# particular chip or SoC that the architecture is implemented
|
||||
# in.
|
||||
# CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
|
||||
# CONFIG_ARCH_CHIP_name - For use in C code
|
||||
# CONFIG_ARCH_BOARD - identifies the configs subdirectory and, hence,
|
||||
# the board that supports the particular chip or SoC.
|
||||
# CONFIG_ARCH_BOARD_name - for use in C code
|
||||
@ -49,6 +51,8 @@
|
||||
#
|
||||
CONFIG_ARCH=dm320
|
||||
CONFIG_ARCH_DM320=y
|
||||
CONFIG_ARCH_CHIP=dm320
|
||||
CONFIG_ARCH_CHIP_DM320=y
|
||||
CONFIG_ARCH_BOARD=ntosd-dm320
|
||||
CONFIG_ARCH_BOARD_NTOSD_DM320=y
|
||||
CONFIG_ROM_VECTORS=n
|
||||
|
||||
Loading…
Reference in New Issue
Block a user