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Add basic GPIO configuration logic (more to be done)

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3879 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2011-08-14 19:00:16 +00:00
parent 482f58ecd2
commit f1219b0836
3 changed files with 522 additions and 129 deletions
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450
arch/arm/src/kinetis/kinetis_gpio.c
View File

@ -1,106 +1,344 @@
/**************************************************************************** /****************************************************************************
* arch/arm/src/kinetis/kinetis_gpio.c * arch/arm/src/kinetis/kinetis_gpio.c
* *
* Copyright (C) 2011 Gregory Nutt. All rights reserved. * Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr> * Author: Gregory Nutt <spudmonkey@racsa.co.cr>
* *
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions * modification, are permitted provided that the following conditions
* are met: * are met:
* *
* 1. Redistributions of source code must retain the above copyright * 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright * 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in * notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the * the documentation and/or other materials provided with the
* distribution. * distribution.
* 3. Neither the name NuttX nor the names of its contributors may be * 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software * used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************
* Included Files * Included Files
****************************************************************************/ ****************************************************************************/
#include <nuttx/config.h> #include <nuttx/config.h>
#include <arch/board/board.h> #include <arch/board/board.h>
#include <errno.h> #include <assert.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/arch.h>
#include "up_internal.h"
#include "kinetis_gpio.h" #include "up_arch.h"
#include "up_internal.h"
/****************************************************************************
* Pre-processor Definitions #include "kinetis_memorymap.h"
****************************************************************************/ #include "kinetis_internal.h"
#include "kinetis_port.h"
/**************************************************************************** #include "kinetis_gpio.h"
* Private Data
****************************************************************************/ /****************************************************************************
* Pre-processor Definitions
/**************************************************************************** ****************************************************************************/
* Private Functions
****************************************************************************/ /****************************************************************************
* Private Data
/**************************************************************************** ****************************************************************************/
* Public Functions
****************************************************************************/ /****************************************************************************
* Private Functions
/**************************************************************************** ****************************************************************************/
* Name: kinetis_configgpio
* /****************************************************************************
* Description: * Public Functions
* Configure a GPIO pin based on bit-encoded description of the pin. ****************************************************************************/
*
****************************************************************************/ /****************************************************************************
* Name: kinetis_configgpio
int kinetis_configgpio(uint32_t cfgset) *
{ * Description:
# warning "Missing logic" * Configure a GPIO pin based on bit-encoded description of the pin.
return -ENOSYS; *
} ****************************************************************************/
/**************************************************************************** int kinetis_configgpio(uint32_t cfgset)
* Name: kinetis_gpiowrite {
* uintptr_t base;
* Description: uint32_t regval;
* Write one or zero to the selected GPIO pin unsigned int port;
* unsigned int pin;
****************************************************************************/ unsigned int mode;
void kinetis_gpiowrite(uint32_t pinset, bool value) /* Get the port number and pin number */
{
# warning "Missing logic" port = (cfgset & _GPIO_PORT_MASK) >> _GPIO_PORT_SHIFT;
} pin = (cfgset & _GPIO_PIN_MASK) >> _GPIO_PIN_SHIFT;
/**************************************************************************** DEBUGASSERT(port < KINETIS_NPORTS);
* Name: kinetis_gpioread if (port < KINETIS_NPORTS)
* {
* Description: /* Get the base address of PORT block for this port */
* Read one or zero from the selected GPIO pin
* base = KINETIS_PORT_BASE(port);
****************************************************************************/
/* Get the port mode */
bool kinetis_gpioread(uint32_t pinset)
{ mode = (cfgset & _GPIO_MODE_MASK) >> _GPIO_MODE_SHIFT;
# warning "Missing logic"
return false; /* Special case analog port mode. In this case, not of the digital
} * options are applicable.
*/
if (mode == _GPIO_MODE_ANALOG)
{
/* Set the analog mode with all digital options zeroed */
regval = PORT_PCR_MUX_ANALOG | PORT_PCR_IRQC_DISABLED;
putreg32(regval, base + KINETIS_PORT_PCR_OFFSET(pin));
}
else
{
/* Configure the digital pin options */
regval = (mode << PORT_PCR_MUX_SHIFT);
if ((cfgset & _GPIO_IO_MASK) == _GPIO_INPUT)
{
/* Handle input-only digital options */
/* Check for pull-up or pull-down */
if ((cfgset & _GPIO_INPUT_PULLMASK) == _GPIO_INPUT_PULLDOWN)
{
regval |= PORT_PCR_PE;
}
else if ((cfgset & _GPIO_INPUT_PULLMASK) == _GPIO_INPUT_PULLUP)
{
regval |= (PORT_PCR_PE | PORT_PCR_PS);
}
# warning "Missing interrupt configuration logic"
}
else
{
/* Handle output-only digital options */
/* Check for slow slew rate setting */
if ((cfgset & _GPIO_OUTPUT_SLEW_MASK) == _GPIO_OUTPUT_SLOW)
{
regval |= PORT_PCR_SRE;
}
/* Check for open drain output */
if ((cfgset & _GPIO_OUTPUT_OD_MASK) == _GPIO_OUTPUT_OPENDRAIN)
{
regval |= PORT_PCR_ODE;
}
/* Check for high drive output */
if ((cfgset & _GPIO_OUTPUT_DRIVE_MASK) == _GPIO_OUTPUT_HIGHDRIVE)
{
regval |= PORT_PCR_DSE;
}
}
/* Check for passive filter enable. Passive Filter configuration
* is valid in all digital pin muxing modes.
*/
if ((cfgset & GPIO_PASV_FILTER) != 0)
{
regval |= PORT_PCR_PFE;
}
/* Set the digital mode with all of the selected options */
putreg32(regval, base + KINETIS_PORT_PCR_OFFSET(pin));
/* Check for digital filter enable. Digital Filter configuration
* is valid in all digital pin muxing modes.
*/
regval = getreg32(base + KINETIS_PORT_DFER_OFFSET);
if ((cfgset & GPIO_DIG_FILTER) != 0)
{
regval |= (1 << pin);
}
else
{
regval &= ~(1 << pin);
}
putreg32(regval, base + KINETIS_PORT_DFER_OFFSET);
/* Additional configuration for the case of Alternative 1 (GPIO) modes */
if (mode == _GPIO_MODE_GPIO)
{
/* Set the GPIO port direction */
base = KINETIS_GPIO_BASE(port);
regval = getreg32(base + KINETIS_GPIO_PDDR_OFFSET);
if ((cfgset & _GPIO_IO_MASK) == _GPIO_INPUT)
{
/* Select GPIO input */
regval &= ~(1 << pin);
putreg32(regval, base + KINETIS_GPIO_PDDR_OFFSET);
}
else /* if ((cfgset & _GPIO_IO_MASK) == _GPIO_OUTPUT) */
{
/* Select GPIO input */
regval |= (1 << pin);
putreg32(regval, base + KINETIS_GPIO_PDDR_OFFSET);
/* Set the initial value of the GPIO output */
kinetis_gpiowrite(cfgset, ((cfgset & GPIO_OUTPUT_ONE) != 0));
}
}
}
return OK;
}
return -EINVAL;
}
/************************************************************************************
* Name: kinetis_configfilter
*
* Description:
* Configure the digital filter associated with a port. The digital filter
* capabilities of the PORT module are available in all digital pin muxing modes.
*
* Input parmeters:
* port - Port number. See KINETIS_PORTn definitions in kinetis_port.h
* lpo - true: Digital Filters are clocked by the bus clock
* false: Digital Filters are clocked by the 1 kHz LPO clock
* width - Filter Length
*
************************************************************************************/
int kinetis_configfilter(unsigned int port, bool lpo, unsigned int width)
{
uintptr_t base;
uint32_t regval;
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Get the base address of PORT block for this port */
base = KINETIS_PORT_BASE(port);
/* Select clocking */
regval = (lpo ? PORT_DFCR_CS : 0);
putreg32(regval, base + KINETIS_PORT_DFCR_OFFSET);
/* Select the filter width */
DEBUGASSERT(width < 32);
putreg32(width, base + KINETIS_PORT_DFWR_OFFSET);
return OK;
}
return -EINVAL;
}
/****************************************************************************
* Name: kinetis_gpiowrite
*
* Description:
* Write one or zero to the selected GPIO pin
*
****************************************************************************/
void kinetis_gpiowrite(uint32_t pinset, bool value)
{
uintptr_t base;
unsigned int port;
unsigned int pin;
DEBUGASSERT((pinset & _GPIO_IO_MASK) == _GPIO_OUTPUT);
/* Get the port number and pin number */
port = (pinset & _GPIO_PORT_MASK) >> _GPIO_PORT_SHIFT;
pin = (pinset & _GPIO_PIN_MASK) >> _GPIO_PIN_SHIFT;
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Get the base address of GPIO block for this port */
base = KINETIS_GPIO_BASE(port);
/* Set or clear the output */
if (value)
{
putreg32((1 << pin), base + KINETIS_GPIO_PSOR_OFFSET);
}
else
{
putreg32((1 << pin), base + KINETIS_GPIO_PCOR_OFFSET);
}
}
}
/****************************************************************************
* Name: kinetis_gpioread
*
* Description:
* Read one or zero from the selected GPIO pin
*
****************************************************************************/
bool kinetis_gpioread(uint32_t pinset)
{
uintptr_t base;
uint32_t regval;
unsigned int port;
unsigned int pin;
bool ret = false;
DEBUGASSERT((pinset & _GPIO_IO_MASK) == _GPIO_INPUT);
/* Get the port number and pin number */
port = (pinset & _GPIO_PORT_MASK) >> _GPIO_PORT_SHIFT;
pin = (pinset & _GPIO_PIN_MASK) >> _GPIO_PIN_SHIFT;
DEBUGASSERT(port < KINETIS_NPORTS);
if (port < KINETIS_NPORTS)
{
/* Get the base address of GPIO block for this port */
base = KINETIS_GPIO_BASE(port);
/* return the state of the pin */
regval = getreg32(base + KINETIS_GPIO_PDIR_OFFSET);
ret = ((regval & (1 << pin)) != 0);
}
return ret;
}

200
arch/arm/src/kinetis/kinetis_internal.h
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@ -59,9 +59,9 @@
/* Configuration ********************************************************************/ /* Configuration ********************************************************************/
/* Bit-encoded input to kinetis_configgpio() ****************************************/ /* Bit-encoded input to kinetis_configgpio() ****************************************/
/* General form (32-bits, only 20 bits are unused in the encoding): /* General form (32-bits, only 22 bits are unused in the encoding):
* *
* oooo mmmf iiii ---- ---- -ppp ---b bbbb * oooo mmmv iiii fd-- ---- -ppp ---b bbbb
*/ */
/* Bits 25-31: 7 bits are used to encode the basic pin configuration: /* Bits 25-31: 7 bits are used to encode the basic pin configuration:
@ -77,6 +77,8 @@
#define _GPIO_OPTIONS_SHIFT (28) /* Bits 28-31: Pin mode options */ #define _GPIO_OPTIONS_SHIFT (28) /* Bits 28-31: Pin mode options */
#define _GPIO_OPTIONS_MASK (15 << _GPIO_OPTIONS_SHIFT) #define _GPIO_OPTIONS_MASK (15 << _GPIO_OPTIONS_SHIFT)
/* Port Modes */
#define _GPIO_MODE_ANALOG (0) /* 000 Pin Disabled (Analog) */ #define _GPIO_MODE_ANALOG (0) /* 000 Pin Disabled (Analog) */
#define _GPIO_MODE_GPIO (1) /* 001 Alternative 1 (GPIO) */ #define _GPIO_MODE_GPIO (1) /* 001 Alternative 1 (GPIO) */
#define _GPIO_MODE_ALT2 (2) /* 010 Alternative 2 */ #define _GPIO_MODE_ALT2 (2) /* 010 Alternative 2 */
@ -86,25 +88,32 @@
#define _GPIO_MODE_ALT6 (6) /* 110 Alternative 6 */ #define _GPIO_MODE_ALT6 (6) /* 110 Alternative 6 */
#define _GPIO_MODE_ALT7 (7) /* 111 Alternative 7 */ #define _GPIO_MODE_ALT7 (7) /* 111 Alternative 7 */
#define _GPIO_IO_MASK (1) /* xxx1 GPIO input/output mask */ /* Options for all digital modes (Alternatives 1-7). None of the digital
#define _GPIO_INPUT (0) /* xxx0 GPIO input */ * options apply if the analog mode is selected.
#define _GPIO_INPUT_PULLMASK (6) /* x11x Mask for pull-up or -down bits */ */
#define _GPIO_INPUT_PULLENABLE (2) /* x010 Enables pull-up or -down */
#define _GPIO_IO_MASK (1) /* xxx1 Digital input/output mask */
#define _GPIO_INPUT (0) /* xxx0 Digital input */
#define _GPIO_OUTPUT (1) /* xxx1 Digital output */
#define _GPIO_INPUT_PULLMASK (7) /* x111 Mask for pull-up or -down bits */
#define _GPIO_INPUT_PULLDOWN (2) /* x010 Input with internal pull-down resistor */ #define _GPIO_INPUT_PULLDOWN (2) /* x010 Input with internal pull-down resistor */
#define _GPIO_INPUT_PULLUP (6) /* x110 Input with internal pull-up resistor */ #define _GPIO_INPUT_PULLUP (6) /* x110 Input with internal pull-up resistor */
#define _GPIO_INPUT_FILTER_MASK (8) /* 1xxx Mask to test if passive filter enabled */
#define _GPIO_INPUT_FILTER (8) /* 1xx0 Input with passive filter enabled */
#define _GPIO_OUTPUT (1) /* xxx1 GPIO output */ #define _GPIO_OUTPUT_SLEW_MASK (3) /* xx11 Mask to test for slow slew rate */
#define _GPIO_OUTPUT_SLEW_MASK (2) /* xx1x Mask to test for slow slew rate */
#define _GPIO_OUTPUT_FAST (1) /* xx01 Output with fast slew rate */ #define _GPIO_OUTPUT_FAST (1) /* xx01 Output with fast slew rate */
#define _GPIO_OUTPUT_SLOW (3) /* xx11 Output with slow slew rate */ #define _GPIO_OUTPUT_SLOW (3) /* xx11 Output with slow slew rate */
#define _GPIO_OUTPUT_OD_MASK (4) /* x1xx Mask to test for open drain */ #define _GPIO_OUTPUT_OD_MASK (5) /* x1x1 Mask to test for open drain */
#define _GPIO_OUTPUT_OPENDRAIN (5) /* x1x1 Output with open drain enabled */ #define _GPIO_OUTPUT_OPENDRAIN (5) /* x1x1 Output with open drain enabled */
#define _GPIO_OUTPUT_DRIVE_MASK (4) /* 1xxx Mask to test for high drive strengh */ #define _GPIO_OUTPUT_DRIVE_MASK (9) /* 1xx1 Mask to test for high drive strengh */
#define _GPIO_OUTPUT_LOWDRIVE (1) /* 0xx1 Output with low drive strength */ #define _GPIO_OUTPUT_LOWDRIVE (1) /* 0xx1 Output with low drive strength */
#define _GPIO_OUTPUT_HIGHDRIVE (9) /* 1xx1 Output with high drive strength */ #define _GPIO_OUTPUT_HIGHDRIVE (9) /* 1xx1 Output with high drive strength */
/* End-user pin modes and configurations. Notes: (1) None of the digital options
* are available for the analog mode, (2) digital settings may be combined (OR'ed)
* provided that input-only and output-only options are not intermixed.
*/
#define GPIO_ANALOG (_GPIO_MODE_ANALOG << _GPIO_MODE_SHIFT) #define GPIO_ANALOG (_GPIO_MODE_ANALOG << _GPIO_MODE_SHIFT)
#define GPIO_INPUT ((_GPIO_MODE_GPIO << _GPIO_MODE_SHIFT) | \ #define GPIO_INPUT ((_GPIO_MODE_GPIO << _GPIO_MODE_SHIFT) | \
@ -113,9 +122,6 @@
(_GPIO_INPUT_PULLDOWN << _GPIO_OPTIONS_SHIFT)) (_GPIO_INPUT_PULLDOWN << _GPIO_OPTIONS_SHIFT))
#define GPIO_PULLUP ((_GPIO_MODE_GPIO << _GPIO_MODE_SHIFT) | \ #define GPIO_PULLUP ((_GPIO_MODE_GPIO << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_PULLUP << _GPIO_OPTIONS_SHIFT)) (_GPIO_INPUT_PULLUP << _GPIO_OPTIONS_SHIFT))
#define GPIO_FILTER ((_GPIO_MODE_GPIO << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_FILTER << _GPIO_OPTIONS_SHIFT))
#define GPIO_OUTPUT ((_GPIO_MODE_GPIO << _GPIO_MODE_SHIFT) | \ #define GPIO_OUTPUT ((_GPIO_MODE_GPIO << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT << _GPIO_OPTIONS_SHIFT)) (_GPIO_OUTPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_FAST ((_GPIO_MODE_GPIO << _GPIO_MODE_SHIFT) | \ #define GPIO_FAST ((_GPIO_MODE_GPIO << _GPIO_MODE_SHIFT) | \
@ -130,22 +136,153 @@
(_GPIO_OUTPUT_HIGHDRIVE << _GPIO_OPTIONS_SHIFT)) (_GPIO_OUTPUT_HIGHDRIVE << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT2 (_GPIO_MODE_ALT2 << _GPIO_MODE_SHIFT) #define GPIO_ALT2 (_GPIO_MODE_ALT2 << _GPIO_MODE_SHIFT)
#define GPIO_ALT3 (_GPIO_MODE_ALT3 << _GPIO_MODE_SHIFT) #define GPIO_ALT2_INPUT ((_GPIO_MODE_ALT2 << _GPIO_MODE_SHIFT) | \
#define GPIO_ALT4 (_GPIO_MODE_ALT4 << _GPIO_MODE_SHIFT) (_GPIO_INPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT5 (_GPIO_MODE_ALT5 << _GPIO_MODE_SHIFT) #define GPIO_ALT2_PULLDOWN ((_GPIO_MODE_ALT2 << _GPIO_MODE_SHIFT) | \
#define GPIO_ALT6 (_GPIO_MODE_ALT6 << _GPIO_MODE_SHIFT) (_GPIO_INPUT_PULLDOWN << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT7 (_GPIO_MODE_ALT7 << _GPIO_MODE_SHIFT) #define GPIO_ALT2_PULLUP ((_GPIO_MODE_ALT2 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_PULLUP << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT2_OUTPUT ((_GPIO_MODE_ALT2 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT2_FAST ((_GPIO_MODE_ALT2 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_FAST << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT2_SLOW ((_GPIO_MODE_ALT2 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_SLOW << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT2_OPENDRAIN ((_GPIO_MODE_ALT2 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_LOWDRIVE << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT2_LOWDRIVE ((_GPIO_MODE_ALT2 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_OPENDRAIN << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT2_HIGHDRIVE ((_GPIO_MODE_ALT2 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_HIGHDRIVE << _GPIO_OPTIONS_SHIFT))
/* One bit is used to enable the digital filter: #define GPIO_ALT3 (_GPIO_MODE_ALT3 << _GPIO_MODE_SHIFT)
#define GPIO_ALT3_INPUT ((_GPIO_MODE_ALT3 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT3_PULLDOWN ((_GPIO_MODE_ALT3 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_PULLDOWN << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT3_PULLUP ((_GPIO_MODE_ALT3 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_PULLUP << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT3_OUTPUT ((_GPIO_MODE_ALT3 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT3_FAST ((_GPIO_MODE_ALT3 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_FAST << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT3_SLOW ((_GPIO_MODE_ALT3 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_SLOW << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT3_OPENDRAIN ((_GPIO_MODE_ALT3 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_LOWDRIVE << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT3_LOWDRIVE ((_GPIO_MODE_ALT3 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_OPENDRAIN << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT3_HIGHDRIVE ((_GPIO_MODE_ALT3 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_HIGHDRIVE << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT4 (_GPIO_MODE_ALT4 << _GPIO_MODE_SHIFT)
#define GPIO_ALT4_INPUT ((_GPIO_MODE_ALT4 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT4_PULLDOWN ((_GPIO_MODE_ALT4 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_PULLDOWN << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT4_PULLUP ((_GPIO_MODE_ALT4 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_PULLUP << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT4_OUTPUT ((_GPIO_MODE_ALT4 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT4_FAST ((_GPIO_MODE_ALT4 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_FAST << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT4_SLOW ((_GPIO_MODE_ALT4 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_SLOW << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT4_OPENDRAIN ((_GPIO_MODE_ALT4 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_LOWDRIVE << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT4_LOWDRIVE ((_GPIO_MODE_ALT4 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_OPENDRAIN << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT4_HIGHDRIVE ((_GPIO_MODE_ALT4 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_HIGHDRIVE << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT5 (_GPIO_MODE_ALT5 << _GPIO_MODE_SHIFT)
#define GPIO_ALT5_INPUT ((_GPIO_MODE_ALT5 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT5_PULLDOWN ((_GPIO_MODE_ALT5 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_PULLDOWN << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT5_PULLUP ((_GPIO_MODE_ALT5 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_PULLUP << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT5_OUTPUT ((_GPIO_MODE_ALT5 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT5_FAST ((_GPIO_MODE_ALT5 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_FAST << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT5_SLOW ((_GPIO_MODE_ALT5 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_SLOW << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT5_OPENDRAIN ((_GPIO_MODE_ALT5 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_LOWDRIVE << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT5_LOWDRIVE ((_GPIO_MODE_ALT5 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_OPENDRAIN << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT5_HIGHDRIVE ((_GPIO_MODE_ALT5 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_HIGHDRIVE << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT6 (_GPIO_MODE_ALT6 << _GPIO_MODE_SHIFT)
#define GPIO_ALT6_INPUT ((_GPIO_MODE_ALT6 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT6_PULLDOWN ((_GPIO_MODE_ALT6 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_PULLDOWN << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT6_PULLUP ((_GPIO_MODE_ALT6 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_PULLUP << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT6_OUTPUT ((_GPIO_MODE_ALT6 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT6_FAST ((_GPIO_MODE_ALT6 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_FAST << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT6_SLOW ((_GPIO_MODE_ALT6 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_SLOW << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT6_OPENDRAIN ((_GPIO_MODE_ALT6 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_LOWDRIVE << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT6_LOWDRIVE ((_GPIO_MODE_ALT6 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_OPENDRAIN << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT6_HIGHDRIVE ((_GPIO_MODE_ALT6 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_HIGHDRIVE << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT7 (_GPIO_MODE_ALT7 << _GPIO_MODE_SHIFT)
#define GPIO_ALT7_INPUT ((_GPIO_MODE_ALT7 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT7_PULLDOWN ((_GPIO_MODE_ALT7 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_PULLDOWN << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT7_PULLUP ((_GPIO_MODE_ALT7 << _GPIO_MODE_SHIFT) | \
(_GPIO_INPUT_PULLUP << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT7_OUTPUT ((_GPIO_MODE_ALT7 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT7_FAST ((_GPIO_MODE_ALT7 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_FAST << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT7_SLOW ((_GPIO_MODE_ALT7 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_SLOW << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT7_OPENDRAIN ((_GPIO_MODE_ALT7 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_LOWDRIVE << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT7_LOWDRIVE ((_GPIO_MODE_ALT7 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_OPENDRAIN << _GPIO_OPTIONS_SHIFT))
#define GPIO_ALT7_HIGHDRIVE ((_GPIO_MODE_ALT7 << _GPIO_MODE_SHIFT) | \
(_GPIO_OUTPUT_HIGHDRIVE << _GPIO_OPTIONS_SHIFT))
/* The initial value for GPIO (Alternative 1 outputs):
* *
* ---- ---f ---- ---- ---- ---- ---- ---- * ---- ---v ---- ---- ---- ---- ---- ----
*
* Passive Filter and digital filter enable are valid in all digital pin
* muxing modes.
*/ */
#define GPIO_DIGFILTER (1 << 24) /* Bit 24: Enable digital filter */ #define GPIO_OUTPUT_ONE (1 << 24) /* Bit 24: 1:Initial output value=1 */
#define GPIO_OUTPUT_ZER0 (0) /* Bit 24: 0:Initial output value=0 */
/* One bit is used to enable the passive filter:
*
* ---- ---- ---- fd-- ---- ---- ---- ----
*
* Passive Filter and digital filter enable are valid in all digital pin
* muxing modes.
*/
#define GPIO_PASV_FILTER (1 << 19) /* Bit 19: Enable passive filter */
#define GPIO_DIG_FILTER (1 << 18) /* Bit 18: Enable digital filter */
/* Four bits are used to incode DMA/interupt options: /* Four bits are used to incode DMA/interupt options:
* *
* ---- ---- iiii ---- ---- ---- ---- ---- * ---- ---- iiii ---- ---- ---- ---- ----
*
* The pin interrupt configuration is valid in all digital pin muxing modes
* (restricted to inputs).
*/ */
#define _GPIO_INT_SHIFT (20) #define _GPIO_INT_SHIFT (20)
@ -371,6 +508,23 @@ EXTERN void kinetis_gpioirqinitialize(void);
EXTERN int kinetis_configgpio(uint32_t cfgset); EXTERN int kinetis_configgpio(uint32_t cfgset);
/************************************************************************************
* Name: kinetis_configfilter
*
* Description:
* Configure the digital filter associated with a port. The digital filter
* capabilities of the PORT module are available in all digital pin muxing modes.
*
* Input parmeters:
* port - See KINETIS_PORTn definitions in kinetis_port.h
* lpo - true: Digital Filters are clocked by the bus clock
* false: Digital Filters are clocked by the 1 kHz LPO clock
* width - Filter Length
*
************************************************************************************/
EXTERN int kinetis_configfilter(unsigned int port, bool lpo, unsigned int width);
/************************************************************************************ /************************************************************************************
* Name: kinetis_gpiowrite * Name: kinetis_gpiowrite
* *

1
arch/arm/src/kinetis/kinetis_port.h
View File

@ -54,6 +54,7 @@
#define KINETIS_PORTC (2) #define KINETIS_PORTC (2)
#define KINETIS_PORTD (3) #define KINETIS_PORTD (3)
#define KINETIS_PORTE (4) #define KINETIS_PORTE (4)
#define KINETIS_NPORTS (5)
/* Register Offsets *****************************************************************/ /* Register Offsets *****************************************************************/