Changes to Kconfig and matching defconfig files
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5085 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
parent
c2b5090825
commit
f19b449061
@ -93,7 +93,7 @@ CONFIG_USART0_RXBUFSIZE=256
|
||||
CONFIG_USART0_BAUD=38400
|
||||
CONFIG_USART0_BITS=8
|
||||
CONFIG_USART0_PARITY=0
|
||||
CONFIG_USART0_2STOP=0
|
||||
CONFIG_USART0_2STOP=n
|
||||
|
||||
CONFIG_USART1_SERIAL_CONSOLE=n
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
@ -101,7 +101,7 @@ CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART1_BAUD=38400
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -125,9 +125,9 @@ CONFIG_USART0_PARITY=0
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
|
||||
CONFIG_USART0_2STOP=0
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART0_2STOP=n
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -125,9 +125,9 @@ CONFIG_USART0_PARITY=0
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
|
||||
CONFIG_USART0_2STOP=0
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART0_2STOP=n
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -49,7 +49,7 @@ CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x11000000
|
||||
CONFIG_DRAM_SIZE=285212672
|
||||
|
||||
#
|
||||
# C5471 specific device driver settings
|
||||
@ -67,8 +67,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
|
||||
#
|
||||
# C5471 Ethernet Driver settings
|
||||
|
@ -49,7 +49,7 @@ CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x11000000
|
||||
CONFIG_DRAM_SIZE=285212672
|
||||
|
||||
#
|
||||
# General build options
|
||||
@ -75,8 +75,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
|
||||
#
|
||||
# C5471 Ethernet Driver settings
|
||||
|
@ -49,7 +49,7 @@ CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x11000000
|
||||
CONFIG_DRAM_SIZE=285212672
|
||||
|
||||
#
|
||||
# C5471 specific device driver settings
|
||||
@ -67,8 +67,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
|
||||
#
|
||||
# C5471 Ethernet Driver settings
|
||||
|
@ -49,7 +49,7 @@ CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x11000000
|
||||
CONFIG_DRAM_SIZE=285212672
|
||||
|
||||
#
|
||||
# C5471 specific device driver settings
|
||||
@ -67,8 +67,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
|
||||
#
|
||||
# C5471 Ethernet Driver settings
|
||||
|
@ -49,7 +49,7 @@ CONFIG_ARCH_INTERRUPTSTACK=1024
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x00840000
|
||||
CONFIG_DRAM_SIZE=8650752
|
||||
|
||||
#
|
||||
# C5471 specific device driver settings
|
||||
@ -68,8 +68,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
CONFIG_STDIO_LINE_BUFFER=y
|
||||
|
||||
#
|
||||
|
@ -52,7 +52,7 @@ CONFIG_ARCH_INTERRUPTSTACK=1024
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x00840000
|
||||
CONFIG_DRAM_SIZE=8650752
|
||||
|
||||
#
|
||||
# C5471 specific device driver settings
|
||||
@ -71,8 +71,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
CONFIG_STDIO_LINE_BUFFER=y
|
||||
|
||||
#
|
||||
|
@ -52,7 +52,7 @@ CONFIG_ARCH_INTERRUPTSTACK=1024
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
CONFIG_DRAM_START=0
|
||||
CONFIG_DRAM_SIZE=0x00840000
|
||||
CONFIG_DRAM_SIZE=8650752
|
||||
|
||||
#
|
||||
# C5471 specific device driver settings
|
||||
@ -71,8 +71,8 @@ CONFIG_UART_IRDA_BITS=8
|
||||
CONFIG_UART_MODEM_BITS=8
|
||||
CONFIG_UART_IRDA_PARITY=0
|
||||
CONFIG_UART_MODEM_PARITY=0
|
||||
CONFIG_UART_IRDA_2STOP=0
|
||||
CONFIG_UART_MODEM_2STOP=0
|
||||
CONFIG_UART_IRDA_2STOP=n
|
||||
CONFIG_UART_MODEM_2STOP=n
|
||||
CONFIG_STDIO_LINE_BUFFER=y
|
||||
|
||||
#
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_MCS92S12NEC64=y
|
||||
CONFIG_ARCH_BOARD="demo9s12ne64"
|
||||
CONFIG_ARCH_BOARD_DEMOS92S12NEC64=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_NOINTC=y
|
||||
CONFIG_ARCH_IRQPRIO=n
|
||||
@ -77,7 +77,7 @@ CONFIG_SCI0_RXBUFSIZE=32
|
||||
CONFIG_SCI0_BAUD=115200
|
||||
CONFIG_SCI0_BITS=8
|
||||
CONFIG_SCI0_PARITY=0
|
||||
CONFIG_SCI0_2STOP=0
|
||||
CONFIG_SCI0_2STOP=n
|
||||
|
||||
CONFIG_SCI1_SERIAL_CONSOLE=n
|
||||
CONFIG_SCI1_TXBUFSIZE=32
|
||||
@ -85,7 +85,7 @@ CONFIG_SCI1_RXBUFSIZE=32
|
||||
CONFIG_SCI1_BAUD=115200
|
||||
CONFIG_SCI1_BITS=8
|
||||
CONFIG_SCI1_PARITY=0
|
||||
CONFIG_SCI1_2STOP=0
|
||||
CONFIG_SCI1_2STOP=n
|
||||
|
||||
#
|
||||
# MC9S12NEC64 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD="ea3131"
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x00030000
|
||||
CONFIG_DRAM_SIZE=196608
|
||||
CONFIG_DRAM_START=0x11028000
|
||||
CONFIG_DRAM_VSTART=0x11028000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@ -99,7 +99,7 @@ CONFIG_UART_RXBUFSIZE=256
|
||||
CONFIG_UART_BAUD=115200
|
||||
CONFIG_UART_BITS=8
|
||||
CONFIG_UART_PARITY=0
|
||||
CONFIG_UART_2STOP=0
|
||||
CONFIG_UART_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD="ea3131"
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x00030000
|
||||
CONFIG_DRAM_SIZE=196608
|
||||
CONFIG_DRAM_START=0x11028000
|
||||
CONFIG_DRAM_VSTART=0x11028000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@ -99,7 +99,7 @@ CONFIG_UART_RXBUFSIZE=256
|
||||
CONFIG_UART_BAUD=115200
|
||||
CONFIG_UART_BITS=8
|
||||
CONFIG_UART_PARITY=0
|
||||
CONFIG_UART_2STOP=0
|
||||
CONFIG_UART_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD="ea3131"
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x00030000
|
||||
CONFIG_DRAM_SIZE=196608
|
||||
CONFIG_DRAM_START=0x11028000
|
||||
CONFIG_DRAM_VSTART=0x11028000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@ -99,7 +99,7 @@ CONFIG_UART_RXBUFSIZE=256
|
||||
CONFIG_UART_BAUD=115200
|
||||
CONFIG_UART_BITS=8
|
||||
CONFIG_UART_PARITY=0
|
||||
CONFIG_UART_2STOP=0
|
||||
CONFIG_UART_2STOP=n
|
||||
|
||||
#
|
||||
# MP25x Configuration
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD="ea3131"
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x00030000
|
||||
CONFIG_DRAM_SIZE=196608
|
||||
CONFIG_DRAM_START=0x11028000
|
||||
CONFIG_DRAM_VSTART=0x11028000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@ -99,7 +99,7 @@ CONFIG_UART_RXBUFSIZE=256
|
||||
CONFIG_UART_BAUD=115200
|
||||
CONFIG_UART_BITS=8
|
||||
CONFIG_UART_PARITY=0
|
||||
CONFIG_UART_2STOP=0
|
||||
CONFIG_UART_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LPC3131=y
|
||||
CONFIG_ARCH_BOARD="ea3131"
|
||||
CONFIG_ARCH_BOARD_EA3131=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x00030000
|
||||
CONFIG_DRAM_SIZE=196608
|
||||
CONFIG_DRAM_START=0x11028000
|
||||
CONFIG_DRAM_VSTART=0x11028000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@ -99,7 +99,7 @@ CONFIG_UART_RXBUFSIZE=256
|
||||
CONFIG_UART_BAUD=115200
|
||||
CONFIG_UART_BITS=8
|
||||
CONFIG_UART_PARITY=0
|
||||
CONFIG_UART_2STOP=0
|
||||
CONFIG_UART_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LPC3152=y
|
||||
CONFIG_ARCH_BOARD="ea3152"
|
||||
CONFIG_ARCH_BOARD_EA3152=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x00030000
|
||||
CONFIG_DRAM_SIZE=196608
|
||||
CONFIG_DRAM_START=0x11028000
|
||||
CONFIG_DRAM_VSTART=0x11028000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@ -99,7 +99,7 @@ CONFIG_UART_RXBUFSIZE=256
|
||||
CONFIG_UART_BAUD=115200
|
||||
CONFIG_UART_BITS=8
|
||||
CONFIG_UART_PARITY=0
|
||||
CONFIG_UART_2STOP=0
|
||||
CONFIG_UART_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6918=y
|
||||
CONFIG_ARCH_BOARD="eagle100"
|
||||
CONFIG_ARCH_BOARD_EAGLE100=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -83,8 +83,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6918 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6918=y
|
||||
CONFIG_ARCH_BOARD="eagle100"
|
||||
CONFIG_ARCH_BOARD_EAGLE100=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -83,8 +83,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6918 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6918=y
|
||||
CONFIG_ARCH_BOARD="eagle100"
|
||||
CONFIG_ARCH_BOARD_EAGLE100=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -83,8 +83,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6918 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6918=y
|
||||
CONFIG_ARCH_BOARD="eagle100"
|
||||
CONFIG_ARCH_BOARD_EAGLE100=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -83,8 +83,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6918 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6918=y
|
||||
CONFIG_ARCH_BOARD="eagle100"
|
||||
CONFIG_ARCH_BOARD_EAGLE100=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -83,8 +83,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6918 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6918=y
|
||||
CONFIG_ARCH_BOARD="eagle100"
|
||||
CONFIG_ARCH_BOARD_EAGLE100=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -83,8 +83,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6918 specific SSI device driver settings
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_CHIP_LM3S9B96=y
|
||||
CONFIG_ARCH_BOARD="ekk-lm3s9b96"
|
||||
CONFIG_ARCH_BOARD_EKKLM3S9B96=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00018000
|
||||
CONFIG_DRAM_SIZE=98304
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -99,9 +99,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6B96 specific SSI device driver settings
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_CHIP_LM3S9B96=y
|
||||
CONFIG_ARCH_BOARD="ekk-lm3s9b96"
|
||||
CONFIG_ARCH_BOARD_EKKLM3S9B96=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00018000
|
||||
CONFIG_DRAM_SIZE=98304
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -99,9 +99,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6B96 specific SSI device driver settings
|
||||
|
@ -68,8 +68,8 @@ CONFIG_UART0_BAUD=57600
|
||||
CONFIG_UART1_BAUD=57600
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
@ -71,8 +71,8 @@ CONFIG_UART0_BITS=0
|
||||
CONFIG_UART1_BITS=0
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
@ -71,8 +71,8 @@ CONFIG_UART0_BITS=0
|
||||
CONFIG_UART1_BITS=0
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
@ -71,8 +71,8 @@ CONFIG_UART0_BITS=0
|
||||
CONFIG_UART1_BITS=0
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
@ -71,8 +71,8 @@ CONFIG_UART0_BITS=0
|
||||
CONFIG_UART1_BITS=0
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
@ -70,8 +70,8 @@ CONFIG_UART0_BITS=0
|
||||
CONFIG_UART1_BITS=0
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
@ -71,8 +71,8 @@ CONFIG_UART0_BITS=0
|
||||
CONFIG_UART1_BITS=0
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# ez80 EMAC
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_STM32F103VCT6=y
|
||||
CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -116,44 +116,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103Z specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_STM32F103VCT6=y
|
||||
CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -114,44 +114,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103V specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_STM32F103VCT6=y
|
||||
CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -119,44 +119,44 @@ CONFIG_STM32_TIM3_PARTIAL_REMAP=y
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103Z specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_STM32F103VCT6=y
|
||||
CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -114,44 +114,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103V specific SSI device driver settings
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -118,44 +118,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103V specific SSI device driver settings
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -116,44 +116,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103V specific SSI device driver settings
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="hymini-stm32v"
|
||||
CONFIG_ARCH_BOARD_HYMINI_STM32V=y
|
||||
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x0000C000
|
||||
CONFIG_DRAM_SIZE=49152
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -115,44 +115,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=n
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103V specific SSI device driver settings
|
||||
|
@ -128,10 +128,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -134,10 +134,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6432=y
|
||||
CONFIG_ARCH_BOARD="lm3s6432-s2e"
|
||||
CONFIG_ARCH_BOARD_LM3S6432S2E=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00008000
|
||||
CONFIG_DRAM_SIZE=32768
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -98,9 +98,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6432 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6432=y
|
||||
CONFIG_ARCH_BOARD="lm3s6432-s2e"
|
||||
CONFIG_ARCH_BOARD_LM3S6432S2E=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00008000
|
||||
CONFIG_DRAM_SIZE=32768
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -98,9 +98,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6432 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6965=y
|
||||
CONFIG_ARCH_BOARD="lm3s6965-ek"
|
||||
CONFIG_ARCH_BOARD_LM3S6965EK=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -98,9 +98,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6965 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6965=y
|
||||
CONFIG_ARCH_BOARD="lm3s6965-ek"
|
||||
CONFIG_ARCH_BOARD_LM3S6965EK=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -98,9 +98,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6965 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S6965=y
|
||||
CONFIG_ARCH_BOARD="lm3s6965-ek"
|
||||
CONFIG_ARCH_BOARD_LM3S6965EK=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -98,9 +98,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S6965 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S8962=y
|
||||
CONFIG_ARCH_BOARD="lm3s8962-ek"
|
||||
CONFIG_ARCH_BOARD_LM3S8962EK=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -98,9 +98,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S8962 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S8962=y
|
||||
CONFIG_ARCH_BOARD="lm3s8962-ek"
|
||||
CONFIG_ARCH_BOARD_LM3S8962EK=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -98,9 +98,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S8962 specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_LM3S8962=y
|
||||
CONFIG_ARCH_BOARD="lm3s8962-ek"
|
||||
CONFIG_ARCH_BOARD_LM3S8962EK=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=4531
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=n
|
||||
@ -98,9 +98,9 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# LM3S8962 specific SSI device driver settings
|
||||
|
@ -157,10 +157,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
|
||||
CONFIG_USART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
|
||||
#
|
||||
CONFIG_USART0_RS485MODE=n
|
||||
|
@ -155,10 +155,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
|
||||
CONFIG_USART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
|
||||
#
|
||||
CONFIG_USART0_RS485MODE=n
|
||||
|
@ -130,10 +130,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -130,10 +130,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -130,10 +130,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -130,10 +130,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -130,10 +130,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -130,10 +130,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -40,7 +40,7 @@ CONFIG_ARCH_M68332=y
|
||||
CONFIG_ARCH_M68332EVB=y
|
||||
CONFIG_ARCH_BOARD="m68332evb"
|
||||
CONFIG_ARCH_BOARD_M68332EVB=y
|
||||
CONFIG_DRAM_SIZE=0x003000
|
||||
CONFIG_DRAM_SIZE=12288
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
|
||||
#
|
||||
@ -58,8 +58,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -128,10 +128,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -128,10 +128,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="mcu123-lpc214x"
|
||||
CONFIG_ARCH_BOARD_MCU123=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=3270
|
||||
CONFIG_ARCH_LEDS=y
|
||||
CONFIG_DRAM_SIZE=0x00008000
|
||||
CONFIG_DRAM_SIZE=32768
|
||||
CONFIG_DRAM_START=0x40000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=1024
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
@ -80,8 +80,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="mcu123-lpc214x"
|
||||
CONFIG_ARCH_BOARD_MCU123=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=3270
|
||||
CONFIG_ARCH_LEDS=y
|
||||
CONFIG_DRAM_SIZE=0x00008000
|
||||
CONFIG_DRAM_SIZE=32768
|
||||
CONFIG_DRAM_START=0x40000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
@ -80,8 +80,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="mcu123-lpc214x"
|
||||
CONFIG_ARCH_BOARD_MCU123=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=3270
|
||||
CONFIG_ARCH_LEDS=y
|
||||
CONFIG_DRAM_SIZE=0x00008000
|
||||
CONFIG_DRAM_SIZE=32768
|
||||
CONFIG_DRAM_START=0x40000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
@ -80,8 +80,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="mcu123-lpc214x"
|
||||
CONFIG_ARCH_BOARD_MCU123=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=3270
|
||||
CONFIG_ARCH_LEDS=y
|
||||
CONFIG_DRAM_SIZE=0x00008000
|
||||
CONFIG_DRAM_SIZE=32768
|
||||
CONFIG_DRAM_START=0x40000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=1024
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
@ -80,8 +80,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="mcu123-lpc214x"
|
||||
CONFIG_ARCH_BOARD_MCU123=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=3270
|
||||
CONFIG_ARCH_LEDS=y
|
||||
CONFIG_DRAM_SIZE=0x00008000
|
||||
CONFIG_DRAM_SIZE=32768
|
||||
CONFIG_DRAM_START=0x40000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=1024
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
@ -80,8 +80,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -96,7 +96,7 @@ CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART1_BAUD=38400
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -153,8 +153,8 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -153,8 +153,8 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -145,8 +145,8 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_IMX1=y
|
||||
CONFIG_ARCH_BOARD="mx1ads"
|
||||
CONFIG_ARCH_BOARD_MX1ADS=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x01000000
|
||||
CONFIG_DRAM_SIZE=16777216
|
||||
CONFIG_DRAM_START=0x08000000
|
||||
CONFIG_DRAM_VSTART=0x00000000
|
||||
CONFIG_DRAM_NUTTXENTRY=0x01004000
|
||||
@ -80,9 +80,9 @@ CONFIG_UART3_BITS=8
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# IMX specific SPI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_MCS92S12NEC64=y
|
||||
CONFIG_ARCH_BOARD="ne64badge"
|
||||
CONFIG_ARCH_BOARD_NE64BADGE=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_NOINTC=y
|
||||
CONFIG_ARCH_IRQPRIO=n
|
||||
@ -83,7 +83,7 @@ CONFIG_SCI0_RXBUFSIZE=32
|
||||
CONFIG_SCI0_BAUD=38400
|
||||
CONFIG_SCI0_BITS=8
|
||||
CONFIG_SCI0_PARITY=0
|
||||
CONFIG_SCI0_2STOP=0
|
||||
CONFIG_SCI0_2STOP=n
|
||||
|
||||
CONFIG_SCI1_SERIAL_CONSOLE=n
|
||||
CONFIG_SCI1_TXBUFSIZE=32
|
||||
@ -91,7 +91,7 @@ CONFIG_SCI1_RXBUFSIZE=32
|
||||
CONFIG_SCI1_BAUD=38400
|
||||
CONFIG_SCI1_BITS=8
|
||||
CONFIG_SCI1_PARITY=0
|
||||
CONFIG_SCI1_2STOP=0
|
||||
CONFIG_SCI1_2STOP=n
|
||||
|
||||
#
|
||||
# MC9S12NEC64 specific SSI device driver settings
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="ntosd-dm320"
|
||||
CONFIG_ARCH_BOARD_NTOSD_DM320=y
|
||||
CONFIG_ARCH_NTOSD_DEVBOARD=n
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x02000000
|
||||
CONFIG_DRAM_SIZE=33554432
|
||||
CONFIG_DRAM_START=0x01100000
|
||||
CONFIG_DRAM_VSTART=0x00000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
@ -79,8 +79,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="ntosd-dm320"
|
||||
CONFIG_ARCH_BOARD_NTOSD_DM320=y
|
||||
CONFIG_ARCH_NTOSD_DEVBOARD=n
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x02000000
|
||||
CONFIG_DRAM_SIZE=33554432
|
||||
CONFIG_DRAM_START=0x01100000
|
||||
CONFIG_DRAM_VSTART=0x00000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
@ -78,8 +78,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="ntosd-dm320"
|
||||
CONFIG_ARCH_BOARD_NTOSD_DM320=y
|
||||
CONFIG_ARCH_NTOSD_DEVBOARD=n
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x02000000
|
||||
CONFIG_DRAM_SIZE=33554432
|
||||
CONFIG_DRAM_START=0x01100000
|
||||
CONFIG_DRAM_VSTART=0x00000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
@ -79,8 +79,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="ntosd-dm320"
|
||||
CONFIG_ARCH_BOARD_NTOSD_DM320=y
|
||||
CONFIG_ARCH_NTOSD_DEVBOARD=n
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x02000000
|
||||
CONFIG_DRAM_SIZE=33554432
|
||||
CONFIG_DRAM_START=0x01100000
|
||||
CONFIG_DRAM_VSTART=0x00000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
@ -79,8 +79,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="ntosd-dm320"
|
||||
CONFIG_ARCH_BOARD_NTOSD_DM320=y
|
||||
CONFIG_ARCH_NTOSD_DEVBOARD=n
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x02000000
|
||||
CONFIG_DRAM_SIZE=33554432
|
||||
CONFIG_DRAM_START=0x01100000
|
||||
CONFIG_DRAM_VSTART=0x00000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
@ -79,8 +79,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="ntosd-dm320"
|
||||
CONFIG_ARCH_BOARD_NTOSD_DM320=y
|
||||
CONFIG_ARCH_NTOSD_DEVBOARD=n
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x02000000
|
||||
CONFIG_DRAM_SIZE=33554432
|
||||
CONFIG_DRAM_START=0x01100000
|
||||
CONFIG_DRAM_VSTART=0x00000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
@ -79,8 +79,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -44,7 +44,7 @@ CONFIG_ARCH_BOARD="ntosd-dm320"
|
||||
CONFIG_ARCH_BOARD_NTOSD_DM320=y
|
||||
CONFIG_ARCH_NTOSD_DEVBOARD=n
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16945
|
||||
CONFIG_DRAM_SIZE=0x02000000
|
||||
CONFIG_DRAM_SIZE=33554432
|
||||
CONFIG_DRAM_START=0x01100000
|
||||
CONFIG_DRAM_VSTART=0x00000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
@ -79,8 +79,8 @@ CONFIG_UART0_BITS=8
|
||||
CONFIG_UART1_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -128,10 +128,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -128,10 +128,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -128,10 +128,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -128,10 +128,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -134,10 +134,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -134,10 +134,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -134,10 +134,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -134,10 +134,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -134,10 +134,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -134,10 +134,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -136,10 +136,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -134,10 +134,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -134,10 +134,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -134,10 +134,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -128,10 +128,10 @@ CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# LPC17xx specific PHY/Ethernet device driver settings
|
||||
|
@ -50,7 +50,7 @@ CONFIG_ARCH_BOARD_OLIMEXLPC2378=y
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=3270
|
||||
CONFIG_ARCH_LEDS=y
|
||||
CONFIG_DRAM_SIZE=0x00008000
|
||||
CONFIG_DRAM_SIZE=32768
|
||||
CONFIG_DRAM_START=0x40000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
@ -101,8 +101,8 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
# 2 Stop Bits ?
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -50,7 +50,7 @@ CONFIG_ARCH_BOARD_OLIMEXLPC2378=y
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=3270
|
||||
CONFIG_ARCH_LEDS=y
|
||||
CONFIG_DRAM_SIZE=0x00008000
|
||||
CONFIG_DRAM_SIZE=32768
|
||||
CONFIG_DRAM_START=0x40000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
@ -101,8 +101,8 @@ CONFIG_UART2_BITS=8
|
||||
CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
# 2 Stop Bits ?
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_STM32F107VC=y
|
||||
CONFIG_ARCH_BOARD="olimex-stm32-p107"
|
||||
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@ -144,44 +144,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=n
|
||||
CONFIG_USART2_SERIAL_CONSOLE=y
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103Z specific SSI device driver settings
|
||||
|
@ -43,7 +43,7 @@ CONFIG_ARCH_CHIP_STM32F107VC=y
|
||||
CONFIG_ARCH_BOARD="olimex-stm32-p107"
|
||||
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=5483
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_DRAM_END=(CONFIG_DRAM_START+CONFIG_DRAM_SIZE)
|
||||
CONFIG_ARCH_IRQPRIO=y
|
||||
@ -146,44 +146,44 @@ CONFIG_STM32_ADC3=n
|
||||
CONFIG_USART1_SERIAL_CONSOLE=n
|
||||
CONFIG_USART2_SERIAL_CONSOLE=y
|
||||
CONFIG_USART3_SERIAL_CONSOLE=n
|
||||
CONFIG_USART4_SERIAL_CONSOLE=n
|
||||
CONFIG_USART5_SERIAL_CONSOLE=n
|
||||
CONFIG_UART4_SERIAL_CONSOLE=n
|
||||
CONFIG_UART5_SERIAL_CONSOLE=n
|
||||
|
||||
CONFIG_USART1_TXBUFSIZE=256
|
||||
CONFIG_USART2_TXBUFSIZE=256
|
||||
CONFIG_USART3_TXBUFSIZE=256
|
||||
CONFIG_USART4_TXBUFSIZE=256
|
||||
CONFIG_USART5_TXBUFSIZE=256
|
||||
CONFIG_UART4_TXBUFSIZE=256
|
||||
CONFIG_UART5_TXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_RXBUFSIZE=256
|
||||
CONFIG_USART2_RXBUFSIZE=256
|
||||
CONFIG_USART3_RXBUFSIZE=256
|
||||
CONFIG_USART4_RXBUFSIZE=256
|
||||
CONFIG_USART5_RXBUFSIZE=256
|
||||
CONFIG_UART4_RXBUFSIZE=256
|
||||
CONFIG_UART5_RXBUFSIZE=256
|
||||
|
||||
CONFIG_USART1_BAUD=115200
|
||||
CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART3_BAUD=115200
|
||||
CONFIG_USART4_BAUD=115200
|
||||
CONFIG_USART5_BAUD=115200
|
||||
CONFIG_UART4_BAUD=115200
|
||||
CONFIG_UART5_BAUD=115200
|
||||
|
||||
CONFIG_USART1_BITS=8
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART3_BITS=8
|
||||
CONFIG_USART4_BITS=8
|
||||
CONFIG_USART5_BITS=8
|
||||
CONFIG_UART4_BITS=8
|
||||
CONFIG_UART5_BITS=8
|
||||
|
||||
CONFIG_USART1_PARITY=0
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART3_PARITY=0
|
||||
CONFIG_USART4_PARITY=0
|
||||
CONFIG_USART5_PARITY=0
|
||||
CONFIG_UART4_PARITY=0
|
||||
CONFIG_UART5_PARITY=0
|
||||
|
||||
CONFIG_USART1_2STOP=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
CONFIG_USART3_2STOP=0
|
||||
CONFIG_USART4_2STOP=0
|
||||
CONFIG_USART5_2STOP=0
|
||||
CONFIG_USART1_2STOP=n
|
||||
CONFIG_USART2_2STOP=n
|
||||
CONFIG_USART3_2STOP=n
|
||||
CONFIG_UART4_2STOP=n
|
||||
CONFIG_UART5_2STOP=n
|
||||
|
||||
#
|
||||
# STM32F103Z specific SSI device driver settings
|
||||
|
@ -47,7 +47,7 @@ CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=1431
|
||||
CONFIG_ARCH_LEDS=y
|
||||
CONFIG_ARCH_BUTTONS=y
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
@ -117,10 +117,10 @@ CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -47,7 +47,7 @@ CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=1431
|
||||
CONFIG_ARCH_LEDS=y
|
||||
CONFIG_ARCH_BUTTONS=y
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
@ -117,10 +117,10 @@ CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
@ -47,7 +47,7 @@ CONFIG_ARCH_IRQPRIO=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=1431
|
||||
CONFIG_ARCH_LEDS=y
|
||||
CONFIG_ARCH_BUTTONS=y
|
||||
CONFIG_DRAM_SIZE=0x00010000
|
||||
CONFIG_DRAM_SIZE=65536
|
||||
CONFIG_DRAM_START=0x20000000
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
@ -117,10 +117,10 @@ CONFIG_UART0_PARITY=0
|
||||
CONFIG_UART1_PARITY=0
|
||||
CONFIG_UART2_PARITY=0
|
||||
CONFIG_UART3_PARITY=0
|
||||
CONFIG_UART0_2STOP=0
|
||||
CONFIG_UART1_2STOP=0
|
||||
CONFIG_UART2_2STOP=0
|
||||
CONFIG_UART3_2STOP=0
|
||||
CONFIG_UART0_2STOP=n
|
||||
CONFIG_UART1_2STOP=n
|
||||
CONFIG_UART2_2STOP=n
|
||||
CONFIG_UART3_2STOP=n
|
||||
|
||||
#
|
||||
# General build options
|
||||
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
x
Reference in New Issue
Block a user